Remove TLB from userspace
Remove TLB from userspace CPU structure.
Signed-off-by: Paul Brook <paul@codesourcery.com>
tcg/arm: merge the two sets of #define for optional ops
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/arm: accept immediate arguments for brcond/setcond
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Add a missing break
tcg/arm: implement setcond2
tcg/arm: implement setcond
tcg/arm: fix div2/divu2
When restoring register values, increase the stack register for skippedvalues.
tcg: Add comments for all optional instructions not implemented.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
ARM back-end: Use sxt[bh] instructions for ext{8, 6}s
This patch uses sxtb for ext8s_i32 and sxth for ext16s_i32 in ARM back-end.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Suppress some variants of English in comments
Replace surpress, supress by suppress.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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