Revision 24741ef3

b/exec.c
2152 2152
    }
2153 2153
}
2154 2154

  
2155
/* never used */
2156
uint32_t ldl_phys(target_phys_addr_t addr)
2157
{
2158
    return 0;
2159
}
2160

  
2161
void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val)
2162
{
2163
}
2164

  
2165
void stl_phys(target_phys_addr_t addr, uint32_t val)
2166
{
2167
}
2168

  
2169 2155
#else
2170 2156
void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, 
2171 2157
                            int len, int is_write)
b/target-ppc/helper.c
36 36
/*****************************************************************************/
37 37
/* PowerPC MMU emulation */
38 38

  
39
#if defined(CONFIG_USER_ONLY) 
40
int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
41
                              int is_user, int is_softmmu)
42
{
43
    int exception, error_code;
44
    
45
    if (rw == 2) {
46
        exception = EXCP_ISI;
47
        error_code = 0;
48
    } else {
49
        exception = EXCP_DSI;
50
        error_code = 0;
51
        if (rw)
52
            error_code |= 0x02000000;
53
        env->spr[SPR_DAR] = address;
54
        env->spr[SPR_DSISR] = error_code;
55
    }
56
    env->exception_index = exception;
57
    env->error_code = error_code;
58
    return 1;
59
}
60
target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
61
{
62
    return addr;
63
}
64
#else
39 65
/* Perform BAT hit & translation */
40 66
static int get_bat (CPUState *env, uint32_t *real, int *prot,
41 67
                    uint32_t virtual, int rw, int type)
......
355 381
    return ret;
356 382
}
357 383

  
358
int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
359
                          uint32_t address, int rw, int access_type)
384
static int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
385
                                 uint32_t address, int rw, int access_type)
360 386
{
361 387
    int ret;
362 388
#if 0
......
387 413
    return ret;
388 414
}
389 415

  
390
#if defined(CONFIG_USER_ONLY) 
391
target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
392
{
393
    return addr;
394
}
395
#else
396 416
target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
397 417
{
398 418
    uint32_t phys_addr;
......
402 422
        return -1;
403 423
    return phys_addr;
404 424
}
405
#endif
406 425

  
407 426
/* Perform address translation */
408 427
int cpu_ppc_handle_mmu_fault (CPUState *env, uint32_t address, int rw,
......
523 542
    }
524 543
    return ret;
525 544
}
545
#endif
526 546

  
527 547
/*****************************************************************************/
528 548
/* BATs management */
b/target-sparc/helper.c
230 230
        return 1;
231 231
    }
232 232
}
233
#else
233

  
234
target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev)
235
{
236
    target_phys_addr_t pde_ptr;
237
    uint32_t pde;
238

  
239
    /* Context base + context number */
240
    pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);
241
    pde = ldl_phys(pde_ptr);
242

  
243
    switch (pde & PTE_ENTRYTYPE_MASK) {
244
    default:
245
    case 0: /* Invalid */
246
    case 2: /* PTE, maybe should not happen? */
247
    case 3: /* Reserved */
248
	return 0;
249
    case 1: /* L1 PDE */
250
	if (mmulev == 3)
251
	    return pde;
252
	pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4);
253
        pde = ldl_phys(pde_ptr);
254

  
255
	switch (pde & PTE_ENTRYTYPE_MASK) {
256
	default:
257
	case 0: /* Invalid */
258
	case 3: /* Reserved */
259
	    return 0;
260
	case 2: /* L1 PTE */
261
	    return pde;
262
	case 1: /* L2 PDE */
263
	    if (mmulev == 2)
264
		return pde;
265
	    pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4);
266
            pde = ldl_phys(pde_ptr);
267

  
268
	    switch (pde & PTE_ENTRYTYPE_MASK) {
269
	    default:
270
	    case 0: /* Invalid */
271
	    case 3: /* Reserved */
272
		return 0;
273
	    case 2: /* L2 PTE */
274
		return pde;
275
	    case 1: /* L3 PDE */
276
		if (mmulev == 1)
277
		    return pde;
278
		pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4);
279
                pde = ldl_phys(pde_ptr);
280

  
281
		switch (pde & PTE_ENTRYTYPE_MASK) {
282
		default:
283
		case 0: /* Invalid */
284
		case 1: /* PDE, should not happen */
285
		case 3: /* Reserved */
286
		    return 0;
287
		case 2: /* L3 PTE */
288
		    return pde;
289
		}
290
	    }
291
	}
292
    }
293
    return 0;
294
}
295

  
296
#ifdef DEBUG_MMU
297
void dump_mmu(CPUState *env)
298
{
299
     target_ulong va, va1, va2;
300
     unsigned int n, m, o;
301
     target_phys_addr_t pde_ptr, pa;
302
    uint32_t pde;
303

  
304
    printf("MMU dump:\n");
305
    pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);
306
    pde = ldl_phys(pde_ptr);
307
    printf("Root ptr: " TARGET_FMT_lx ", ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]);
308
    for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
309
	pde_ptr = mmu_probe(env, va, 2);
310
	if (pde_ptr) {
311
	    pa = cpu_get_phys_page_debug(env, va);
312
 	    printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va, pa, pde_ptr);
313
	    for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) {
314
		pde_ptr = mmu_probe(env, va1, 1);
315
		if (pde_ptr) {
316
		    pa = cpu_get_phys_page_debug(env, va1);
317
 		    printf(" VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va1, pa, pde_ptr);
318
		    for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) {
319
			pde_ptr = mmu_probe(env, va2, 0);
320
			if (pde_ptr) {
321
			    pa = cpu_get_phys_page_debug(env, va2);
322
 			    printf("  VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PTE: " TARGET_FMT_lx "\n", va2, pa, pde_ptr);
323
			}
324
		    }
325
		}
326
	    }
327
	}
328
    }
329
    printf("MMU dump ends\n");
330
}
331
#endif /* DEBUG_MMU */
332

  
333
#else /* !TARGET_SPARC64 */
234 334
/*
235 335
 * UltraSparc IIi I/DMMUs
236 336
 */
......
382 482
    return 1;
383 483
}
384 484

  
385
#endif
386
#endif
387

  
388
void memcpy32(target_ulong *dst, const target_ulong *src)
389
{
390
    dst[0] = src[0];
391
    dst[1] = src[1];
392
    dst[2] = src[2];
393
    dst[3] = src[3];
394
    dst[4] = src[4];
395
    dst[5] = src[5];
396
    dst[6] = src[6];
397
    dst[7] = src[7];
398
}
399

  
400
#if !defined(TARGET_SPARC64)
401
target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev)
402
{
403
    target_phys_addr_t pde_ptr;
404
    uint32_t pde;
405

  
406
    /* Context base + context number */
407
    pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);
408
    pde = ldl_phys(pde_ptr);
409

  
410
    switch (pde & PTE_ENTRYTYPE_MASK) {
411
    default:
412
    case 0: /* Invalid */
413
    case 2: /* PTE, maybe should not happen? */
414
    case 3: /* Reserved */
415
	return 0;
416
    case 1: /* L1 PDE */
417
	if (mmulev == 3)
418
	    return pde;
419
	pde_ptr = ((address >> 22) & ~3) + ((pde & ~3) << 4);
420
        pde = ldl_phys(pde_ptr);
421

  
422
	switch (pde & PTE_ENTRYTYPE_MASK) {
423
	default:
424
	case 0: /* Invalid */
425
	case 3: /* Reserved */
426
	    return 0;
427
	case 2: /* L1 PTE */
428
	    return pde;
429
	case 1: /* L2 PDE */
430
	    if (mmulev == 2)
431
		return pde;
432
	    pde_ptr = ((address & 0xfc0000) >> 16) + ((pde & ~3) << 4);
433
            pde = ldl_phys(pde_ptr);
434

  
435
	    switch (pde & PTE_ENTRYTYPE_MASK) {
436
	    default:
437
	    case 0: /* Invalid */
438
	    case 3: /* Reserved */
439
		return 0;
440
	    case 2: /* L2 PTE */
441
		return pde;
442
	    case 1: /* L3 PDE */
443
		if (mmulev == 1)
444
		    return pde;
445
		pde_ptr = ((address & 0x3f000) >> 10) + ((pde & ~3) << 4);
446
                pde = ldl_phys(pde_ptr);
447

  
448
		switch (pde & PTE_ENTRYTYPE_MASK) {
449
		default:
450
		case 0: /* Invalid */
451
		case 1: /* PDE, should not happen */
452
		case 3: /* Reserved */
453
		    return 0;
454
		case 2: /* L3 PTE */
455
		    return pde;
456
		}
457
	    }
458
	}
459
    }
460
    return 0;
461
}
462

  
463
#ifdef DEBUG_MMU
464
void dump_mmu(CPUState *env)
465
{
466
     target_ulong va, va1, va2;
467
     unsigned int n, m, o;
468
     target_phys_addr_t pde_ptr, pa;
469
    uint32_t pde;
470

  
471
    printf("MMU dump:\n");
472
    pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);
473
    pde = ldl_phys(pde_ptr);
474
    printf("Root ptr: " TARGET_FMT_lx ", ctx: %d\n", env->mmuregs[1] << 4, env->mmuregs[2]);
475
    for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
476
	pde_ptr = mmu_probe(env, va, 2);
477
	if (pde_ptr) {
478
	    pa = cpu_get_phys_page_debug(env, va);
479
 	    printf("VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va, pa, pde_ptr);
480
	    for (m = 0, va1 = va; m < 64; m++, va1 += 256 * 1024) {
481
		pde_ptr = mmu_probe(env, va1, 1);
482
		if (pde_ptr) {
483
		    pa = cpu_get_phys_page_debug(env, va1);
484
 		    printf(" VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PDE: " TARGET_FMT_lx "\n", va1, pa, pde_ptr);
485
		    for (o = 0, va2 = va1; o < 64; o++, va2 += 4 * 1024) {
486
			pde_ptr = mmu_probe(env, va2, 0);
487
			if (pde_ptr) {
488
			    pa = cpu_get_phys_page_debug(env, va2);
489
 			    printf("  VA: " TARGET_FMT_lx ", PA: " TARGET_FMT_lx " PTE: " TARGET_FMT_lx "\n", va2, pa, pde_ptr);
490
			}
491
		    }
492
		}
493
	    }
494
	}
495
    }
496
    printf("MMU dump ends\n");
497
}
498
#endif
499
#else
500 485
#ifdef DEBUG_MMU
501 486
void dump_mmu(CPUState *env)
502 487
{
......
568 553
	}
569 554
    }
570 555
}
571
#endif
572
#endif
556
#endif /* DEBUG_MMU */
557

  
558
#endif /* TARGET_SPARC64 */
559
#endif /* !CONFIG_USER_ONLY */
560

  
561
void memcpy32(target_ulong *dst, const target_ulong *src)
562
{
563
    dst[0] = src[0];
564
    dst[1] = src[1];
565
    dst[2] = src[2];
566
    dst[3] = src[3];
567
    dst[4] = src[4];
568
    dst[5] = src[5];
569
    dst[6] = src[6];
570
    dst[7] = src[7];
571
}
b/target-sparc/op_helper.c
221 221
#undef FS
222 222
#endif
223 223

  
224
#if defined(CONFIG_USER_ONLY) 
225
void helper_ld_asi(int asi, int size, int sign)
226
{
227
}
228

  
229
void helper_st_asi(int asi, int size, int sign)
230
{
231
}
232
#else
224 233
#ifndef TARGET_SPARC64
225 234
void helper_ld_asi(int asi, int size, int sign)
226 235
{
......
727 736
	return;
728 737
    }
729 738
}
730

  
731 739
#endif
740
#endif /* !CONFIG_USER_ONLY */
732 741

  
733 742
#ifndef TARGET_SPARC64
734 743
void helper_rett()

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