Revision 26c5d372
| b/tcg/arm/tcg-target.c | ||
|---|---|---|
| 1580 | 1580 |
{ INDEX_op_brcond2_i32, { "r", "r", "r", "r" } },
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| 1581 | 1581 |
{ INDEX_op_setcond2_i32, { "r", "r", "r", "r", "r" } },
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| 1582 | 1582 |
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| 1583 |
#if TARGET_LONG_BITS == 32 |
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| 1584 |
{ INDEX_op_qemu_ld8u, { "r", "x" } },
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| 1585 |
{ INDEX_op_qemu_ld8s, { "r", "x" } },
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| 1586 |
{ INDEX_op_qemu_ld16u, { "r", "x" } },
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| 1587 |
{ INDEX_op_qemu_ld16s, { "r", "x" } },
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| 1588 |
{ INDEX_op_qemu_ld32u, { "r", "x" } },
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| 1589 |
{ INDEX_op_qemu_ld64, { "d", "r", "x" } },
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| 1590 |
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| 1591 |
{ INDEX_op_qemu_st8, { "x", "x" } },
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| 1592 |
{ INDEX_op_qemu_st16, { "x", "x" } },
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| 1593 |
{ INDEX_op_qemu_st32, { "x", "x" } },
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| 1594 |
{ INDEX_op_qemu_st64, { "x", "D", "x" } },
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| 1595 |
#else |
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| 1583 | 1596 |
{ INDEX_op_qemu_ld8u, { "r", "x", "X" } },
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| 1584 | 1597 |
{ INDEX_op_qemu_ld8s, { "r", "x", "X" } },
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| 1585 | 1598 |
{ INDEX_op_qemu_ld16u, { "r", "x", "X" } },
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| ... | ... | |
| 1591 | 1604 |
{ INDEX_op_qemu_st16, { "x", "x", "X" } },
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| 1592 | 1605 |
{ INDEX_op_qemu_st32, { "x", "x", "X" } },
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| 1593 | 1606 |
{ INDEX_op_qemu_st64, { "x", "D", "x", "X" } },
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| 1607 |
#endif |
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| 1594 | 1608 |
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| 1595 | 1609 |
{ INDEX_op_ext8s_i32, { "r", "r" } },
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| 1596 | 1610 |
{ INDEX_op_ext16s_i32, { "r", "r" } },
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