tcg/arm: fix load/store definitions for 32-bit targets
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/arm: use helpers for divu/remu
tcg: add div/rem 32-bit helpers
Some targets like ARM would benefit to use 32-bit helpers fordiv/rem/divu/remu.
Create a #define for div2 so that targets can select betweendiv, div2 and helper implementation. Use the helper version if noneof the #define are present....
tcg/arm: implement andc op
tcg/arm: correctly save/restore registers in prologue/epilogue
Since commit 6113d6d3169393c323ac4c82d756a850145a5e7a QEMU crasheson ARM hosts. This is not a bug of this commit, but a latent bugrevealed by this commit.
The TCG code is called through a procedure call using the prologue...
Remove TLB from userspace
Remove TLB from userspace CPU structure.
Signed-off-by: Paul Brook <paul@codesourcery.com>
tcg/arm: merge the two sets of #define for optional ops
tcg/arm: accept immediate arguments for brcond/setcond
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Add a missing break
tcg/arm: implement setcond2
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