Adjust s390 addresses (the MSB is defined as "to be ignored").
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
Make Alpha and PowerPC targets use shared helpers for clz, clo, ctz, cto and ctpop.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3466 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC coding style and inlining fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3461 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC floating-point helper typo.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3460 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC float bugfix: 64 bits float mantissa is 52 bits long.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3459 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC FPSCR update and floating-point exception generation in most useful cases.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3458 c046a42c-6fe2-441c-8c8c-71466251a162
Fix endianness bug for PowerPC stfiwx instruction.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3456 c046a42c-6fe2-441c-8c8c-71466251a162
For consistency, align the address to the cache line before using it, when invalidating the instruction cache.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3449 c046a42c-6fe2-441c-8c8c-71466251a162
Bugfix in PowerPC dcbi instruction: we must do a load before the store, or we'll store random data.Update cache instructions comments.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3448 c046a42c-6fe2-441c-8c8c-71466251a162
Pretty dump for specific PowerPC instructions names.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3447 c046a42c-6fe2-441c-8c8c-71466251a162
Make PowerPC hypervisor resources able to compile, even if not enabled for now.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3446 c046a42c-6fe2-441c-8c8c-71466251a162
Bugfix: PowerPC 64 slbia never invalidates the first segment entry.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3445 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC 64x64 bits multiplication overflow check.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3444 c046a42c-6fe2-441c-8c8c-71466251a162
Use host-utils for PowerPC 64 64x64 bits multiplications.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3442 c046a42c-6fe2-441c-8c8c-71466251a162
Add PowerPC power-management state check callback.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3441 c046a42c-6fe2-441c-8c8c-71466251a162
Implement power-management for all defined PowerPC CPUs.Fix PowerPC 970MP definition.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3440 c046a42c-6fe2-441c-8c8c-71466251a162
Update PowerPC emulation status file.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3438 c046a42c-6fe2-441c-8c8c-71466251a162
Allow selection of all defined PowerPC 74xx (aka G4) CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3437 c046a42c-6fe2-441c-8c8c-71466251a162
Gprof prooved the PowerPC emulation spent too much time in MSR load and storeroutines. Coming back to a raw MSR storage model then speed-up the emulation.Improve fast MSR updates (wrtee wrteei and mtriee cases).Share rfi family instructions helpers code to avoid bug in duplicated code....
Properly implement non-execute bit on PowerPC segments and PTEs.Fix page protection bits for PowerPC 64 MMU.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3395 c046a42c-6fe2-441c-8c8c-71466251a162
Merge PowerPC 620 input bus definitions with standard PowerPC 6xx.Avoid hardcoding PowerPC interrupts definitions to ease updates.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3393 c046a42c-6fe2-441c-8c8c-71466251a162
There is no need of a specific MMU model for PowerPC 601.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3392 c046a42c-6fe2-441c-8c8c-71466251a162
Implement PowerPC 64 SLB invalidation helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3391 c046a42c-6fe2-441c-8c8c-71466251a162
Do not allow PowerPC CPU restart after entering checkstop mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3388 c046a42c-6fe2-441c-8c8c-71466251a162
Generate micro-ops for PowerPC hypervisor mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3386 c046a42c-6fe2-441c-8c8c-71466251a162
Replace is_user variable with mmu_idx in softmmu core, allowing support of more than 2 mmu access modes.Add backward compatibility is_user variable in targets code when needed.Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions....
Unify '-cpu ?' option.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3355 c046a42c-6fe2-441c-8c8c-71466251a162
Remove synonymous in PowerPC MSR bits definitions.Fix MSR EP bit buggy definition.Remove unuseful MSR flags.Fix MSR bits and flags definitions for most supported PowerPC implementations.Add MSR definitions/flags constistency checks and optional dump....
Real-mode only PowerPC 40x do not have any TLBs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3353 c046a42c-6fe2-441c-8c8c-71466251a162
Implement exception prefix feature for PowerPC 601.Fix PowerPC 601 hardware reset vector.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3352 c046a42c-6fe2-441c-8c8c-71466251a162
Add missing exception vectors for PowerPC 7x5.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3351 c046a42c-6fe2-441c-8c8c-71466251a162
Work-around C89 and/or "old" gcc unspecified behavior (#if in macro calls).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3350 c046a42c-6fe2-441c-8c8c-71466251a162
Implement PowerPC Altivec load & stores, used by Apple firmware for memcpy.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3349 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC target coding style fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC target optimisations: make intensive use of always_inline.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3347 c046a42c-6fe2-441c-8c8c-71466251a162
Reorganize the CPUPPCState structure to group features.Add #ifdef to avoid compiling not relevant resources:- MMU related stuff for user-mode only targets- PowerPC 64 only resources for PowerPC 32 targets- embedded PowerPC extensions for non-ppcemb targets....
Add MSR bits signification per PowerPC implementation flags (to be continued).As a side effect, single step and branch step are available again.Remove irrelevant MSR bits definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3342 c046a42c-6fe2-441c-8c8c-71466251a162
Full implementation of PowerPC 64 MMU, just missing support for 1 TB memory segments.Remove the PowerPC 64 "bridge" MMU model and implement segment registers emulation using SLB entries instead.Make SLB area size implementation dependant.Improve TLB & SLB search debug traces....
Rename PowerPC MMUCSR0 and MMUCFG SPRs: those are not BookE specific.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3333 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC hardware reset vector is now considered as part of the exception model.Use it at CPU initialisation time.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3332 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3322 c046a42c-6fe2-441c-8c8c-71466251a162
Make PowerPC cache line size implementation dependant.Implement dcbz tunable cache line size for PowerPC 970.Make hardware reset vector implementation dependant.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3321 c046a42c-6fe2-441c-8c8c-71466251a162
HID0 is a write-clear register on 970 (DBSR).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3320 c046a42c-6fe2-441c-8c8c-71466251a162
Enable PowerPC 64 MMU model and exceptions.Cleanups in MMU exceptions generation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3319 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC initialisation and first reset: reset must occur after we defined the CPU features.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3317 c046a42c-6fe2-441c-8c8c-71466251a162
We never have to export ppc_set_irq.Protect PowerPC 64 only features with #ifdef (TARGET_PPC64)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3316 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for hypervisor mode memory accesses.Add comments in load & store tables to ease code reading.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3313 c046a42c-6fe2-441c-8c8c-71466251a162
Fix nasty sign-extensions when running 32 bits CPU in the 64 bits emulatoron 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3312 c046a42c-6fe2-441c-8c8c-71466251a162
Fix reproductible crash: call cpu_loop_exit from micro-op, not from helper.c
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3311 c046a42c-6fe2-441c-8c8c-71466251a162
Fix missing nip updates for instructions that potentially generate exceptions from op helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3308 c046a42c-6fe2-441c-8c8c-71466251a162
Handle all MMU models in switches, even if it's just to abort because of lack of supporting code.Implement 74xx software TLB model.Keep 74xx with software TLB disabled, as Linux is not able to handle TLB miss on those processors.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3307 c046a42c-6fe2-441c-8c8c-71466251a162
More comments about unimplemented SPRs.Tag unused functions with unused attribute instead of using #ifdef (TODO) to ease tests: just have to enable the implementation in the cpu_defs table.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3306 c046a42c-6fe2-441c-8c8c-71466251a162
Optimisations: avoid generation of duplicated micro-ops.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3305 c046a42c-6fe2-441c-8c8c-71466251a162
Remove definitions for deprecated SLB & TLB related op helpers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3303 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid op helpers that would just call helpers for TLB & SLB management: call the helpers directly from the micro-ops.Avoid duplicated code for tlbsx. implementation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3302 c046a42c-6fe2-441c-8c8c-71466251a162
Share more SPR instanciations between all PowerPC 401 incarnations.Add comments about some unimplemented storage control dedicated SPRs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3301 c046a42c-6fe2-441c-8c8c-71466251a162
Implement embedded PowerPC exceptions prefix and vectors registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3300 c046a42c-6fe2-441c-8c8c-71466251a162
Share input pins and internal interrupt controller between all PowerPC 40x.Fix critical input interrupt generation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3299 c046a42c-6fe2-441c-8c8c-71466251a162
Fix (once again) PowerPC sync weight field.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3296 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC TLB miss dump code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3295 c046a42c-6fe2-441c-8c8c-71466251a162
Fix inconsistent end conditions in ppc_find_xxx functions. (crash reported by Andreas Farber when using default CPU).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3293 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3287 c046a42c-6fe2-441c-8c8c-71466251a162
Implement Process Priority Register as defined in the PowerPC 2.04 spec.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3282 c046a42c-6fe2-441c-8c8c-71466251a162
Implement new floating-point instructions (fre, frin, friz, frip, frim) as defined in the PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3281 c046a42c-6fe2-441c-8c8c-71466251a162
Improve single-precision floats load & stores: as the PowerPC registers only store double-precision floats, use float64_to_float32 & float32_to_float64 to do the appropriate conversion.Implement stfiwx.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3280 c046a42c-6fe2-441c-8c8c-71466251a162
XER is to be treated as a 64 bits register on 64 bits implementations, according to the PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3279 c046a42c-6fe2-441c-8c8c-71466251a162
Implement the PowerPC alternate time-base, following the 2.04 specification.Share most code with the time-base management routines.Remove time-base write routines from user-mode emulation environments.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3277 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC emulation optimization:avoid stopping translation after most SPR updateswhen a context-synchronization instruction is also needed.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3265 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for hypervisor timers resources, as described in PowerPC 2.04 specification.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3264 c046a42c-6fe2-441c-8c8c-71466251a162
Define the proper bfd_mach to be used by the disassembler for eachPowerPC emulated CPU.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3257 c046a42c-6fe2-441c-8c8c-71466251a162
Change POWERPC_PPC_GENERIC to POWERPC_DEFAULT.Use it as default for workstation targets.Fix PowerPC 750fl and 750gl definitions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3256 c046a42c-6fe2-441c-8c8c-71466251a162
Move get_sp_from_cpustate from cpu.h to target_signal.h.Enable sigaltstack processing for more architectures.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
linux-user sigaltstack() syscall, by Thayne Harbaugh.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
Build fix for PowerPC hosts, where "PPC" is a predefined macro name.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3251 c046a42c-6fe2-441c-8c8c-71466251a162
Implement size bit in PowerPC 64 comparisons.Allow 'weight' field in sync instruction.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3250 c046a42c-6fe2-441c-8c8c-71466251a162
Fixes for PowerPC 64 rotate and mask instructions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3247 c046a42c-6fe2-441c-8c8c-71466251a162
New ppc64-linux-user target.Allow use of PowerPC 970 for debugging (softmmu would not run, for now).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3246 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid compilation warnings on 32 bits hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3203 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC definitions, from POWER 2.04 specifications and misc sources.Check that at least instructions set and SPRs are correct for PowerPC 401, 403, 405 and 440 cores.Implement PowerPC 401 MMU model (real-mode only).Improve INSNs and SPRs dump to ease parse with standard shell tools....
Rework PowerPC 440 TLB management (thanks to Hollis Blanchard)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3200 c046a42c-6fe2-441c-8c8c-71466251a162
Make CPU hflags be a masked version of the PowerPC MSR.As a side effect, avoid potential bits shadowing in TB flags on 64 bits BookE.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3199 c046a42c-6fe2-441c-8c8c-71466251a162
Move likely and unlikely macros in a common place (Aurelien Jarno).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3192 c046a42c-6fe2-441c-8c8c-71466251a162
TARGET_FMT_lu may also be useful.Fix compilation warnings.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3190 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for PowerPC BookE MMU model support.Better MSR flags initialisation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3189 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for PowerPC 64 MMU model support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3186 c046a42c-6fe2-441c-8c8c-71466251a162
More PowerPC target cleanups:- remove unuseful historical macros and definitions- fix comments (bugs and cosmetics)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3185 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PowerPC 32 emulation on 64 bits hosts:we can use 64 bits registers but not pretend page is 1kB longAs it seems most Linux programs assume page-size is 4kB, never allow1kB pages for user-mode only emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3182 c046a42c-6fe2-441c-8c8c-71466251a162
PowerPC flags update/use fixes:- fix confusion between overflow/summary overflow, as reported by S Bansal.- reset carry in addic. optimized case (as it was already done in addic).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3179 c046a42c-6fe2-441c-8c8c-71466251a162
Coding style fixes in PowerPC related code (no functional change):- avoid useless blanks at EOL.- avoid tabs.- fix wrapping lines on 80 chars terminals.- add missing ';' at macros EOL to avoid confusing auto-identers.- fix identation.- Remove historical macros in micro-ops (PARAM, SPARAM, PPC_OP, regs)...
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Fix tb->size mishandling, by Daniel Jacobowitz.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
Fix crash in set registers in PPC gdb-stub, by Jason Wessel.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3079 c046a42c-6fe2-441c-8c8c-71466251a162
Disable dead code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3071 c046a42c-6fe2-441c-8c8c-71466251a162
Fix PPCEMB for 32bit hosts.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3059 c046a42c-6fe2-441c-8c8c-71466251a162
Spelling fixes, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3009 c046a42c-6fe2-441c-8c8c-71466251a162