Revision 27848470

b/target-mips/translate.c
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static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
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{
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    TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR);
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    TCGv r_tmp = new_tmp();
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    TCGv t0 = tcg_temp_new(TCG_TYPE_TL);
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    TCGv t1 = tcg_temp_new(TCG_TYPE_TL);
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    int l1 = gen_new_label();
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    uint32_t ccbit;
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    TCGCond cond;
......
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    else
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        ccbit = 1 << 23;
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    if (tf)
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        cond = TCG_COND_NE;
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    else
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        cond = TCG_COND_EQ;
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    else
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        cond = TCG_COND_NE;
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    gen_load_gpr(cpu_T[0], rd);
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    gen_load_gpr(cpu_T[1], rs);
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    {
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        TCGv r_ptr = tcg_temp_new(TCG_TYPE_PTR);
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        TCGv r_tmp = new_tmp();
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        tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
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        tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
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        tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
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        tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
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        dead_tmp(r_tmp);
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    }
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    tcg_gen_mov_tl(cpu_T[0], cpu_T[1]);
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    gen_load_gpr(t0, rd);
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    gen_load_gpr(t1, rs);
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    tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
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    tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
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    tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
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    tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
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    tcg_gen_mov_tl(t0, t1);
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    gen_set_label(l1);
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    dead_tmp(r_tmp);
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    gen_store_gpr(t0, rd);
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    gen_store_gpr(cpu_T[0], rd);
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}
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#define GEN_MOVCF(fmt)                                                \

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