Revision 2871a3f6 hw/acpi_piix4.c
| b/hw/acpi_piix4.c | ||
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| 52 | 52 |
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| 53 | 53 |
typedef struct PIIX4PMState {
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PCIDevice dev; |
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IORange ioport; |
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uint16_t pmsts; |
| 56 | 57 |
uint16_t pmen; |
| 57 | 58 |
uint16_t pmcntrl; |
| ... | ... | |
| 128 | 129 |
pm_update_sci(s); |
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} |
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static void pm_ioport_writew(void *opaque, uint32_t addr, uint32_t val) |
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static void pm_ioport_write(IORange *ioport, uint64_t addr, unsigned width, |
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uint64_t val) |
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{
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PIIX4PMState *s = opaque; |
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addr &= 0x3f; |
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PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport); |
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if (width != 2) {
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PIIX4_DPRINTF("PM write port=0x%04x width=%d val=0x%08x\n",
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(unsigned)addr, width, (unsigned)val); |
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} |
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switch(addr) {
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case 0x00: |
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{
|
| ... | ... | |
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PIIX4_DPRINTF("PM writew port=0x%04x val=0x%04x\n", addr, val);
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} |
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static uint32_t pm_ioport_readw(void *opaque, uint32_t addr) |
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static void pm_ioport_read(IORange *ioport, uint64_t addr, unsigned width, |
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uint64_t *data) |
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{
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PIIX4PMState *s = opaque;
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PIIX4PMState *s = container_of(ioport, PIIX4PMState, ioport);
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uint32_t val; |
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addr &= 0x3f; |
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switch(addr) {
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case 0x00: |
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val = get_pmsts(s); |
| ... | ... | |
| 200 | 207 |
case 0x04: |
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val = s->pmcntrl; |
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break; |
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default: |
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val = 0; |
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break; |
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} |
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PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", addr, val);
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return val; |
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} |
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static void pm_ioport_writel(void *opaque, uint32_t addr, uint32_t val) |
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{
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// PIIX4PMState *s = opaque; |
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PIIX4_DPRINTF("PM writel port=0x%04x val=0x%08x\n", addr & 0x3f, val);
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} |
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static uint32_t pm_ioport_readl(void *opaque, uint32_t addr) |
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{
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PIIX4PMState *s = opaque; |
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uint32_t val; |
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addr &= 0x3f; |
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switch(addr) {
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case 0x08: |
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val = get_pmtmr(s); |
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break; |
| ... | ... | |
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val = 0; |
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break; |
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} |
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PIIX4_DPRINTF("PM readl port=0x%04x val=0x%08x\n", addr, val);
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return val;
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PIIX4_DPRINTF("PM readw port=0x%04x val=0x%04x\n", addr, val);
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*data = val;
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} |
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static const IORangeOps pm_iorange_ops = {
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.read = pm_ioport_read, |
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.write = pm_ioport_write, |
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}; |
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static void apm_ctrl_changed(uint32_t val, void *arg) |
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{
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PIIX4PMState *s = arg; |
| ... | ... | |
| 265 | 256 |
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/* XXX: need to improve memory and ioport allocation */ |
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PIIX4_DPRINTF("PM: mapping to 0x%x\n", pm_io_base);
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register_ioport_write(pm_io_base, 64, 2, pm_ioport_writew, s); |
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register_ioport_read(pm_io_base, 64, 2, pm_ioport_readw, s); |
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register_ioport_write(pm_io_base, 64, 4, pm_ioport_writel, s); |
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register_ioport_read(pm_io_base, 64, 4, pm_ioport_readl, s); |
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iorange_init(&s->ioport, &pm_iorange_ops, pm_io_base, 64); |
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ioport_register(&s->ioport); |
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} |
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} |
| 274 | 263 |
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