Revision 28c2c264 hw/ide.c
b/hw/ide.c | ||
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3309 | 3309 |
pci_conf[0x51] |= 0x08; /* enable IDE1 */ |
3310 | 3310 |
} |
3311 | 3311 |
|
3312 |
pci_register_io_region((PCIDevice *)d, 0, 0x8,
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|
3312 |
pci_register_bar((PCIDevice *)d, 0, 0x8,
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|
3313 | 3313 |
PCI_ADDRESS_SPACE_IO, ide_map); |
3314 |
pci_register_io_region((PCIDevice *)d, 1, 0x4,
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|
3314 |
pci_register_bar((PCIDevice *)d, 1, 0x4,
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|
3315 | 3315 |
PCI_ADDRESS_SPACE_IO, ide_map); |
3316 |
pci_register_io_region((PCIDevice *)d, 2, 0x8,
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|
3316 |
pci_register_bar((PCIDevice *)d, 2, 0x8,
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|
3317 | 3317 |
PCI_ADDRESS_SPACE_IO, ide_map); |
3318 |
pci_register_io_region((PCIDevice *)d, 3, 0x4,
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|
3318 |
pci_register_bar((PCIDevice *)d, 3, 0x4,
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|
3319 | 3319 |
PCI_ADDRESS_SPACE_IO, ide_map); |
3320 |
pci_register_io_region((PCIDevice *)d, 4, 0x10,
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|
3320 |
pci_register_bar((PCIDevice *)d, 4, 0x10,
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|
3321 | 3321 |
PCI_ADDRESS_SPACE_IO, bmdma_map); |
3322 | 3322 |
|
3323 | 3323 |
pci_conf[0x3d] = 0x01; // interrupt on pin 1 |
... | ... | |
3376 | 3376 |
qemu_register_reset(piix3_reset, 0, d); |
3377 | 3377 |
piix3_reset(d); |
3378 | 3378 |
|
3379 |
pci_register_io_region((PCIDevice *)d, 4, 0x10,
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|
3379 |
pci_register_bar((PCIDevice *)d, 4, 0x10,
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|
3380 | 3380 |
PCI_ADDRESS_SPACE_IO, bmdma_map); |
3381 | 3381 |
|
3382 | 3382 |
ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]); |
... | ... | |
3416 | 3416 |
qemu_register_reset(piix3_reset, 0, d); |
3417 | 3417 |
piix3_reset(d); |
3418 | 3418 |
|
3419 |
pci_register_io_region((PCIDevice *)d, 4, 0x10,
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|
3419 |
pci_register_bar((PCIDevice *)d, 4, 0x10,
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|
3420 | 3420 |
PCI_ADDRESS_SPACE_IO, bmdma_map); |
3421 | 3421 |
|
3422 | 3422 |
ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], pic[14]); |
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