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/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin" |
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#define VGABIOS_FILENAME "vgabios.bin" |
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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#define ACPI_DATA_SIZE 0x10000 |
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static IOAPICState *ioapic;
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static PCIDevice *i440fx_state;
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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} |
45 |
|
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/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq;
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{ |
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qemu_irq_raise(ferr_irq); |
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} |
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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qemu_irq_lower(ferr_irq); |
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} |
58 |
|
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env) |
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{ |
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/* Note: when using kqemu, it is more logical to return the host TSC
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because kqemu does not trap the RDTSC instruction for
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performance reasons */
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#if USE_KQEMU
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if (env->kqemu_enabled) {
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return cpu_get_real_ticks();
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} else
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#endif
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{ |
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return cpu_get_ticks();
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} |
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} |
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|
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/* SMM support */
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void cpu_smm_update(CPUState *env)
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{ |
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if (i440fx_state && env == first_cpu)
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i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
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} |
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|
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{ |
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int intno;
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intno = apic_get_interrupt(env); |
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if (intno >= 0) { |
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/* set irq request if a PIC irq is still pending */
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/* XXX: improve that */
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pic_update_irq(isa_pic); |
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return intno;
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} |
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/* read the irq from the PIC */
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if (!apic_accept_pic_intr(env))
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return -1; |
98 |
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intno = pic_read_irq(isa_pic); |
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return intno;
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} |
102 |
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static void pic_irq_request(void *opaque, int irq, int level) |
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{ |
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CPUState *env = opaque; |
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if (level && apic_accept_pic_intr(env))
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cpu_interrupt(env, CPU_INTERRUPT_HARD); |
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} |
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/* PC cmos mappings */
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|
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#define REG_EQUIPMENT_BYTE 0x14 |
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|
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static int cmos_get_fd_drive_type(int fd0) |
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{ |
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int val;
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|
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switch (fd0) {
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case 0: |
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/* 1.44 Mb 3"5 drive */
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val = 4;
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break;
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case 1: |
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/* 2.88 Mb 3"5 drive */
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val = 5;
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break;
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case 2: |
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/* 1.2 Mb 5"5 drive */
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val = 2;
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break;
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default:
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val = 0;
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break;
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} |
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return val;
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} |
137 |
|
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
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{ |
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RTCState *s = rtc_state; |
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int cylinders, heads, sectors;
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bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
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rtc_set_memory(s, type_ofs, 47);
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rtc_set_memory(s, info_ofs, cylinders); |
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rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 2, heads);
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rtc_set_memory(s, info_ofs + 3, 0xff); |
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rtc_set_memory(s, info_ofs + 4, 0xff); |
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rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
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rtc_set_memory(s, info_ofs + 6, cylinders);
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rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 8, sectors);
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} |
154 |
|
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/* convert boot_device letter to something recognizable by the bios */
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static int boot_device2nibble(char boot_device) |
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{ |
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switch(boot_device) {
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case 'a': |
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case 'b': |
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return 0x01; /* floppy boot */ |
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case 'c': |
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return 0x02; /* hard drive boot */ |
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case 'd': |
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return 0x03; /* CD-ROM boot */ |
166 |
case 'n': |
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return 0x04; /* Network boot */ |
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} |
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return 0; |
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} |
171 |
|
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/* hd_table must contain 4 block drivers */
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static void cmos_init(int ram_size, const char *boot_device, BlockDriverState **hd_table) |
174 |
{ |
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RTCState *s = rtc_state; |
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int nbds, bds[3] = { 0, }; |
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int val;
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int fd0, fd1, nb;
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int i;
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|
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/* various important CMOS locations needed by PC/Bochs bios */
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/* memory size */
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val = 640; /* base memory in K */ |
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rtc_set_memory(s, 0x15, val);
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rtc_set_memory(s, 0x16, val >> 8); |
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val = (ram_size / 1024) - 1024; |
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x17, val);
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rtc_set_memory(s, 0x18, val >> 8); |
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rtc_set_memory(s, 0x30, val);
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rtc_set_memory(s, 0x31, val >> 8); |
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if (ram_size > (16 * 1024 * 1024)) |
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val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
198 |
else
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val = 0;
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x34, val);
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rtc_set_memory(s, 0x35, val >> 8); |
204 |
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/* set boot devices, and disable floppy signature check if requested */
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#define PC_MAX_BOOT_DEVICES 3 |
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nbds = strlen(boot_device); |
208 |
if (nbds > PC_MAX_BOOT_DEVICES) {
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fprintf(stderr, "Too many boot devices for PC\n");
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exit(1);
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} |
212 |
for (i = 0; i < nbds; i++) { |
213 |
bds[i] = boot_device2nibble(boot_device[i]); |
214 |
if (bds[i] == 0) { |
215 |
fprintf(stderr, "Invalid boot device for PC: '%c'\n",
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boot_device[i]); |
217 |
exit(1);
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} |
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} |
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rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
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rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
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/* floppy type */
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fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd0 < 3) |
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nb++; |
235 |
if (fd1 < 3) |
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nb++; |
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switch (nb) {
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case 0: |
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break;
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case 1: |
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val |= 0x01; /* 1 drive, ready for boot */ |
242 |
break;
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case 2: |
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val |= 0x41; /* 2 drives, ready for boot */ |
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break;
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} |
247 |
val |= 0x02; /* FPU is there */ |
248 |
val |= 0x04; /* PS/2 mouse installed */ |
249 |
rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
250 |
|
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/* hard drives */
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|
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rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
254 |
if (hd_table[0]) |
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cmos_init_hd(0x19, 0x1b, hd_table[0]); |
256 |
if (hd_table[1]) |
257 |
cmos_init_hd(0x1a, 0x24, hd_table[1]); |
258 |
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val = 0;
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for (i = 0; i < 4; i++) { |
261 |
if (hd_table[i]) {
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int cylinders, heads, sectors, translation;
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/* NOTE: bdrv_get_geometry_hint() returns the physical
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geometry. It is always such that: 1 <= sects <= 63, 1
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<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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geometry can be different if a translation is done. */
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translation = bdrv_get_translation_hint(hd_table[i]); |
268 |
if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
270 |
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
271 |
/* No translation. */
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translation = 0;
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} else {
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274 |
/* LBA translation. */
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translation = 1;
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} |
277 |
} else {
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translation--; |
279 |
} |
280 |
val |= translation << (i * 2);
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} |
282 |
} |
283 |
rtc_set_memory(s, 0x39, val);
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} |
285 |
|
286 |
void ioport_set_a20(int enable) |
287 |
{ |
288 |
/* XXX: send to all CPUs ? */
|
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cpu_x86_set_a20(first_cpu, enable); |
290 |
} |
291 |
|
292 |
int ioport_get_a20(void) |
293 |
{ |
294 |
return ((first_cpu->a20_mask >> 20) & 1); |
295 |
} |
296 |
|
297 |
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
298 |
{ |
299 |
ioport_set_a20((val >> 1) & 1); |
300 |
/* XXX: bit 0 is fast reset */
|
301 |
} |
302 |
|
303 |
static uint32_t ioport92_read(void *opaque, uint32_t addr) |
304 |
{ |
305 |
return ioport_get_a20() << 1; |
306 |
} |
307 |
|
308 |
/***********************************************************/
|
309 |
/* Bochs BIOS debug ports */
|
310 |
|
311 |
void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
312 |
{ |
313 |
static const char shutdown_str[8] = "Shutdown"; |
314 |
static int shutdown_index = 0; |
315 |
|
316 |
switch(addr) {
|
317 |
/* Bochs BIOS messages */
|
318 |
case 0x400: |
319 |
case 0x401: |
320 |
fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
321 |
exit(1);
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322 |
case 0x402: |
323 |
case 0x403: |
324 |
#ifdef DEBUG_BIOS
|
325 |
fprintf(stderr, "%c", val);
|
326 |
#endif
|
327 |
break;
|
328 |
case 0x8900: |
329 |
/* same as Bochs power off */
|
330 |
if (val == shutdown_str[shutdown_index]) {
|
331 |
shutdown_index++; |
332 |
if (shutdown_index == 8) { |
333 |
shutdown_index = 0;
|
334 |
qemu_system_shutdown_request(); |
335 |
} |
336 |
} else {
|
337 |
shutdown_index = 0;
|
338 |
} |
339 |
break;
|
340 |
|
341 |
/* LGPL'ed VGA BIOS messages */
|
342 |
case 0x501: |
343 |
case 0x502: |
344 |
fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
345 |
exit(1);
|
346 |
case 0x500: |
347 |
case 0x503: |
348 |
#ifdef DEBUG_BIOS
|
349 |
fprintf(stderr, "%c", val);
|
350 |
#endif
|
351 |
break;
|
352 |
} |
353 |
} |
354 |
|
355 |
void bochs_bios_init(void) |
356 |
{ |
357 |
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
358 |
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
359 |
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
360 |
register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
361 |
register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
362 |
|
363 |
register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
364 |
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
365 |
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
366 |
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
367 |
} |
368 |
|
369 |
/* Generate an initial boot sector which sets state and jump to
|
370 |
a specified vector */
|
371 |
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
372 |
{ |
373 |
uint8_t bootsect[512], *p;
|
374 |
int i;
|
375 |
|
376 |
if (bs_table[0] == NULL) { |
377 |
fprintf(stderr, "A disk image must be given for 'hda' when booting "
|
378 |
"a Linux kernel\n");
|
379 |
exit(1);
|
380 |
} |
381 |
|
382 |
memset(bootsect, 0, sizeof(bootsect)); |
383 |
|
384 |
/* Copy the MSDOS partition table if possible */
|
385 |
bdrv_read(bs_table[0], 0, bootsect, 1); |
386 |
|
387 |
/* Make sure we have a partition signature */
|
388 |
bootsect[510] = 0x55; |
389 |
bootsect[511] = 0xaa; |
390 |
|
391 |
/* Actual code */
|
392 |
p = bootsect; |
393 |
*p++ = 0xfa; /* CLI */ |
394 |
*p++ = 0xfc; /* CLD */ |
395 |
|
396 |
for (i = 0; i < 6; i++) { |
397 |
if (i == 1) /* Skip CS */ |
398 |
continue;
|
399 |
|
400 |
*p++ = 0xb8; /* MOV AX,imm16 */ |
401 |
*p++ = segs[i]; |
402 |
*p++ = segs[i] >> 8;
|
403 |
*p++ = 0x8e; /* MOV <seg>,AX */ |
404 |
*p++ = 0xc0 + (i << 3); |
405 |
} |
406 |
|
407 |
for (i = 0; i < 8; i++) { |
408 |
*p++ = 0x66; /* 32-bit operand size */ |
409 |
*p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
410 |
*p++ = gpr[i]; |
411 |
*p++ = gpr[i] >> 8;
|
412 |
*p++ = gpr[i] >> 16;
|
413 |
*p++ = gpr[i] >> 24;
|
414 |
} |
415 |
|
416 |
*p++ = 0xea; /* JMP FAR */ |
417 |
*p++ = ip; /* IP */
|
418 |
*p++ = ip >> 8;
|
419 |
*p++ = segs[1]; /* CS */ |
420 |
*p++ = segs[1] >> 8; |
421 |
|
422 |
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
423 |
} |
424 |
|
425 |
int load_kernel(const char *filename, uint8_t *addr, |
426 |
uint8_t *real_addr) |
427 |
{ |
428 |
int fd, size;
|
429 |
int setup_sects;
|
430 |
|
431 |
fd = open(filename, O_RDONLY | O_BINARY); |
432 |
if (fd < 0) |
433 |
return -1; |
434 |
|
435 |
/* load 16 bit code */
|
436 |
if (read(fd, real_addr, 512) != 512) |
437 |
goto fail;
|
438 |
setup_sects = real_addr[0x1F1];
|
439 |
if (!setup_sects)
|
440 |
setup_sects = 4;
|
441 |
if (read(fd, real_addr + 512, setup_sects * 512) != |
442 |
setup_sects * 512)
|
443 |
goto fail;
|
444 |
|
445 |
/* load 32 bit code */
|
446 |
size = read(fd, addr, 16 * 1024 * 1024); |
447 |
if (size < 0) |
448 |
goto fail;
|
449 |
close(fd); |
450 |
return size;
|
451 |
fail:
|
452 |
close(fd); |
453 |
return -1; |
454 |
} |
455 |
|
456 |
static long get_file_size(FILE *f) |
457 |
{ |
458 |
long where, size;
|
459 |
|
460 |
/* XXX: on Unix systems, using fstat() probably makes more sense */
|
461 |
|
462 |
where = ftell(f); |
463 |
fseek(f, 0, SEEK_END);
|
464 |
size = ftell(f); |
465 |
fseek(f, where, SEEK_SET); |
466 |
|
467 |
return size;
|
468 |
} |
469 |
|
470 |
static void load_linux(const char *kernel_filename, |
471 |
const char *initrd_filename, |
472 |
const char *kernel_cmdline) |
473 |
{ |
474 |
uint16_t protocol; |
475 |
uint32_t gpr[8];
|
476 |
uint16_t seg[6];
|
477 |
uint16_t real_seg; |
478 |
int setup_size, kernel_size, initrd_size, cmdline_size;
|
479 |
uint32_t initrd_max; |
480 |
uint8_t header[1024];
|
481 |
uint8_t *real_addr, *prot_addr, *cmdline_addr, *initrd_addr; |
482 |
FILE *f, *fi; |
483 |
|
484 |
/* Align to 16 bytes as a paranoia measure */
|
485 |
cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
486 |
|
487 |
/* load the kernel header */
|
488 |
f = fopen(kernel_filename, "rb");
|
489 |
if (!f || !(kernel_size = get_file_size(f)) ||
|
490 |
fread(header, 1, 1024, f) != 1024) { |
491 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
492 |
kernel_filename); |
493 |
exit(1);
|
494 |
} |
495 |
|
496 |
/* kernel protocol version */
|
497 |
#if 0
|
498 |
fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
499 |
#endif
|
500 |
if (ldl_p(header+0x202) == 0x53726448) |
501 |
protocol = lduw_p(header+0x206);
|
502 |
else
|
503 |
protocol = 0;
|
504 |
|
505 |
if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
506 |
/* Low kernel */
|
507 |
real_addr = phys_ram_base + 0x90000;
|
508 |
cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
509 |
prot_addr = phys_ram_base + 0x10000;
|
510 |
} else if (protocol < 0x202) { |
511 |
/* High but ancient kernel */
|
512 |
real_addr = phys_ram_base + 0x90000;
|
513 |
cmdline_addr = phys_ram_base + 0x9a000 - cmdline_size;
|
514 |
prot_addr = phys_ram_base + 0x100000;
|
515 |
} else {
|
516 |
/* High and recent kernel */
|
517 |
real_addr = phys_ram_base + 0x10000;
|
518 |
cmdline_addr = phys_ram_base + 0x20000;
|
519 |
prot_addr = phys_ram_base + 0x100000;
|
520 |
} |
521 |
|
522 |
#if 0
|
523 |
fprintf(stderr,
|
524 |
"qemu: real_addr = %#zx\n"
|
525 |
"qemu: cmdline_addr = %#zx\n"
|
526 |
"qemu: prot_addr = %#zx\n",
|
527 |
real_addr-phys_ram_base,
|
528 |
cmdline_addr-phys_ram_base,
|
529 |
prot_addr-phys_ram_base);
|
530 |
#endif
|
531 |
|
532 |
/* highest address for loading the initrd */
|
533 |
if (protocol >= 0x203) |
534 |
initrd_max = ldl_p(header+0x22c);
|
535 |
else
|
536 |
initrd_max = 0x37ffffff;
|
537 |
|
538 |
if (initrd_max >= ram_size-ACPI_DATA_SIZE)
|
539 |
initrd_max = ram_size-ACPI_DATA_SIZE-1;
|
540 |
|
541 |
/* kernel command line */
|
542 |
pstrcpy(cmdline_addr, 4096, kernel_cmdline);
|
543 |
|
544 |
if (protocol >= 0x202) { |
545 |
stl_p(header+0x228, cmdline_addr-phys_ram_base);
|
546 |
} else {
|
547 |
stw_p(header+0x20, 0xA33F); |
548 |
stw_p(header+0x22, cmdline_addr-real_addr);
|
549 |
} |
550 |
|
551 |
/* loader type */
|
552 |
/* High nybble = B reserved for Qemu; low nybble is revision number.
|
553 |
If this code is substantially changed, you may want to consider
|
554 |
incrementing the revision. */
|
555 |
if (protocol >= 0x200) |
556 |
header[0x210] = 0xB0; |
557 |
|
558 |
/* heap */
|
559 |
if (protocol >= 0x201) { |
560 |
header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
561 |
stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
562 |
} |
563 |
|
564 |
/* load initrd */
|
565 |
if (initrd_filename) {
|
566 |
if (protocol < 0x200) { |
567 |
fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
568 |
exit(1);
|
569 |
} |
570 |
|
571 |
fi = fopen(initrd_filename, "rb");
|
572 |
if (!fi) {
|
573 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
574 |
initrd_filename); |
575 |
exit(1);
|
576 |
} |
577 |
|
578 |
initrd_size = get_file_size(fi); |
579 |
initrd_addr = phys_ram_base + ((initrd_max-initrd_size) & ~4095);
|
580 |
|
581 |
fprintf(stderr, "qemu: loading initrd (%#x bytes) at %#zx\n",
|
582 |
initrd_size, initrd_addr-phys_ram_base); |
583 |
|
584 |
if (fread(initrd_addr, 1, initrd_size, fi) != initrd_size) { |
585 |
fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
586 |
initrd_filename); |
587 |
exit(1);
|
588 |
} |
589 |
fclose(fi); |
590 |
|
591 |
stl_p(header+0x218, initrd_addr-phys_ram_base);
|
592 |
stl_p(header+0x21c, initrd_size);
|
593 |
} |
594 |
|
595 |
/* store the finalized header and load the rest of the kernel */
|
596 |
memcpy(real_addr, header, 1024);
|
597 |
|
598 |
setup_size = header[0x1f1];
|
599 |
if (setup_size == 0) |
600 |
setup_size = 4;
|
601 |
|
602 |
setup_size = (setup_size+1)*512; |
603 |
kernel_size -= setup_size; /* Size of protected-mode code */
|
604 |
|
605 |
if (fread(real_addr+1024, 1, setup_size-1024, f) != setup_size-1024 || |
606 |
fread(prot_addr, 1, kernel_size, f) != kernel_size) {
|
607 |
fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
608 |
kernel_filename); |
609 |
exit(1);
|
610 |
} |
611 |
fclose(f); |
612 |
|
613 |
/* generate bootsector to set up the initial register state */
|
614 |
real_seg = (real_addr-phys_ram_base) >> 4;
|
615 |
seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
616 |
seg[1] = real_seg+0x20; /* CS */ |
617 |
memset(gpr, 0, sizeof gpr); |
618 |
gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
619 |
|
620 |
generate_bootsect(gpr, seg, 0);
|
621 |
} |
622 |
|
623 |
static void main_cpu_reset(void *opaque) |
624 |
{ |
625 |
CPUState *env = opaque; |
626 |
cpu_reset(env); |
627 |
} |
628 |
|
629 |
static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
630 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
631 |
static const int ide_irq[2] = { 14, 15 }; |
632 |
|
633 |
#define NE2000_NB_MAX 6 |
634 |
|
635 |
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
636 |
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
637 |
|
638 |
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
639 |
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
640 |
|
641 |
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
642 |
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
643 |
|
644 |
#ifdef HAS_AUDIO
|
645 |
static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
646 |
{ |
647 |
struct soundhw *c;
|
648 |
int audio_enabled = 0; |
649 |
|
650 |
for (c = soundhw; !audio_enabled && c->name; ++c) {
|
651 |
audio_enabled = c->enabled; |
652 |
} |
653 |
|
654 |
if (audio_enabled) {
|
655 |
AudioState *s; |
656 |
|
657 |
s = AUD_init (); |
658 |
if (s) {
|
659 |
for (c = soundhw; c->name; ++c) {
|
660 |
if (c->enabled) {
|
661 |
if (c->isa) {
|
662 |
c->init.init_isa (s, pic); |
663 |
} |
664 |
else {
|
665 |
if (pci_bus) {
|
666 |
c->init.init_pci (pci_bus, s); |
667 |
} |
668 |
} |
669 |
} |
670 |
} |
671 |
} |
672 |
} |
673 |
} |
674 |
#endif
|
675 |
|
676 |
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
677 |
{ |
678 |
static int nb_ne2k = 0; |
679 |
|
680 |
if (nb_ne2k == NE2000_NB_MAX)
|
681 |
return;
|
682 |
isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
683 |
nb_ne2k++; |
684 |
} |
685 |
|
686 |
/* PC hardware initialisation */
|
687 |
static void pc_init1(int ram_size, int vga_ram_size, const char *boot_device, |
688 |
DisplayState *ds, const char **fd_filename, int snapshot, |
689 |
const char *kernel_filename, const char *kernel_cmdline, |
690 |
const char *initrd_filename, |
691 |
int pci_enabled, const char *cpu_model) |
692 |
{ |
693 |
char buf[1024]; |
694 |
int ret, linux_boot, i;
|
695 |
ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
696 |
int bios_size, isa_bios_size, vga_bios_size;
|
697 |
PCIBus *pci_bus; |
698 |
int piix3_devfn = -1; |
699 |
CPUState *env; |
700 |
NICInfo *nd; |
701 |
qemu_irq *cpu_irq; |
702 |
qemu_irq *i8259; |
703 |
|
704 |
linux_boot = (kernel_filename != NULL);
|
705 |
|
706 |
/* init CPUs */
|
707 |
if (cpu_model == NULL) { |
708 |
#ifdef TARGET_X86_64
|
709 |
cpu_model = "qemu64";
|
710 |
#else
|
711 |
cpu_model = "qemu32";
|
712 |
#endif
|
713 |
} |
714 |
|
715 |
for(i = 0; i < smp_cpus; i++) { |
716 |
env = cpu_init(cpu_model); |
717 |
if (!env) {
|
718 |
fprintf(stderr, "Unable to find x86 CPU definition\n");
|
719 |
exit(1);
|
720 |
} |
721 |
if (i != 0) |
722 |
env->hflags |= HF_HALTED_MASK; |
723 |
if (smp_cpus > 1) { |
724 |
/* XXX: enable it in all cases */
|
725 |
env->cpuid_features |= CPUID_APIC; |
726 |
} |
727 |
register_savevm("cpu", i, 4, cpu_save, cpu_load, env); |
728 |
qemu_register_reset(main_cpu_reset, env); |
729 |
if (pci_enabled) {
|
730 |
apic_init(env); |
731 |
} |
732 |
vmport_init(env); |
733 |
} |
734 |
|
735 |
/* allocate RAM */
|
736 |
ram_addr = qemu_ram_alloc(ram_size); |
737 |
cpu_register_physical_memory(0, ram_size, ram_addr);
|
738 |
|
739 |
/* allocate VGA RAM */
|
740 |
vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
741 |
|
742 |
/* BIOS load */
|
743 |
if (bios_name == NULL) |
744 |
bios_name = BIOS_FILENAME; |
745 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
746 |
bios_size = get_image_size(buf); |
747 |
if (bios_size <= 0 || |
748 |
(bios_size % 65536) != 0) { |
749 |
goto bios_error;
|
750 |
} |
751 |
bios_offset = qemu_ram_alloc(bios_size); |
752 |
ret = load_image(buf, phys_ram_base + bios_offset); |
753 |
if (ret != bios_size) {
|
754 |
bios_error:
|
755 |
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
756 |
exit(1);
|
757 |
} |
758 |
|
759 |
/* VGA BIOS load */
|
760 |
if (cirrus_vga_enabled) {
|
761 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
762 |
} else {
|
763 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
764 |
} |
765 |
vga_bios_size = get_image_size(buf); |
766 |
if (vga_bios_size <= 0 || vga_bios_size > 65536) |
767 |
goto vga_bios_error;
|
768 |
vga_bios_offset = qemu_ram_alloc(65536);
|
769 |
|
770 |
ret = load_image(buf, phys_ram_base + vga_bios_offset); |
771 |
if (ret != vga_bios_size) {
|
772 |
vga_bios_error:
|
773 |
fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
|
774 |
exit(1);
|
775 |
} |
776 |
|
777 |
/* setup basic memory access */
|
778 |
cpu_register_physical_memory(0xc0000, 0x10000, |
779 |
vga_bios_offset | IO_MEM_ROM); |
780 |
|
781 |
/* map the last 128KB of the BIOS in ISA space */
|
782 |
isa_bios_size = bios_size; |
783 |
if (isa_bios_size > (128 * 1024)) |
784 |
isa_bios_size = 128 * 1024; |
785 |
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
786 |
IO_MEM_UNASSIGNED); |
787 |
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
788 |
isa_bios_size, |
789 |
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
790 |
|
791 |
{ |
792 |
ram_addr_t option_rom_offset; |
793 |
int size, offset;
|
794 |
|
795 |
offset = 0;
|
796 |
for (i = 0; i < nb_option_roms; i++) { |
797 |
size = get_image_size(option_rom[i]); |
798 |
if (size < 0) { |
799 |
fprintf(stderr, "Could not load option rom '%s'\n",
|
800 |
option_rom[i]); |
801 |
exit(1);
|
802 |
} |
803 |
if (size > (0x10000 - offset)) |
804 |
goto option_rom_error;
|
805 |
option_rom_offset = qemu_ram_alloc(size); |
806 |
ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); |
807 |
if (ret != size) {
|
808 |
option_rom_error:
|
809 |
fprintf(stderr, "Too many option ROMS\n");
|
810 |
exit(1);
|
811 |
} |
812 |
size = (size + 4095) & ~4095; |
813 |
cpu_register_physical_memory(0xd0000 + offset,
|
814 |
size, option_rom_offset | IO_MEM_ROM); |
815 |
offset += size; |
816 |
} |
817 |
} |
818 |
|
819 |
/* map all the bios at the top of memory */
|
820 |
cpu_register_physical_memory((uint32_t)(-bios_size), |
821 |
bios_size, bios_offset | IO_MEM_ROM); |
822 |
|
823 |
bochs_bios_init(); |
824 |
|
825 |
if (linux_boot)
|
826 |
load_linux(kernel_filename, initrd_filename, kernel_cmdline); |
827 |
|
828 |
cpu_irq = qemu_allocate_irqs(pic_irq_request, first_cpu, 1);
|
829 |
i8259 = i8259_init(cpu_irq[0]);
|
830 |
ferr_irq = i8259[13];
|
831 |
|
832 |
if (pci_enabled) {
|
833 |
pci_bus = i440fx_init(&i440fx_state, i8259); |
834 |
piix3_devfn = piix3_init(pci_bus, -1);
|
835 |
} else {
|
836 |
pci_bus = NULL;
|
837 |
} |
838 |
|
839 |
/* init basic PC hardware */
|
840 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
841 |
|
842 |
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
843 |
|
844 |
if (cirrus_vga_enabled) {
|
845 |
if (pci_enabled) {
|
846 |
pci_cirrus_vga_init(pci_bus, |
847 |
ds, phys_ram_base + vga_ram_addr, |
848 |
vga_ram_addr, vga_ram_size); |
849 |
} else {
|
850 |
isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
851 |
vga_ram_addr, vga_ram_size); |
852 |
} |
853 |
} else if (vmsvga_enabled) { |
854 |
if (pci_enabled)
|
855 |
pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size, |
856 |
ram_size, vga_ram_size); |
857 |
else
|
858 |
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
859 |
} else {
|
860 |
if (pci_enabled) {
|
861 |
pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
862 |
vga_ram_addr, vga_ram_size, 0, 0); |
863 |
} else {
|
864 |
isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
865 |
vga_ram_addr, vga_ram_size); |
866 |
} |
867 |
} |
868 |
|
869 |
rtc_state = rtc_init(0x70, i8259[8]); |
870 |
|
871 |
register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
872 |
register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
873 |
|
874 |
if (pci_enabled) {
|
875 |
ioapic = ioapic_init(); |
876 |
} |
877 |
pit = pit_init(0x40, i8259[0]); |
878 |
pcspk_init(pit); |
879 |
if (pci_enabled) {
|
880 |
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
881 |
} |
882 |
|
883 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
884 |
if (serial_hds[i]) {
|
885 |
serial_init(serial_io[i], i8259[serial_irq[i]], serial_hds[i]); |
886 |
} |
887 |
} |
888 |
|
889 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
890 |
if (parallel_hds[i]) {
|
891 |
parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
892 |
parallel_hds[i]); |
893 |
} |
894 |
} |
895 |
|
896 |
for(i = 0; i < nb_nics; i++) { |
897 |
nd = &nd_table[i]; |
898 |
if (!nd->model) {
|
899 |
if (pci_enabled) {
|
900 |
nd->model = "ne2k_pci";
|
901 |
} else {
|
902 |
nd->model = "ne2k_isa";
|
903 |
} |
904 |
} |
905 |
if (strcmp(nd->model, "ne2k_isa") == 0) { |
906 |
pc_init_ne2k_isa(nd, i8259); |
907 |
} else if (pci_enabled) { |
908 |
if (strcmp(nd->model, "?") == 0) |
909 |
fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
910 |
pci_nic_init(pci_bus, nd, -1);
|
911 |
} else if (strcmp(nd->model, "?") == 0) { |
912 |
fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
913 |
exit(1);
|
914 |
} else {
|
915 |
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
916 |
exit(1);
|
917 |
} |
918 |
} |
919 |
|
920 |
if (pci_enabled) {
|
921 |
pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1, i8259);
|
922 |
} else {
|
923 |
for(i = 0; i < 2; i++) { |
924 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
925 |
bs_table[2 * i], bs_table[2 * i + 1]); |
926 |
} |
927 |
} |
928 |
|
929 |
i8042_init(i8259[1], i8259[12], 0x60); |
930 |
DMA_init(0);
|
931 |
#ifdef HAS_AUDIO
|
932 |
audio_init(pci_enabled ? pci_bus : NULL, i8259);
|
933 |
#endif
|
934 |
|
935 |
floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd_table); |
936 |
|
937 |
cmos_init(ram_size, boot_device, bs_table); |
938 |
|
939 |
if (pci_enabled && usb_enabled) {
|
940 |
usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
941 |
} |
942 |
|
943 |
if (pci_enabled && acpi_enabled) {
|
944 |
uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
945 |
i2c_bus *smbus; |
946 |
|
947 |
/* TODO: Populate SPD eeprom data. */
|
948 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100); |
949 |
for (i = 0; i < 8; i++) { |
950 |
smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
951 |
} |
952 |
} |
953 |
|
954 |
if (i440fx_state) {
|
955 |
i440fx_init_memory_mappings(i440fx_state); |
956 |
} |
957 |
#if 0
|
958 |
/* ??? Need to figure out some way for the user to
|
959 |
specify SCSI devices. */
|
960 |
if (pci_enabled) {
|
961 |
void *scsi;
|
962 |
BlockDriverState *bdrv;
|
963 |
|
964 |
scsi = lsi_scsi_init(pci_bus, -1);
|
965 |
bdrv = bdrv_new("scsidisk");
|
966 |
bdrv_open(bdrv, "scsi_disk.img", 0);
|
967 |
lsi_scsi_attach(scsi, bdrv, -1);
|
968 |
bdrv = bdrv_new("scsicd");
|
969 |
bdrv_open(bdrv, "scsi_cd.iso", 0);
|
970 |
bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
|
971 |
lsi_scsi_attach(scsi, bdrv, -1);
|
972 |
}
|
973 |
#endif
|
974 |
} |
975 |
|
976 |
static void pc_init_pci(int ram_size, int vga_ram_size, const char *boot_device, |
977 |
DisplayState *ds, const char **fd_filename, |
978 |
int snapshot,
|
979 |
const char *kernel_filename, |
980 |
const char *kernel_cmdline, |
981 |
const char *initrd_filename, |
982 |
const char *cpu_model) |
983 |
{ |
984 |
pc_init1(ram_size, vga_ram_size, boot_device, |
985 |
ds, fd_filename, snapshot, |
986 |
kernel_filename, kernel_cmdline, |
987 |
initrd_filename, 1, cpu_model);
|
988 |
} |
989 |
|
990 |
static void pc_init_isa(int ram_size, int vga_ram_size, const char *boot_device, |
991 |
DisplayState *ds, const char **fd_filename, |
992 |
int snapshot,
|
993 |
const char *kernel_filename, |
994 |
const char *kernel_cmdline, |
995 |
const char *initrd_filename, |
996 |
const char *cpu_model) |
997 |
{ |
998 |
pc_init1(ram_size, vga_ram_size, boot_device, |
999 |
ds, fd_filename, snapshot, |
1000 |
kernel_filename, kernel_cmdline, |
1001 |
initrd_filename, 0, cpu_model);
|
1002 |
} |
1003 |
|
1004 |
QEMUMachine pc_machine = { |
1005 |
"pc",
|
1006 |
"Standard PC",
|
1007 |
pc_init_pci, |
1008 |
}; |
1009 |
|
1010 |
QEMUMachine isapc_machine = { |
1011 |
"isapc",
|
1012 |
"ISA-only PC",
|
1013 |
pc_init_isa, |
1014 |
}; |