Archipelago » qemu

#define IO_MEM_ROM         (1 << IO_MEM_SHIFT) /* hardcoded offset */

#define IO_MEM_UNASSIGNED  (2 << IO_MEM_SHIFT)

#define IO_MEM_NOTDIRTY    (4 << IO_MEM_SHIFT) /* used internally, never use directly */

typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);

typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);

        ldub_code(addr);

    }

    pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK;

        cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);

    }

    return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base;

    if (is_softmmu) 

#endif

    {

            /* IO memory case */

            address = vaddr | pd;

            addend = paddr;

    for(addr = start_addr; addr != end_addr; addr += TARGET_PAGE_SIZE) {

        p = phys_page_find_alloc(addr >> TARGET_PAGE_BITS, 1);

        p->phys_offset = phys_offset;

            phys_offset += TARGET_PAGE_SIZE;

    }

}

                }

            }

        } else {

                /* I/O case */

                io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

                if (l >= 4 && ((addr & 3) == 0)) {

        }

        if ((pd & ~TARGET_PAGE_MASK) != IO_MEM_RAM &&

            /* do nothing */

        } else {

            unsigned long addr1;

        pd = p->phys_offset;

    }

        /* I/O case */

        io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

        val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);

        pd = p->phys_offset;

    }

        /* I/O case */

        io_index = (pd >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1);

#ifdef TARGET_WORDS_BIGENDIAN