Revision 2ac71179 hw/stellaris.c

b/hw/stellaris.c
94 94 
    } else if (s->mode[n] == 0xa) {
95 95 
        /* PWM mode.  Not implemented.  */
96 96 
    } else {
97 
        cpu_abort(cpu_single_env, "TODO: 16-bit timer mode 0x%x\n",
98 
                  s->mode[n]);
97 
        hw_error("TODO: 16-bit timer mode 0x%x\n", s->mode[n]);
99 98 
    }
100 99 
    s->tick[n] = tick;
101 100 
    qemu_mod_timer(s->timer[n], tick);
......
137 136 
    } else if (s->mode[n] == 0xa) {
138 137 
        /* PWM mode.  Not implemented.  */
139 138 
    } else {
140 
        cpu_abort(cpu_single_env, "TODO: 16-bit timer mode 0x%x\n",
141 
                  s->mode[n]);
139 
        hw_error("TODO: 16-bit timer mode 0x%x\n", s->mode[n]);
142 140 
    }
143 141 
    gptm_update_irq(s);
144 142 
}
......
184 182 
        if (s->control == 1)
185 183 
            return s->rtc;
186 184 
    case 0x4c: /* TBR */
187 
        cpu_abort(cpu_single_env, "TODO: Timer value read\n");
185 
        hw_error("TODO: Timer value read\n");
188 186 
    default:
189 
        cpu_abort(cpu_single_env, "gptm_read: Bad offset 0x%x\n", (int)offset);
187 
        hw_error("gptm_read: Bad offset 0x%x\n", (int)offset);
190 188 
        return 0;
191 189 
    }
192 190 
}
......
266 264 
        s->match_prescale[0] = value;
267 265 
        break;
268 266 
    default:
269 
        cpu_abort(cpu_single_env, "gptm_write: Bad offset 0x%x\n", (int)offset);
267 
        hw_error("gptm_write: Bad offset 0x%x\n", (int)offset);
270 268 
    }
271 269 
    gptm_update_irq(s);
272 270 
}
......
500 498 
    case 0x1e4: /* USER1 */
501 499 
        return s->user1;
502 500 
    default:
503 
        cpu_abort(cpu_single_env, "ssys_read: Bad offset 0x%x\n", (int)offset);
501 
        hw_error("ssys_read: Bad offset 0x%x\n", (int)offset);
504 502 
        return 0;
505 503 
    }
506 504 
}
......
577 575 
        s->ldoarst = value;
578 576 
        break;
579 577 
    default:
580 
        cpu_abort(cpu_single_env, "ssys_write: Bad offset 0x%x\n", (int)offset);
578 
        hw_error("ssys_write: Bad offset 0x%x\n", (int)offset);
581 579 
    }
582 580 
    ssys_update(s);
583 581 
}
......
724 722 
    case 0x20: /* MCR */
725 723 
        return s->mcr;
726 724 
    default:
727 
        cpu_abort(cpu_single_env, "strllaris_i2c_read: Bad offset 0x%x\n",
728 
                  (int)offset);
725 
        hw_error("strllaris_i2c_read: Bad offset 0x%x\n", (int)offset);
729 726 
        return 0;
730 727 
    }
731 728 
}
......
801 798 
        break;
802 799 
    case 0x20: /* MCR */
803 800 
        if (value & 1)
804 
            cpu_abort(cpu_single_env,
801 
            hw_error(
805 802 
                      "stellaris_i2c_write: Loopback not implemented\n");
806 803 
        if (value & 0x20)
807 
            cpu_abort(cpu_single_env,
804 
            hw_error(
808 805 
                      "stellaris_i2c_write: Slave mode not implemented\n");
809 806 
        s->mcr = value & 0x31;
810 807 
        break;
811 808 
    default:
812 
        cpu_abort(cpu_single_env, "stellaris_i2c_write: Bad offset 0x%x\n",
809 
        hw_error("stellaris_i2c_write: Bad offset 0x%x\n",
813 810 
                  (int)offset);
814 811 
    }
815 812 
    stellaris_i2c_update(s);
......
1036 1033 
    case 0x30: /* SAC */
1037 1034 
        return s->sac;
1038 1035 
    default:
1039 
        cpu_abort(cpu_single_env, "strllaris_adc_read: Bad offset 0x%x\n",
1036 
        hw_error("strllaris_adc_read: Bad offset 0x%x\n",
1040 1037 
                  (int)offset);
1041 1038 
        return 0;
1042 1039 
    }
......
1057 1054 
            return;
1058 1055 
        case 0x04: /* SSCTL */
1059 1056 
            if (value != 6) {
1060 
                cpu_abort(cpu_single_env, "ADC: Unimplemented sequence %x\n",
1057 
                hw_error("ADC: Unimplemented sequence %x\n",
1061 1058 
                          value);
1062 1059 
            }
1063 1060 
            s->ssctl[n] = value;
......
1070 1067 
    case 0x00: /* ACTSS */
1071 1068 
        s->actss = value & 0xf;
1072 1069 
        if (value & 0xe) {
1073 
            cpu_abort(cpu_single_env,
1074 
                      "Not implemented:  ADC sequencers 1-3\n");
1070 
            hw_error("Not implemented:  ADC sequencers 1-3\n");
1075 1071 
        }
1076 1072 
        break;
1077 1073 
    case 0x08: /* IM */
......
1093 1089 
        s->sspri = value;
1094 1090 
        break;
1095 1091 
    case 0x28: /* PSSI */
1096 
        cpu_abort(cpu_single_env, "Not implemented:  ADC sample initiate\n");
1092 
        hw_error("Not implemented:  ADC sample initiate\n");
1097 1093 
        break;
1098 1094 
    case 0x30: /* SAC */
1099 1095 
        s->sac = value;
1100 1096 
        break;
1101 1097 
    default:
1102 
        cpu_abort(cpu_single_env, "stellaris_adc_write: Bad offset 0x%x\n",
1103 
                  (int)offset);
1098 
        hw_error("stellaris_adc_write: Bad offset 0x%x\n", (int)offset);
1104 1099 
    }
1105 1100 
    stellaris_adc_update(s);
1106 1101 
}

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