Revision 2b79487a

b/tcg/mips/tcg-target.c
1239 1239 
            tcg_out_opc_reg(s, OPC_OR, args[0], args[1], args[2]);
1240 1240 
        }
1241 1241 
        break;
1242 
    case INDEX_op_nor_i32:
1243 
        tcg_out_opc_reg(s, OPC_NOR, args[0], args[1], args[2]);
1244 
        break;
1242 1245 
    case INDEX_op_not_i32:
1243 1246 
        tcg_out_opc_reg(s, OPC_NOR, args[0], args[1], args[1]);
1244 1247 
        break;
......
1350 1353 
    { INDEX_op_sub_i32, { "r", "rZ", "rJZ" } },
1351 1354 

  		





  1352
  1355
  
    
    { INDEX_op_and_i32, { "r", "rZ", "rIZ" } },


  		





  
  1356
  
    
    { INDEX_op_nor_i32, { "r", "rZ", "rZ" } },


  		





  1353
  1357
  
    
    { INDEX_op_not_i32, { "r", "rZ" } },


  		





  1354
  1358
  
    
    { INDEX_op_or_i32, { "r", "rZ", "rIZ" } },


  		





  1355
  1359
  
    
    { INDEX_op_xor_i32, { "r", "rZ", "rIZ" } },


  		












  

    
      b/tcg/mips/tcg-target.h
    
  






  80
  80
  
    
/* optional instructions */


  		





  81
  81
  
    
#define TCG_TARGET_HAS_div_i32


  		





  82
  82
  
    
#define TCG_TARGET_HAS_not_i32


  		





  
  83
  
    
#define TCG_TARGET_HAS_nor_i32


  		





  83
  84
  
    
#undef TCG_TARGET_HAS_rot_i32


  		





  84
  85
  
    
#undef TCG_TARGET_HAS_ext8s_i32


  		





  85
  86
  
    
#undef TCG_TARGET_HAS_ext16s_i32


  		





  ......




  89
  90
  
    
#undef TCG_TARGET_HAS_orc_i32


  		





  90
  91
  
    
#undef TCG_TARGET_HAS_eqv_i32


  		





  91
  92
  
    
#undef TCG_TARGET_HAS_nand_i32


  		





  92
  
  
    
#undef TCG_TARGET_HAS_nor_i32


  		





  93
  93
  
    

  		





  94
  94
  
    
/* optional instructions automatically implemented */


  		





  95
  95
  
    
#undef TCG_TARGET_HAS_neg_i32      /* sub  rd, zero, rt   */


  		












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