Revision 2be0071f target-ppc/cpu.h
| b/target-ppc/cpu.h | ||
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| 924 | 924 |
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| 925 | 925 |
/*****************************************************************************/ |
| 926 | 926 |
/* Exceptions */ |
| 927 |
enum {
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| 928 |
EXCP_NONE = -1, |
|
| 929 |
/* PowerPC hardware exceptions : exception vector / 0x100 */ |
|
| 930 |
EXCP_RESET = 0x01, /* System reset */ |
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| 931 |
EXCP_MACHINE_CHECK = 0x02, /* Machine check exception */ |
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| 932 |
EXCP_DSI = 0x03, /* Impossible memory access */ |
|
| 933 |
EXCP_ISI = 0x04, /* Impossible instruction fetch */ |
|
| 934 |
EXCP_EXTERNAL = 0x05, /* External interruption */ |
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| 935 |
EXCP_ALIGN = 0x06, /* Alignment exception */ |
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| 936 |
EXCP_PROGRAM = 0x07, /* Program exception */ |
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| 937 |
EXCP_NO_FP = 0x08, /* No floating point */ |
|
| 938 |
EXCP_DECR = 0x09, /* Decrementer exception */ |
|
| 939 |
EXCP_RESA = 0x0A, /* Implementation specific */ |
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| 940 |
EXCP_RESB = 0x0B, /* Implementation specific */ |
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| 941 |
EXCP_SYSCALL = 0x0C, /* System call */ |
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| 942 |
EXCP_TRACE = 0x0D, /* Trace exception (optional) */ |
|
| 943 |
EXCP_FP_ASSIST = 0x0E, /* Floating-point assist (optional) */ |
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| 944 |
/* MPC740/745/750 & IBM 750 */ |
|
| 945 |
EXCP_PERF = 0x0F, /* Performance monitor */ |
|
| 946 |
EXCP_IABR = 0x13, /* Instruction address breakpoint */ |
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| 947 |
EXCP_SMI = 0x14, /* System management interrupt */ |
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| 948 |
EXCP_THRM = 0x15, /* Thermal management interrupt */ |
|
| 949 |
/* MPC755 */ |
|
| 950 |
EXCP_TLBMISS = 0x10, /* Instruction TLB miss */ |
|
| 951 |
EXCP_TLBMISS_DL = 0x11, /* Data TLB miss for load */ |
|
| 952 |
EXCP_TLBMISS_DS = 0x12, /* Data TLB miss for store */ |
|
| 953 |
EXCP_PPC_MAX = 0x16, |
|
| 954 |
/* Qemu exception */ |
|
| 955 |
EXCP_OFCALL = 0x20, /* Call open-firmware emulator */ |
|
| 956 |
EXCP_RTASCALL = 0x21, /* Call RTAS emulator */ |
|
| 957 |
/* Special cases where we want to stop translation */ |
|
| 958 |
EXCP_MTMSR = 0x104, /* mtmsr instruction: */ |
|
| 927 |
#define EXCP_NONE -1 |
|
| 928 |
/* PowerPC hardware exceptions : exception vectors defined in PowerPC book 3 */ |
|
| 929 |
#define EXCP_RESET 0x0100 /* System reset */ |
|
| 930 |
#define EXCP_MACHINE_CHECK 0x0200 /* Machine check exception */ |
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| 931 |
#define EXCP_DSI 0x0300 /* Data storage exception */ |
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| 932 |
#define EXCP_DSEG 0x0380 /* Data segment exception */ |
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| 933 |
#define EXCP_ISI 0x0400 /* Instruction storage exception */ |
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| 934 |
#define EXCP_ISEG 0x0480 /* Instruction segment exception */ |
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| 935 |
#define EXCP_EXTERNAL 0x0500 /* External interruption */ |
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| 936 |
#define EXCP_ALIGN 0x0600 /* Alignment exception */ |
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| 937 |
#define EXCP_PROGRAM 0x0700 /* Program exception */ |
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| 938 |
#define EXCP_NO_FP 0x0800 /* Floating point unavailable exception */ |
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| 939 |
#define EXCP_DECR 0x0900 /* Decrementer exception */ |
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| 940 |
#define EXCP_HDECR 0x0980 /* Hypervisor decrementer exception */ |
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| 941 |
#define EXCP_SYSCALL 0x0C00 /* System call */ |
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| 942 |
#define EXCP_TRACE 0x0D00 /* Trace exception */ |
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| 943 |
#define EXCP_PERF 0x0F00 /* Performance monitor exception */ |
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| 944 |
/* Exceptions defined in PowerPC 32 bits programming environment manual */ |
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| 945 |
#define EXCP_FP_ASSIST 0x0E00 /* Floating-point assist */ |
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| 946 |
/* Implementation specific exceptions */ |
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| 947 |
/* 40x exceptions */ |
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| 948 |
#define EXCP_40x_PIT 0x1000 /* Programmable interval timer interrupt */ |
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| 949 |
#define EXCP_40x_FIT 0x1010 /* Fixed interval timer interrupt */ |
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| 950 |
#define EXCP_40x_WATCHDOG 0x1020 /* Watchdog timer exception */ |
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| 951 |
#define EXCP_40x_DTLBMISS 0x1100 /* Data TLB miss exception */ |
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| 952 |
#define EXCP_40x_ITLBMISS 0x1200 /* Instruction TLB miss exception */ |
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| 953 |
#define EXCP_40x_DEBUG 0x2000 /* Debug exception */ |
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| 954 |
/* 405 specific exceptions */ |
|
| 955 |
#define EXCP_405_APU 0x0F20 /* APU unavailable exception */ |
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| 956 |
/* TLB assist exceptions (602/603) */ |
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| 957 |
#define EXCP_I_TLBMISS 0x1000 /* Instruction TLB miss */ |
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| 958 |
#define EXCP_DL_TLBMISS 0x1100 /* Data load TLB miss */ |
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| 959 |
#define EXCP_DS_TLBMISS 0x1200 /* Data store TLB miss */ |
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| 960 |
/* Breakpoint exceptions (602/603/604/620/740/745/750/755...) */ |
|
| 961 |
#define EXCP_IABR 0x1300 /* Instruction address breakpoint */ |
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| 962 |
#define EXCP_SMI 0x1400 /* System management interrupt */ |
|
| 963 |
/* Altivec related exceptions */ |
|
| 964 |
#define EXCP_VPU 0x0F20 /* VPU unavailable exception */ |
|
| 965 |
/* 601 specific exceptions */ |
|
| 966 |
#define EXCP_601_IO 0x0600 /* IO error exception */ |
|
| 967 |
#define EXCP_601_RUNM 0x2000 /* Run mode exception */ |
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| 968 |
/* 602 specific exceptions */ |
|
| 969 |
#define EXCP_602_WATCHDOG 0x1500 /* Watchdog exception */ |
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| 970 |
#define EXCP_602_EMUL 0x1600 /* Emulation trap exception */ |
|
| 971 |
/* G2 specific exceptions */ |
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| 972 |
#define EXCP_G2_CRIT 0x0A00 /* Critical interrupt */ |
|
| 973 |
/* MPC740/745/750 & IBM 750 specific exceptions */ |
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| 974 |
#define EXCP_THRM 0x1700 /* Thermal management interrupt */ |
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| 975 |
/* 74xx specific exceptions */ |
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| 976 |
#define EXCP_74xx_VPUA 0x1600 /* VPU assist exception */ |
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| 977 |
/* 970FX specific exceptions */ |
|
| 978 |
#define EXCP_970_SOFTP 0x1500 /* Soft patch exception */ |
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| 979 |
#define EXCP_970_MAINT 0x1600 /* Maintenance exception */ |
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| 980 |
#define EXCP_970_THRM 0x1800 /* Thermal exception */ |
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| 981 |
#define EXCP_970_VPUA 0x1700 /* VPU assist exception */ |
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| 982 |
/* End of exception vectors area */ |
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| 983 |
#define EXCP_PPC_MAX 0x4000 |
|
| 984 |
/* Qemu exceptions: special cases we want to stop translation */ |
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| 985 |
#define EXCP_MTMSR 0x11000 /* mtmsr instruction: */ |
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| 959 | 986 |
/* may change privilege level */ |
| 960 |
EXCP_BRANCH = 0x108, /* branch instruction */
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EXCP_RFI = 0x10C, /* return from interrupt */
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EXCP_SYSCALL_USER = 0x110, /* System call in user mode only */
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}; |
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| 987 |
#define EXCP_BRANCH 0x11001 /* branch instruction */
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| 988 |
#define EXCP_SYSCALL_USER 0x12000 /* System call in user mode only */
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| 989 |
#define EXCP_INTERRUPT_CRITICAL 0x13000 /* critical IRQ */
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| 990 |
|
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| 964 | 991 |
/* Error codes */ |
| 965 | 992 |
enum {
|
| 966 |
/* Exception subtypes for EXCP_DSI */ |
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| 967 |
EXCP_DSI_TRANSLATE = 0x01, /* Data address can't be translated */ |
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| 968 |
EXCP_DSI_NOTSUP = 0x02, /* Access type not supported */ |
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| 969 |
EXCP_DSI_PROT = 0x03, /* Memory protection violation */ |
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| 970 |
EXCP_DSI_EXTERNAL = 0x04, /* External access disabled */ |
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| 971 |
EXCP_DSI_DABR = 0x05, /* Data address breakpoint */ |
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| 972 |
/* flags for EXCP_DSI */ |
|
| 973 |
EXCP_DSI_DIRECT = 0x10, |
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| 974 |
EXCP_DSI_STORE = 0x20, |
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| 975 |
EXCP_DSI_ECXW = 0x40, |
|
| 976 |
/* Exception subtypes for EXCP_ISI */ |
|
| 977 |
EXCP_ISI_TRANSLATE = 0x01, /* Code address can't be translated */ |
|
| 978 |
EXCP_ISI_NOEXEC = 0x02, /* Try to fetch from a data segment */ |
|
| 979 |
EXCP_ISI_GUARD = 0x03, /* Fetch from guarded memory */ |
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| 980 |
EXCP_ISI_PROT = 0x04, /* Memory protection violation */ |
|
| 981 |
EXCP_ISI_DIRECT = 0x05, /* Trying to fetch from * |
|
| 982 |
* a direct store segment */ |
|
| 983 | 993 |
/* Exception subtypes for EXCP_ALIGN */ |
| 984 | 994 |
EXCP_ALIGN_FP = 0x01, /* FP alignment exception */ |
| 985 | 995 |
EXCP_ALIGN_LST = 0x02, /* Unaligned mult/extern load/store */ |
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