Revision 2be17ebd
| b/hw/fdc.c | ||
|---|---|---|
| 766 | 766 |
return fdctrl; |
| 767 | 767 |
} |
| 768 | 768 |
|
| 769 |
static void fdctrl_handle_tc(void *opaque, int irq, int level) |
|
| 770 |
{
|
|
| 771 |
//fdctrl_t *s = opaque; |
|
| 772 |
|
|
| 773 |
if (level) {
|
|
| 774 |
// XXX |
|
| 775 |
FLOPPY_DPRINTF("TC pulsed\n");
|
|
| 776 |
} |
|
| 777 |
} |
|
| 778 |
|
|
| 769 | 779 |
fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, |
| 770 |
BlockDriverState **fds) |
|
| 780 |
BlockDriverState **fds, qemu_irq *fdc_tc)
|
|
| 771 | 781 |
{
|
| 772 | 782 |
fdctrl_t *fdctrl; |
| 773 | 783 |
int io_mem; |
| ... | ... | |
| 778 | 788 |
fdctrl_mem_write_strict, |
| 779 | 789 |
fdctrl); |
| 780 | 790 |
cpu_register_physical_memory(io_base, 0x08, io_mem); |
| 791 |
*fdc_tc = *qemu_allocate_irqs(fdctrl_handle_tc, fdctrl, 1); |
|
| 781 | 792 |
|
| 782 | 793 |
return fdctrl; |
| 783 | 794 |
} |
| b/hw/fdc.h | ||
|---|---|---|
| 7 | 7 |
target_phys_addr_t io_base, |
| 8 | 8 |
BlockDriverState **fds); |
| 9 | 9 |
fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base, |
| 10 |
BlockDriverState **fds); |
|
| 10 |
BlockDriverState **fds, qemu_irq *fdc_tc);
|
|
| 11 | 11 |
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
| b/hw/slavio_misc.c | ||
|---|---|---|
| 51 | 51 |
uint32_t sysctrl; |
| 52 | 52 |
uint16_t leds; |
| 53 | 53 |
CPUState *env; |
| 54 |
qemu_irq fdc_tc; |
|
| 54 | 55 |
} MiscState; |
| 55 | 56 |
|
| 56 | 57 |
#define MISC_SIZE 1 |
| ... | ... | |
| 66 | 67 |
#define MISC_MDM 0x01b00000 |
| 67 | 68 |
#define MISC_SYS 0x01f00000 |
| 68 | 69 |
|
| 70 |
#define AUX1_TC 0x02 |
|
| 71 |
|
|
| 69 | 72 |
#define AUX2_PWROFF 0x01 |
| 70 | 73 |
#define AUX2_PWRINTCLR 0x02 |
| 71 | 74 |
#define AUX2_PWRFAIL 0x20 |
| ... | ... | |
| 175 | 178 |
MiscState *s = opaque; |
| 176 | 179 |
|
| 177 | 180 |
MISC_DPRINTF("Write aux1 %2.2x\n", val & 0xff);
|
| 181 |
if (val & AUX1_TC) {
|
|
| 182 |
// Send a pulse to floppy terminal count line |
|
| 183 |
if (s->fdc_tc) {
|
|
| 184 |
qemu_irq_raise(s->fdc_tc); |
|
| 185 |
qemu_irq_lower(s->fdc_tc); |
|
| 186 |
} |
|
| 187 |
val &= ~AUX1_TC; |
|
| 188 |
} |
|
| 178 | 189 |
s->aux1 = val & 0xff; |
| 179 | 190 |
} |
| 180 | 191 |
|
| ... | ... | |
| 407 | 418 |
void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, |
| 408 | 419 |
target_phys_addr_t aux1_base, |
| 409 | 420 |
target_phys_addr_t aux2_base, qemu_irq irq, |
| 410 |
CPUState *env) |
|
| 421 |
CPUState *env, qemu_irq **fdc_tc)
|
|
| 411 | 422 |
{
|
| 412 | 423 |
int io; |
| 413 | 424 |
MiscState *s; |
| ... | ... | |
| 462 | 473 |
|
| 463 | 474 |
s->irq = irq; |
| 464 | 475 |
s->env = env; |
| 476 |
*fdc_tc = &s->fdc_tc; |
|
| 465 | 477 |
|
| 466 | 478 |
register_savevm("slavio_misc", base, 1, slavio_misc_save, slavio_misc_load,
|
| 467 | 479 |
s); |
| b/hw/sun4m.c | ||
|---|---|---|
| 376 | 376 |
qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq, |
| 377 | 377 |
*espdma_irq, *ledma_irq; |
| 378 | 378 |
qemu_irq *esp_reset, *le_reset; |
| 379 |
qemu_irq *fdc_tc; |
|
| 379 | 380 |
unsigned long prom_offset, kernel_size; |
| 380 | 381 |
int ret; |
| 381 | 382 |
char buf[1024]; |
| ... | ... | |
| 494 | 495 |
slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], |
| 495 | 496 |
serial_hds[1], serial_hds[0]); |
| 496 | 497 |
|
| 498 |
slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base, |
|
| 499 |
hwdef->aux1_base, hwdef->aux2_base, |
|
| 500 |
slavio_irq[hwdef->me_irq], envs[0], |
|
| 501 |
&fdc_tc); |
|
| 502 |
|
|
| 497 | 503 |
if (hwdef->fd_base != (target_phys_addr_t)-1) {
|
| 498 | 504 |
/* there is zero or one floppy drive */ |
| 499 | 505 |
memset(fd, 0, sizeof(fd)); |
| ... | ... | |
| 501 | 507 |
if (index != -1) |
| 502 | 508 |
fd[0] = drives_table[index].bdrv; |
| 503 | 509 |
|
| 504 |
sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd); |
|
| 510 |
sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, |
|
| 511 |
fdc_tc); |
|
| 505 | 512 |
} |
| 506 | 513 |
|
| 507 | 514 |
if (drive_get_max_bus(IF_SCSI) > 0) {
|
| ... | ... | |
| 520 | 527 |
esp_scsi_attach(main_esp, drives_table[index].bdrv, i); |
| 521 | 528 |
} |
| 522 | 529 |
|
| 523 |
slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base, |
|
| 524 |
hwdef->aux1_base, hwdef->aux2_base, |
|
| 525 |
slavio_irq[hwdef->me_irq], envs[0]); |
|
| 526 | 530 |
if (hwdef->cs_base != (target_phys_addr_t)-1) |
| 527 | 531 |
cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl); |
| 528 | 532 |
|
| ... | ... | |
| 549 | 553 |
void *iommu, *espdma, *ledma, *main_esp, *nvram; |
| 550 | 554 |
qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq; |
| 551 | 555 |
qemu_irq *esp_reset, *le_reset; |
| 556 |
qemu_irq *fdc_tc; |
|
| 552 | 557 |
unsigned long prom_offset, kernel_size; |
| 553 | 558 |
int ret; |
| 554 | 559 |
char buf[1024]; |
| ... | ... | |
| 643 | 648 |
slavio_serial_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], |
| 644 | 649 |
serial_hds[1], serial_hds[0]); |
| 645 | 650 |
|
| 651 |
slavio_misc = slavio_misc_init(-1, hwdef->apc_base, |
|
| 652 |
hwdef->aux1_base, hwdef->aux2_base, |
|
| 653 |
slavio_irq[hwdef->me_irq], env, &fdc_tc); |
|
| 654 |
|
|
| 646 | 655 |
if (hwdef->fd_base != (target_phys_addr_t)-1) {
|
| 647 | 656 |
/* there is zero or one floppy drive */ |
| 648 | 657 |
fd[1] = fd[0] = NULL; |
| ... | ... | |
| 650 | 659 |
if (index != -1) |
| 651 | 660 |
fd[0] = drives_table[index].bdrv; |
| 652 | 661 |
|
| 653 |
sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd); |
|
| 662 |
sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd, |
|
| 663 |
fdc_tc); |
|
| 654 | 664 |
} |
| 655 | 665 |
|
| 656 | 666 |
if (drive_get_max_bus(IF_SCSI) > 0) {
|
| ... | ... | |
| 669 | 679 |
esp_scsi_attach(main_esp, drives_table[index].bdrv, i); |
| 670 | 680 |
} |
| 671 | 681 |
|
| 672 |
slavio_misc = slavio_misc_init(-1, hwdef->apc_base, |
|
| 673 |
hwdef->aux1_base, hwdef->aux2_base, |
|
| 674 |
slavio_irq[hwdef->me_irq], env); |
|
| 675 |
|
|
| 676 | 682 |
kernel_size = sun4m_load_kernel(kernel_filename, kernel_cmdline, |
| 677 | 683 |
initrd_filename); |
| 678 | 684 |
|
| b/hw/sun4m.h | ||
|---|---|---|
| 56 | 56 |
void *slavio_misc_init(target_phys_addr_t base, target_phys_addr_t power_base, |
| 57 | 57 |
target_phys_addr_t aux1_base, |
| 58 | 58 |
target_phys_addr_t aux2_base, qemu_irq irq, |
| 59 |
CPUState *env); |
|
| 59 |
CPUState *env, qemu_irq **fdc_tc);
|
|
| 60 | 60 |
void slavio_set_power_fail(void *opaque, int power_failing); |
| 61 | 61 |
|
| 62 | 62 |
/* cs4231.c */ |
Also available in: Unified diff