Revision 2bece2c8 def-helper.h
| b/def-helper.h | ||
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| 81 | 81 |
#define dh_is_64bit_ptr (TCG_TARGET_REG_BITS == 64) |
| 82 | 82 |
#define dh_is_64bit(t) glue(dh_is_64bit_, dh_alias(t)) |
| 83 | 83 |
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#define dh_is_signed_void 0 |
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#define dh_is_signed_i32 0 |
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#define dh_is_signed_s32 1 |
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#define dh_is_signed_i64 0 |
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#define dh_is_signed_s64 1 |
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#define dh_is_signed_f32 0 |
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#define dh_is_signed_f64 0 |
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#define dh_is_signed_tl 0 |
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#define dh_is_signed_int 1 |
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/* ??? This is highly specific to the host cpu. There are even special |
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extension instructions that may be required, e.g. ia64's addp4. But |
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for now we don't support any 64-bit targets with 32-bit pointers. */ |
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#define dh_is_signed_ptr 0 |
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#define dh_is_signed_env dh_is_signed_ptr |
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#define dh_is_signed(t) dh_is_signed_##t |
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#define dh_sizemask(t, n) \ |
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sizemask |= dh_is_64bit(t) << (n*2); \ |
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sizemask |= dh_is_signed(t) << (n*2+1) |
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| 84 | 104 |
#define dh_arg(t, n) \ |
| 85 | 105 |
args[n - 1] = glue(GET_TCGV_, dh_alias(t))(glue(arg, n)); \ |
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sizemask |= dh_is_64bit(t) << n
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dh_sizemask(t, n)
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| 87 | 107 |
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| 88 | 108 |
#define dh_arg_decl(t, n) glue(TCGv_, dh_alias(t)) glue(arg, n) |
| 89 | 109 |
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| ... | ... | |
| 138 | 158 |
static inline void glue(gen_helper_, name)(dh_retvar_decl(ret) dh_arg_decl(t1, 1)) \ |
| 139 | 159 |
{ \
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| 140 | 160 |
TCGArg args[1]; \ |
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int sizemask; \ |
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sizemask = dh_is_64bit(ret); \
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int sizemask = 0; \
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dh_sizemask(ret, 0); \
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| 143 | 163 |
dh_arg(t1, 1); \ |
| 144 | 164 |
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 1, args); \ |
| 145 | 165 |
} |
| ... | ... | |
| 149 | 169 |
dh_arg_decl(t2, 2)) \ |
| 150 | 170 |
{ \
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| 151 | 171 |
TCGArg args[2]; \ |
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int sizemask; \ |
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sizemask = dh_is_64bit(ret); \
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int sizemask = 0; \
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dh_sizemask(ret, 0); \
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| 154 | 174 |
dh_arg(t1, 1); \ |
| 155 | 175 |
dh_arg(t2, 2); \ |
| 156 | 176 |
tcg_gen_helperN(HELPER(name), flags, sizemask, dh_retvar(ret), 2, args); \ |
| ... | ... | |
| 161 | 181 |
dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \ |
| 162 | 182 |
{ \
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| 163 | 183 |
TCGArg args[3]; \ |
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int sizemask; \ |
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sizemask = dh_is_64bit(ret); \
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int sizemask = 0; \
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dh_sizemask(ret, 0); \
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| 166 | 186 |
dh_arg(t1, 1); \ |
| 167 | 187 |
dh_arg(t2, 2); \ |
| 168 | 188 |
dh_arg(t3, 3); \ |
| ... | ... | |
| 174 | 194 |
dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \ |
| 175 | 195 |
{ \
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| 176 | 196 |
TCGArg args[4]; \ |
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int sizemask; \ |
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sizemask = dh_is_64bit(ret); \
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int sizemask = 0; \
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dh_sizemask(ret, 0); \
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| 179 | 199 |
dh_arg(t1, 1); \ |
| 180 | 200 |
dh_arg(t2, 2); \ |
| 181 | 201 |
dh_arg(t3, 3); \ |
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