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# Date Author Comment
86feb1c8 03/27/2010 12:01 am Richard Henderson

tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.

Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand). For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with...
32d98fbd 03/26/2010 10:52 pm Richard Henderson

tcg: Allow target-specific implementation of NOR.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
9940a96b 03/26/2010 10:44 pm Richard Henderson

tcg: Allow target-specific implementation of NAND.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
8d625cf1 03/26/2010 10:42 pm Richard Henderson

tcg: Allow target-specific implementation of EQV.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
a10f9f4f 03/26/2010 10:29 pm Richard Henderson

tcg: Use not_i32 to implement not_i64.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
c02244a5 03/26/2010 10:29 pm Richard Henderson

tcg: Change TCGType to an enumeration.

The TCGType name was already used consistently. Changing it
to an enumeration instead of a set of defines aids debugging.

Signed-off-by: Aurelien Jarno <>
8a56e840 03/26/2010 10:29 pm Richard Henderson

tcg: Use TCGCond where appropriate.

Use the TCGCond enumeration type in the brcond and setcond
related prototypes in tcg-op.h and each code generator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
a9751609 03/26/2010 10:28 pm Richard Henderson

tcg: Name the opcode enumeration.

Give the enumeration formed from tcg-opc.h a name: TCGOpcode.
Use that enumeration type instead of "int" whereever appropriate.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
dbfff4de 03/15/2010 12:01 am Aurelien Jarno

tcg: declare internal helpers as const and pure

TCG internal helpers only access to the values passed in arguments, and
do not modify the CPU internal state. Thus they can be declared as
const and pure.

Signed-off-by: Aurelien Jarno <>
31d66551 03/14/2010 11:04 pm Aurelien Jarno

tcg: add div/rem 32-bit helpers

Some targets like ARM would benefit to use 32-bit helpers for
div/rem/divu/remu.

Create a #define for div2 so that targets can select between
div, div2 and helper implementation. Use the helper version if none
of the #define are present....
791d1262 02/20/2010 10:33 am Richard Henderson

tcg: Optional target implementation of ORC.

Previously ORC was always implemented by tcg-op.h with
an explicit NOT opcode. Allow a target implementation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
241cbed4 02/20/2010 10:33 am Richard Henderson

tcg: Optional target implementation of ANDC.

Previously ANDC was always implemented by tcg-op.h with
an explicit NOT opcode. Allow a target implementation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
5105c556 02/08/2010 01:10 pm Aurelien Jarno

tcg: move setcond* ops to non-optional section

setcond is not an optional op, move it to the non-optional section.

Signed-off-by: Aurelien Jarno <>
add1e7ea 02/08/2010 01:06 pm Aurelien Jarno

tcg: add setcondi pseudo-op

Signed-off-by: Aurelien Jarno <>
be210acb 02/06/2010 06:14 pm Richard Henderson

tcg: generic support for conditional set

Defines setcond_{i32,i64} and setcond2_i32 for 64-on-32-bit.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
cfc86988 10/04/2009 02:24 pm Aurelien Jarno

tcg: add ext{8,16,32}u_i{32,64} TCG ops

Currently zero extensions ops are implemented by a and op with a
constant. This is then catched in some backend, and replaced by
a zero extension instruction. While this works well on RISC
machines, this adds a useless register move on non-RISC machines....
b348113d 09/16/2009 10:26 pm Stefan Weil

tcg: fix size of local variables in tcg_gen_bswap64_i64

t0, t1 must be 64 bit values, not 32 bit.

Signed-off-by: Stefan Weil <>
Signed-off-by: Aurelien Jarno <>
d9885a0b 07/18/2009 12:32 pm Aurelien Jarno

tcg: Fix tcg_gen_rotr_i64

Reported-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>
864951af 03/29/2009 05:08 pm aurel32

tcg: fix _tl aliases for divu/remu

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6948 c046a42c-6fe2-441c-8c8c-71466251a162
ab36421e 03/29/2009 04:19 am aurel32

tcg: add _tl aliases for div/divu/rem/remu

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6939 c046a42c-6fe2-441c-8c8c-71466251a162
911d79ba 03/13/2009 11:35 am aurel32

tcg: add _tl aliases to bswap16/32/64 TCG ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6833 c046a42c-6fe2-441c-8c8c-71466251a162
9a5c57fd 03/13/2009 11:35 am aurel32

tcg: add bswap16_i64 and bswap32_i64 TCG ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6832 c046a42c-6fe2-441c-8c8c-71466251a162
dfa1a3f1 03/13/2009 11:35 am aurel32

tcg: optimize tcg_gen_bswap16_i32

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6831 c046a42c-6fe2-441c-8c8c-71466251a162
66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
e5105083 03/11/2009 04:57 am aurel32

tcg: fix commit r6805

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6810 c046a42c-6fe2-441c-8c8c-71466251a162
7fc81051 03/10/2009 09:37 pm aurel32

tcg: optimize logical operations

Simplify nand/nor/eqv and move their optimizations to and/or/xor

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6805 c046a42c-6fe2-441c-8c8c-71466251a162
43e860ef 03/10/2009 12:29 pm aurel32

Fix tcg after commit 6800

The introduction of TCGV_EQUAL and not op is slightly broken.
The definition of DEBUG_TCGV shows that.

Signed-off-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6802 c046a42c-6fe2-441c-8c8c-71466251a162
fe75bcf7 03/10/2009 10:57 am aurel32

tcg: use TCGV_EQUAL_I{32,64}

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6800 c046a42c-6fe2-441c-8c8c-71466251a162
c29d0de4 03/10/2009 12:35 am aurel32

tcg: optimize nor(X, Y, Y), used on PPC for not(X, Y)

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6798 c046a42c-6fe2-441c-8c8c-71466251a162
d2604285 03/10/2009 12:35 am aurel32

Implement TCG not ops for x86-64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6797 c046a42c-6fe2-441c-8c8c-71466251a162
d42f183c 03/09/2009 08:50 pm aurel32

Implement TCG rotation ops for x86-64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6795 c046a42c-6fe2-441c-8c8c-71466251a162
a747723b 02/09/2009 10:43 pm aurel32

Fix DEBUG_TCGV compile error.

Don't call TCGV_LOW on arg2. This section of code falls under

Signed-off-by: Nathan Froyd <>
Acked-by: Laurent Desnogues <>
Signed-off-by: Aurelien Jarno <>...
df9247b2 01/01/2009 04:09 pm aurel32

tcg_temp_local_new should take no parameter

This patch removes useless type information in some calls to
tcg_temp_local_new. It also removes the parameter from the
macro declaration; if a target has to use a specific non-default
size then it should use tcg_temp_local_new_{i32,i64}....
1d6198c3 12/13/2008 11:32 am blueswir1

Remove unnecessary trailing newlines

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6000 c046a42c-6fe2-441c-8c8c-71466251a162
49516bc0 12/07/2008 08:15 pm aurel32

Some cleanups after dyngen removal

this patch removes some now unused things after dyngen removal.

1. dyngen-exec.h: op_param, op _jmp and some associated macros
are now unused;
2. Makefile.target: tcg-dyngen is not needed anymore
2. tcg/tcg-op.h, tcg/tcg-opc.h: gen-op.h is dead...
a810a2de 12/07/2008 07:16 pm blueswir1

Some fixes for TCG debugging

This fixes a few things after Paul's improvements for TCG debugging:

- change TCGv_i64 field name to something different from
    TCGv_i32
  - fix things in tcg that the above change made visible.

Signed-off-by: Laurent Desnogues <>...
a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
de3526b2 11/03/2008 03:30 pm pbrook

Fix rotri_i64 typo.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5609 c046a42c-6fe2-441c-8c8c-71466251a162
15824571 11/03/2008 09:08 am aurel32

tcg-ops.h: add rotl/rotli and rotr/rotri TCG instructions

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5607 c046a42c-6fe2-441c-8c8c-71466251a162
f02bb954 11/03/2008 09:08 am aurel32

tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets

Use the same order as the _i32 version (pure code move). Suggested by
Laurent Laurent Desnogues.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
10460c8a 11/02/2008 03:26 pm pbrook

64-bit target subfi fix.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5602 c046a42c-6fe2-441c-8c8c-71466251a162
0045734a 11/02/2008 10:23 am aurel32

tcg-ops.h: add a subfi wrapper

Add a subfi (subtract from immediate) wrapper, useful for the PPC target.

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5599 c046a42c-6fe2-441c-8c8c-71466251a162
6359706f 11/02/2008 10:22 am aurel32

tcg-ops.h: _i64 TCG immediate instructions cleanup

Move addi_i64, muli_i64 and subi_i64 out of #if TCG_TARGET_REG_BITS
as both implementations are strictly identical. Use the same
optimisation (ie when imm == 0) for addi_i64 and subi_64 than the
32-bit version....
bdffd4a9 10/21/2008 02:30 pm aurel32

TCG: add tcg_const_local_tl()

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5504 c046a42c-6fe2-441c-8c8c-71466251a162
f24cb33e 10/21/2008 02:28 pm aurel32

TCG: add logical operations found on alpha and powerpc processors

- andc_i32/i64 t0, t1, t2
- eqv_i32/i64 t0, t1, t2
- nand_i32/i64 t0, t1, t2
- nor_i32/i64 t0, t1, t2
- orc_i32/i64 t0, t1, t2

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5501 c046a42c-6fe2-441c-8c8c-71466251a162
88422e2e 09/24/2008 01:31 am pbrook

Fix tcg_gen_concat32_i64 on 64-bit hosts.

Signed-off-by: Paul Brook <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5306 c046a42c-6fe2-441c-8c8c-71466251a162
945ca823 09/21/2008 09:32 pm blueswir1

Add concat32_i64 and concat_tl_i64 ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5282 c046a42c-6fe2-441c-8c8c-71466251a162
36aa55dc 09/21/2008 04:48 pm pbrook

Add concat_i32_i64 op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
b314f270 05/25/2008 09:21 pm bellard

suppressed unused macro handling

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4580 c046a42c-6fe2-441c-8c8c-71466251a162
bcb0126f 05/24/2008 05:24 am pbrook

More TCGv type fixes.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4553 c046a42c-6fe2-441c-8c8c-71466251a162
cb63669a 05/24/2008 05:22 am pbrook

Fix ARM conditional branch bug.
Add tcg_gen_brcondi.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
e8996ee0 05/23/2008 08:33 pm bellard

added tcg_temp_free() and improved the handling of constants

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4544 c046a42c-6fe2-441c-8c8c-71466251a162
7e4597d7 05/22/2008 07:56 pm bellard

added debug_insn_start debug instruction

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4531 c046a42c-6fe2-441c-8c8c-71466251a162
34151a20 05/22/2008 04:25 pm bellard

small shift opts

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4525 c046a42c-6fe2-441c-8c8c-71466251a162
48d38ca5 05/19/2008 01:50 am ths

Switch most MIPS logical and arithmetic instructions to TCG.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
0b6ce4cf 05/17/2008 03:40 pm bellard

added not pseudo op - more _tl macros

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4468 c046a42c-6fe2-441c-8c8c-71466251a162
390efc54 05/11/2008 05:35 pm pbrook

Add TCG native negation op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
86831435 05/11/2008 03:22 pm pbrook

Add zero extension (pseudo-)ops.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
98156423 05/10/2008 09:43 pm pbrook

Fix DEBUG_TCGV.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4415 c046a42c-6fe2-441c-8c8c-71466251a162
bf6247fb 05/10/2008 03:27 pm blueswir1

Rename CONFIG_NO_DYNGEN_OP to CONFIG_DYNGEN_OP to avoid double negatives

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4412 c046a42c-6fe2-441c-8c8c-71466251a162
f730fd27 05/04/2008 11:14 am ths

Add helpers and shorthands for mul and muli operations.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4319 c046a42c-6fe2-441c-8c8c-71466251a162
4d07272d 05/03/2008 11:52 pm blueswir1

Skip register moves when the target and the source are the same

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4312 c046a42c-6fe2-441c-8c8c-71466251a162
b0109805 03/31/2008 06:47 am pbrook

ARM TCG conversion 9/16.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4146 c046a42c-6fe2-441c-8c8c-71466251a162
6ddbc6e4 03/31/2008 06:46 am pbrook

ARM TCG conversion 7/16.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4144 c046a42c-6fe2-441c-8c8c-71466251a162
e429073d 03/22/2008 10:39 am blueswir1

Add TL variants of trunc and ext/extu

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4099 c046a42c-6fe2-441c-8c8c-71466251a162
cf2be984 03/21/2008 08:03 pm blueswir1

Prepare for op.c removal and zero legacy ops

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4095 c046a42c-6fe2-441c-8c8c-71466251a162
fb50d413 03/21/2008 07:58 pm blueswir1

Make TCG br op available

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4093 c046a42c-6fe2-441c-8c8c-71466251a162
a768e4b2 03/16/2008 09:16 pm blueswir1

Add discard_ptr and discard_tl

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4072 c046a42c-6fe2-441c-8c8c-71466251a162
a98824ac 03/13/2008 10:46 pm blueswir1

Add tcg_const_tl

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4053 c046a42c-6fe2-441c-8c8c-71466251a162
21fc3cfc 03/05/2008 01:52 am pbrook

32-bit host sign extension fix (Juergen Lock).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4017 c046a42c-6fe2-441c-8c8c-71466251a162
0cf767d6 03/02/2008 08:20 pm blueswir1

Add brcond_tl

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4008 c046a42c-6fe2-441c-8c8c-71466251a162
56b8f567 02/25/2008 08:29 pm blueswir1

Fix mixed defines

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3992 c046a42c-6fe2-441c-8c8c-71466251a162
f8422f52 02/24/2008 09:45 am blueswir1

More helper types, rearrange generic definitions

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3988 c046a42c-6fe2-441c-8c8c-71466251a162
7089442c 02/20/2008 08:01 pm blueswir1

Fix andi, optimize addi and subi zero cases

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3985 c046a42c-6fe2-441c-8c8c-71466251a162
5ff9d6a4 02/04/2008 02:37 am bellard

fixed sign extensions - added explicit side effect op flag - added discard instruction

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3963 c046a42c-6fe2-441c-8c8c-71466251a162
ac56dd48 02/03/2008 09:56 pm pbrook

Add TCG variable opaque type.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3961 c046a42c-6fe2-441c-8c8c-71466251a162
c896fe29 02/01/2008 12:05 pm bellard

TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162