Revision 2d48377a hw/omap1.c
| b/hw/omap1.c | ||
|---|---|---|
| 1986 | 1986 |
s->base = base; |
| 1987 | 1987 |
s->fclk = fclk; |
| 1988 | 1988 |
s->irq = irq; |
| 1989 |
#ifdef TARGET_WORDS_BIGENDIAN |
|
| 1989 | 1990 |
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16, |
| 1990 |
chr ?: qemu_chr_open("null", "null", NULL), 1);
|
|
| 1991 |
|
|
| 1991 |
chr ?: qemu_chr_open("null", "null", NULL), 1,
|
|
| 1992 |
1); |
|
| 1993 |
#else |
|
| 1994 |
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16, |
|
| 1995 |
chr ?: qemu_chr_open("null", "null", NULL), 1,
|
|
| 1996 |
0); |
|
| 1997 |
#endif |
|
| 1992 | 1998 |
return s; |
| 1993 | 1999 |
} |
| 1994 | 2000 |
|
| ... | ... | |
| 2101 | 2107 |
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr) |
| 2102 | 2108 |
{
|
| 2103 | 2109 |
/* TODO: Should reuse or destroy current s->serial */ |
| 2110 |
#ifdef TARGET_WORDS_BIGENDIAN |
|
| 2104 | 2111 |
s->serial = serial_mm_init(s->base, 2, s->irq, |
| 2105 |
omap_clk_getrate(s->fclk) / 16, |
|
| 2106 |
chr ?: qemu_chr_open("null", "null", NULL), 1);
|
|
| 2112 |
omap_clk_getrate(s->fclk) / 16, |
|
| 2113 |
chr ?: qemu_chr_open("null", "null", NULL), 1,
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|
| 2114 |
1); |
|
| 2115 |
#else |
|
| 2116 |
s->serial = serial_mm_init(s->base, 2, s->irq, |
|
| 2117 |
omap_clk_getrate(s->fclk) / 16, |
|
| 2118 |
chr ?: qemu_chr_open("null", "null", NULL), 1,
|
|
| 2119 |
0); |
|
| 2120 |
#endif |
|
| 2107 | 2121 |
} |
| 2108 | 2122 |
|
| 2109 | 2123 |
/* MPU Clock/Reset/Power Mode Control */ |
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