Revision 2d48377a hw/serial.c
| b/hw/serial.c | ||
|---|---|---|
| 825 | 825 |
serial_ioport_write(s, addr >> s->it_shift, value & 0xFF); |
| 826 | 826 |
} |
| 827 | 827 |
|
| 828 |
static uint32_t serial_mm_readw(void *opaque, target_phys_addr_t addr) |
|
| 828 |
static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr)
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|
| 829 | 829 |
{
|
| 830 | 830 |
SerialState *s = opaque; |
| 831 | 831 |
uint32_t val; |
| 832 | 832 |
|
| 833 | 833 |
val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF; |
| 834 |
#ifdef TARGET_WORDS_BIGENDIAN |
|
| 835 | 834 |
val = bswap16(val); |
| 836 |
#endif |
|
| 837 | 835 |
return val; |
| 838 | 836 |
} |
| 839 | 837 |
|
| 840 |
static void serial_mm_writew(void *opaque, target_phys_addr_t addr, |
|
| 841 |
uint32_t value) |
|
| 838 |
static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr) |
|
| 842 | 839 |
{
|
| 843 | 840 |
SerialState *s = opaque; |
| 844 |
#ifdef TARGET_WORDS_BIGENDIAN |
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| 841 |
uint32_t val; |
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| 842 |
|
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| 843 |
val = serial_ioport_read(s, addr >> s->it_shift) & 0xFFFF; |
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| 844 |
return val; |
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| 845 |
} |
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| 846 |
|
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| 847 |
static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr, |
|
| 848 |
uint32_t value) |
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| 849 |
{
|
|
| 850 |
SerialState *s = opaque; |
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| 851 |
|
|
| 845 | 852 |
value = bswap16(value); |
| 846 |
#endif |
|
| 847 | 853 |
serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); |
| 848 | 854 |
} |
| 849 | 855 |
|
| 850 |
static uint32_t serial_mm_readl(void *opaque, target_phys_addr_t addr) |
|
| 856 |
static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr, |
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| 857 |
uint32_t value) |
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| 858 |
{
|
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| 859 |
SerialState *s = opaque; |
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| 860 |
|
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| 861 |
serial_ioport_write(s, addr >> s->it_shift, value & 0xFFFF); |
|
| 862 |
} |
|
| 863 |
|
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| 864 |
static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr) |
|
| 851 | 865 |
{
|
| 852 | 866 |
SerialState *s = opaque; |
| 853 | 867 |
uint32_t val; |
| 854 | 868 |
|
| 855 | 869 |
val = serial_ioport_read(s, addr >> s->it_shift); |
| 856 |
#ifdef TARGET_WORDS_BIGENDIAN |
|
| 857 | 870 |
val = bswap32(val); |
| 858 |
#endif |
|
| 859 | 871 |
return val; |
| 860 | 872 |
} |
| 861 | 873 |
|
| 862 |
static void serial_mm_writel(void *opaque, target_phys_addr_t addr, |
|
| 863 |
uint32_t value) |
|
| 874 |
static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr) |
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| 875 |
{
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| 876 |
SerialState *s = opaque; |
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| 877 |
uint32_t val; |
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| 878 |
|
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| 879 |
val = serial_ioport_read(s, addr >> s->it_shift); |
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| 880 |
return val; |
|
| 881 |
} |
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| 882 |
|
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| 883 |
static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr, |
|
| 884 |
uint32_t value) |
|
| 864 | 885 |
{
|
| 865 | 886 |
SerialState *s = opaque; |
| 866 |
#ifdef TARGET_WORDS_BIGENDIAN |
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| 887 |
|
|
| 867 | 888 |
value = bswap32(value); |
| 868 |
#endif |
|
| 869 | 889 |
serial_ioport_write(s, addr >> s->it_shift, value); |
| 870 | 890 |
} |
| 871 | 891 |
|
| 872 |
static CPUReadMemoryFunc * const serial_mm_read[] = {
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|
| 892 |
static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr, |
|
| 893 |
uint32_t value) |
|
| 894 |
{
|
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| 895 |
SerialState *s = opaque; |
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| 896 |
|
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| 897 |
serial_ioport_write(s, addr >> s->it_shift, value); |
|
| 898 |
} |
|
| 899 |
|
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| 900 |
static CPUReadMemoryFunc * const serial_mm_read_be[] = {
|
|
| 873 | 901 |
&serial_mm_readb, |
| 874 |
&serial_mm_readw, |
|
| 875 |
&serial_mm_readl, |
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| 902 |
&serial_mm_readw_be,
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| 903 |
&serial_mm_readl_be,
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|
| 876 | 904 |
}; |
| 877 | 905 |
|
| 878 |
static CPUWriteMemoryFunc * const serial_mm_write[] = {
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| 906 |
static CPUWriteMemoryFunc * const serial_mm_write_be[] = {
|
|
| 879 | 907 |
&serial_mm_writeb, |
| 880 |
&serial_mm_writew, |
|
| 881 |
&serial_mm_writel, |
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| 908 |
&serial_mm_writew_be, |
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| 909 |
&serial_mm_writel_be, |
|
| 910 |
}; |
|
| 911 |
|
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| 912 |
static CPUReadMemoryFunc * const serial_mm_read_le[] = {
|
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| 913 |
&serial_mm_readb, |
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| 914 |
&serial_mm_readw_le, |
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| 915 |
&serial_mm_readl_le, |
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| 916 |
}; |
|
| 917 |
|
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| 918 |
static CPUWriteMemoryFunc * const serial_mm_write_le[] = {
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| 919 |
&serial_mm_writeb, |
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| 920 |
&serial_mm_writew_le, |
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| 921 |
&serial_mm_writel_le, |
|
| 882 | 922 |
}; |
| 883 | 923 |
|
| 884 | 924 |
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, |
| 885 | 925 |
qemu_irq irq, int baudbase, |
| 886 |
CharDriverState *chr, int ioregister) |
|
| 926 |
CharDriverState *chr, int ioregister, |
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| 927 |
int be) |
|
| 887 | 928 |
{
|
| 888 | 929 |
SerialState *s; |
| 889 | 930 |
int s_io_memory; |
| ... | ... | |
| 899 | 940 |
vmstate_register(base, &vmstate_serial, s); |
| 900 | 941 |
|
| 901 | 942 |
if (ioregister) {
|
| 902 |
s_io_memory = cpu_register_io_memory(serial_mm_read, |
|
| 903 |
serial_mm_write, s); |
|
| 943 |
if (be) {
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| 944 |
s_io_memory = cpu_register_io_memory(serial_mm_read_be, |
|
| 945 |
serial_mm_write_be, s); |
|
| 946 |
} else {
|
|
| 947 |
s_io_memory = cpu_register_io_memory(serial_mm_read_le, |
|
| 948 |
serial_mm_write_le, s); |
|
| 949 |
} |
|
| 904 | 950 |
cpu_register_physical_memory(base, 8 << it_shift, s_io_memory); |
| 905 | 951 |
} |
| 906 | 952 |
serial_update_msl(s); |
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