Revision 2ee73ac3 target-i386/cpu.h

b/target-i386/cpu.h
143 143
#define CR0_MP_MASK  (1 << 1)
144 144
#define CR0_EM_MASK  (1 << 2)
145 145
#define CR0_TS_MASK  (1 << 3)
146
#define CR0_ET_MASK  (1 << 4)
146 147
#define CR0_NE_MASK  (1 << 5)
147 148
#define CR0_WP_MASK  (1 << 16)
148 149
#define CR0_AM_MASK  (1 << 18)
......
373 374
int cpu_x86_exec(CPUX86State *s);
374 375
void cpu_x86_close(CPUX86State *s);
375 376
int cpu_get_pic_interrupt(CPUX86State *s);
377
/* MSDOS compatibility mode FPU exception support */
378
void cpu_set_ferr(CPUX86State *s);
376 379

  
377 380
/* this function must always be used to load data in the segment
378 381
   cache: it synchronizes the hflags with the segment cache values */

Also available in: Unified diff