Revision 2ee73ac3 target-i386/helper.c

b/target-i386/helper.c
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#if 0
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#define raise_exception_err(a, b)\
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do {\
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    printf("raise_exception line=%d\n", __LINE__);\
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    fprintf(logfile, "raise_exception line=%d\n", __LINE__);\
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    (raise_exception_err)(a, b);\
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} while (0)
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#endif
......
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    if (loglevel & (CPU_LOG_PCALL | CPU_LOG_INT)) {
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        if ((env->cr[0] & CR0_PE_MASK)) {
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            static int count;
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            fprintf(logfile, "%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:%08x SP=%04x:%08x",
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            fprintf(logfile, "%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:%08x pc=%08x SP=%04x:%08x",
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                    count, intno, error_code, is_int,
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                    env->hflags & HF_CPL_MASK,
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                    env->segs[R_CS].selector, EIP,
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                    (int)env->segs[R_CS].base + EIP,
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                    env->segs[R_SS].selector, ESP);
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            if (intno == 0x0e) {
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                fprintf(logfile, " CR2=%08x", env->cr[2]);
......
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    helper_fstt(ST0, (uint8_t *)A0);
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}
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void fpu_set_exception(int mask)
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{
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    env->fpus |= mask;
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    if (env->fpus & (~env->fpuc & FPUC_EM))
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        env->fpus |= FPUS_SE | FPUS_B;
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}
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CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b)
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{
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    if (b == 0.0) 
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        fpu_set_exception(FPUS_ZE);
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    return a / b;
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}
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void fpu_raise_exception(void)
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{
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    if (env->cr[0] & CR0_NE_MASK) {
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        raise_exception(EXCP10_COPR);
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    } 
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#if !defined(CONFIG_USER_ONLY) 
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    else {
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        cpu_set_ferr(env);
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    }
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#endif
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}
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/* BCD ops */
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void helper_fbld_ST0_A0(void)

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