Revision 2f172849 hw/lsi53c895a.c

b/hw/lsi53c895a.c
189 189
    uint32_t script_ram_base;
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    int carry; /* ??? Should this be an a visible register somewhere?  */
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    int sense;
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    int status;
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    /* Action to take at the end of a MSG IN phase.
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       0 = COMMAND, 1 = disconnect, 2 = DATA OUT, 3 = DATA IN.  */
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    int msg_action;
......
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    out = (s->sstat1 & PHASE_MASK) == PHASE_DO;
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    if (reason == SCSI_REASON_DONE) {
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        DPRINTF("Command complete sense=%d\n", (int)arg);
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        s->sense = arg;
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        DPRINTF("Command complete status=%d\n", (int)arg);
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        s->status = arg;
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        s->command_complete = 2;
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        if (s->waiting && s->dbc != 0) {
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            /* Raise phase mismatch for short transfers.  */
......
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static void lsi_do_status(LSIState *s)
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{
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    uint8_t sense;
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    DPRINTF("Get status len=%d sense=%d\n", s->dbc, s->sense);
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    uint8_t status;
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    DPRINTF("Get status len=%d status=%d\n", s->dbc, s->status);
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    if (s->dbc != 1)
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        BADF("Bad Status move\n");
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    s->dbc = 1;
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    sense = s->sense;
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    s->sfbr = sense;
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    cpu_physical_memory_write(s->dnad, &sense, 1);
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    status = s->status;
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    s->sfbr = status;
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    cpu_physical_memory_write(s->dnad, &status, 1);
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    lsi_set_phase(s, PHASE_MI);
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    s->msg_action = 1;
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    lsi_add_msg_byte(s, 0); /* COMMAND COMPLETE */
......
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        VMSTATE_PCI_DEVICE(dev, LSIState),
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        VMSTATE_INT32(carry, LSIState),
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        VMSTATE_INT32(sense, LSIState),
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        VMSTATE_INT32(status, LSIState),
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        VMSTATE_INT32(msg_action, LSIState),
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        VMSTATE_INT32(msg_len, LSIState),
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        VMSTATE_BUFFER(msg, LSIState),

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