Revision 2fa11da0 target-i386/helper.c
| b/target-i386/helper.c | ||
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| 28 | 28 |
#include "qemu-common.h" |
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#include "kvm.h" |
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#include "kvm_x86.h" |
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#ifndef CONFIG_USER_ONLY |
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#include "sysemu.h" |
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#endif |
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|
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//#define DEBUG_MMU |
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|
| ... | ... | |
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prev_debug_excp_handler(env); |
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} |
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/* This should come from sysemu.h - if we could include it here... */ |
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void qemu_system_reset_request(void); |
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static void qemu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status, |
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uint64_t mcg_status, uint64_t addr, uint64_t misc) |
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static void |
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qemu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status, |
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uint64_t mcg_status, uint64_t addr, uint64_t misc) |
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{
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uint64_t mcg_cap = cenv->mcg_cap; |
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uint64_t *banks = cenv->mce_banks; |
| ... | ... | |
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* reporting is disabled |
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*/ |
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if ((status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) && |
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cenv->mcg_ctl != ~(uint64_t)0) |
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cenv->mcg_ctl != ~(uint64_t)0) {
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|
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return; |
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} |
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banks += 4 * bank; |
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/* |
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* if MSR_MCi_CTL is not all 1s, the uncorrected error |
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* reporting is disabled for the bank |
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*/ |
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if ((status & MCI_STATUS_UC) && banks[0] != ~(uint64_t)0) |
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if ((status & MCI_STATUS_UC) && banks[0] != ~(uint64_t)0) {
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|
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return; |
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} |
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if (status & MCI_STATUS_UC) {
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if ((cenv->mcg_status & MCG_STATUS_MCIP) || |
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!(cenv->cr[4] & CR4_MCE_MASK)) {
|
| ... | ... | |
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qemu_system_reset_request(); |
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return; |
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} |
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if (banks[1] & MCI_STATUS_VAL) |
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if (banks[1] & MCI_STATUS_VAL) {
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status |= MCI_STATUS_OVER; |
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} |
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banks[2] = addr; |
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banks[3] = misc; |
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cenv->mcg_status = mcg_status; |
| ... | ... | |
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cpu_interrupt(cenv, CPU_INTERRUPT_MCE); |
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} else if (!(banks[1] & MCI_STATUS_VAL) |
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|| !(banks[1] & MCI_STATUS_UC)) {
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if (banks[1] & MCI_STATUS_VAL) |
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if (banks[1] & MCI_STATUS_VAL) {
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status |= MCI_STATUS_OVER; |
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} |
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banks[2] = addr; |
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banks[3] = misc; |
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banks[1] = status; |
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} else |
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} else {
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banks[1] |= MCI_STATUS_OVER; |
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} |
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} |
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void cpu_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
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void cpu_x86_inject_mce(CPUState *cenv, int bank, uint64_t status,
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uint64_t mcg_status, uint64_t addr, uint64_t misc, |
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int broadcast) |
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{
|
| ... | ... | |
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static void mce_init(CPUX86State *cenv) |
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{
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unsigned int bank, bank_num;
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unsigned int bank; |
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if (((cenv->cpuid_version >> 8)&0xf) >= 6 |
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&& (cenv->cpuid_features&(CPUID_MCE|CPUID_MCA)) == (CPUID_MCE|CPUID_MCA)) {
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if (((cenv->cpuid_version >> 8) & 0xf) >= 6 |
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&& (cenv->cpuid_features & (CPUID_MCE | CPUID_MCA)) == |
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(CPUID_MCE | CPUID_MCA)) {
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cenv->mcg_cap = MCE_CAP_DEF | MCE_BANKS_DEF; |
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cenv->mcg_ctl = ~(uint64_t)0; |
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bank_num = MCE_BANKS_DEF;
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for (bank = 0; bank < bank_num; bank++)
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cenv->mce_banks[bank*4] = ~(uint64_t)0;
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for (bank = 0; bank < MCE_BANKS_DEF; bank++) {
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cenv->mce_banks[bank * 4] = ~(uint64_t)0;
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}
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} |
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} |
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