Revision 3023f332 hw/omap_lcdc.c
b/hw/omap_lcdc.c | ||
---|---|---|
24 | 24 |
struct omap_lcd_panel_s { |
25 | 25 |
qemu_irq irq; |
26 | 26 |
DisplayState *state; |
27 |
QEMUConsole *console; |
|
28 | 27 |
ram_addr_t imif_base; |
29 | 28 |
ram_addr_t emiff_base; |
30 | 29 |
|
... | ... | |
174 | 173 |
width = omap_lcd->width; |
175 | 174 |
if (width != ds_get_width(omap_lcd->state) || |
176 | 175 |
omap_lcd->height != ds_get_height(omap_lcd->state)) { |
177 |
qemu_console_resize(omap_lcd->console,
|
|
176 |
qemu_console_resize(omap_lcd->state,
|
|
178 | 177 |
omap_lcd->width, omap_lcd->height); |
179 | 178 |
omap_lcd->invalidate = 1; |
180 | 179 |
} |
... | ... | |
472 | 471 |
} |
473 | 472 |
|
474 | 473 |
struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq, |
475 |
struct omap_dma_lcd_channel_s *dma, DisplayState *ds,
|
|
474 |
struct omap_dma_lcd_channel_s *dma, |
|
476 | 475 |
ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk) |
477 | 476 |
{ |
478 | 477 |
int iomemtype; |
... | ... | |
481 | 480 |
|
482 | 481 |
s->irq = irq; |
483 | 482 |
s->dma = dma; |
484 |
s->state = ds; |
|
485 | 483 |
s->imif_base = imif_base; |
486 | 484 |
s->emiff_base = emiff_base; |
487 | 485 |
omap_lcdc_reset(s); |
... | ... | |
490 | 488 |
omap_lcdc_writefn, s); |
491 | 489 |
cpu_register_physical_memory(base, 0x100, iomemtype); |
492 | 490 |
|
493 |
s->console = graphic_console_init(ds, omap_update_display,
|
|
494 |
omap_invalidate_display,
|
|
495 |
omap_screen_dump, NULL, s);
|
|
491 |
s->state = graphic_console_init(omap_update_display,
|
|
492 |
omap_invalidate_display, |
|
493 |
omap_screen_dump, NULL, s); |
|
496 | 494 |
|
497 | 495 |
return s; |
498 | 496 |
} |
Also available in: Unified diff