Revision 30724e75

b/target-mips/mips-defs.h
8 8 
#define TARGET_PAGE_BITS 12
9 9 
#define MIPS_TLB_MAX 128
10 10 

  		





  11
  
  
    
/* ??? MIPS64 no doubt has a larger address space.  */


  		





  12
  
  
    
#define TARGET_PHYS_ADDR_SPACE_BITS 32


  		





  13
  
  
    
#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  14
  
  
    

  		





  15
  11
  
    
#if defined(TARGET_MIPS64)


  		





  16
  12
  
    
#define TARGET_LONG_BITS 64


  		





  
  13
  
    
#define TARGET_PHYS_ADDR_SPACE_BITS 36


  		





  
  14
  
    
#define TARGET_VIRT_ADDR_SPACE_BITS 42


  		





  17
  15
  
    
#else


  		





  18
  16
  
    
#define TARGET_LONG_BITS 32


  		





  
  17
  
    
#define TARGET_PHYS_ADDR_SPACE_BITS 36


  		





  
  18
  
    
#define TARGET_VIRT_ADDR_SPACE_BITS 32


  		





  19
  19
  
    
#endif


  		





  20
  20
  
    

  		





  21
  21
  
    
/* Masks used to mark instructions to indicate which ISA level they


  		












Also available in:
  Unified diff