Revision 3125f763
| b/cpu-all.h | ||
|---|---|---|
| 837 | 837 |
#define CPU_INTERRUPT_SIPI CPU_INTERRUPT_TGT_INT_2 |
| 838 | 838 |
#define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4 |
| 839 | 839 |
|
| 840 |
/* The set of all bits that should be masked when single-stepping. */ |
|
| 841 |
#define CPU_INTERRUPT_SSTEP_MASK \ |
|
| 842 |
(CPU_INTERRUPT_HARD \ |
|
| 843 |
| CPU_INTERRUPT_TGT_EXT_0 \ |
|
| 844 |
| CPU_INTERRUPT_TGT_EXT_1 \ |
|
| 845 |
| CPU_INTERRUPT_TGT_EXT_2 \ |
|
| 846 |
| CPU_INTERRUPT_TGT_EXT_3 \ |
|
| 847 |
| CPU_INTERRUPT_TGT_EXT_4) |
|
| 840 | 848 |
|
| 841 | 849 |
#ifndef CONFIG_USER_ONLY |
| 842 | 850 |
typedef void (*CPUInterruptHandler)(CPUState *, int); |
| b/cpu-exec.c | ||
|---|---|---|
| 360 | 360 |
if (unlikely(interrupt_request)) {
|
| 361 | 361 |
if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {
|
| 362 | 362 |
/* Mask out external interrupts for this step. */ |
| 363 |
interrupt_request &= ~(CPU_INTERRUPT_HARD | |
|
| 364 |
CPU_INTERRUPT_FIQ | |
|
| 365 |
CPU_INTERRUPT_SMI | |
|
| 366 |
CPU_INTERRUPT_NMI); |
|
| 363 |
interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; |
|
| 367 | 364 |
} |
| 368 | 365 |
if (interrupt_request & CPU_INTERRUPT_DEBUG) {
|
| 369 | 366 |
env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |
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