tcg: add div/rem 32-bit helpers
Some targets like ARM would benefit to use 32-bit helpers fordiv/rem/divu/remu.
Create a #define for div2 so that targets can select betweendiv, div2 and helper implementation. Use the helper version if noneof the #define are present....
Remove TLB from userspace
Remove TLB from userspace CPU structure.
Signed-off-by: Paul Brook <paul@codesourcery.com>
tcg: Add comments for all optional instructions not implemented.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg-x86_64: implement setcond
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/x86_64: Avoid unnecessary REX.B prefixes.
The existing P_REXB internal opcode flag unconditionally emitsthe REX prefix. Technically it's not needed if the register inquestion is %al, %bl, %cl, %dl.
Eliding the prefix requires splitting the P_REXB flag into two,...
tcg/x86_64: Special-case all 32-bit AND operands.
This avoids an unnecessary REX.W prefix when dealing with ANDoperands that fit into a 32-bit quantity. The most common changeactually seen is movz[wb]q -> movz[wb]l.
Similarly, avoid REXW in ext{8,16}u_i64 tcg opcodes....
tcg/ppc64,x86_64: fix constraints of op_qemu_st64
This op only takes two arguments, not two.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/x86_64: add support for ext{8,16,32}u_i{32,64} TCG ops
tcg/x86_64: generated dec/inc instead of sub/add when possible
X86_64: Use proper jumps/calls when displacement exceeds +-2G
Signed-off-by: malc <av1474@comtv.ru>
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