Revision 3475187d cpu-exec.c

b/cpu-exec.c
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    longjmp(env->jmp_env, 1);
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}
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#endif
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#ifndef TARGET_SPARC
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#define reg_T2
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#endif
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/* exit the current TB from a signal handler. The host registers are
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   restored in a state compatible with the CPU emulator
......
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int cpu_exec(CPUState *env1)
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{
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    int saved_T0, saved_T1, saved_T2;
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    int saved_T0, saved_T1;
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#if defined(reg_T2)
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    int saved_T2;
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#endif
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    CPUState *saved_env;
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#if defined(TARGET_I386)
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#ifdef reg_EAX
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    int saved_EAX;
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#endif
......
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#ifdef reg_EDI
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    int saved_EDI;
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#endif
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#elif defined(TARGET_SPARC)
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#if defined(reg_REGWPTR)
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    uint32_t *saved_regwptr;
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#endif
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#endif
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#ifdef __sparc__
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    int saved_i7, tmp_T0;
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#endif
......
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    env = env1;
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    saved_T0 = T0;
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    saved_T1 = T1;
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#if defined(reg_T2)
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    saved_T2 = T2;
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#endif
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#ifdef __sparc__
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    /* we also save i7 because longjmp may not restore it */
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    asm volatile ("mov %%i7, %0" : "=r" (saved_i7));
......
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        env->cpsr = psr & ~CACHED_CPSR_BITS;
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    }
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#elif defined(TARGET_SPARC)
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#if defined(reg_REGWPTR)
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    saved_regwptr = REGWPTR;
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#endif
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#elif defined(TARGET_PPC)
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#else
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#error unsupported target CPU
......
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                    cpu_dump_state(env, logfile, fprintf, 0);
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                    env->cpsr &= ~CACHED_CPSR_BITS;
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#elif defined(TARGET_SPARC)
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                    cpu_dump_state (env, logfile, fprintf, 0);
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		    REGWPTR = env->regbase + (env->cwp * 16);
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		    env->regwptr = REGWPTR;
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                    cpu_dump_state(env, logfile, fprintf, 0);
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#elif defined(TARGET_PPC)
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                    cpu_dump_state(env, logfile, fprintf, 0);
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#else
......
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                cs_base = 0;
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                pc = env->regs[15];
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#elif defined(TARGET_SPARC)
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                flags = 0;
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#ifdef TARGET_SPARC64
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                flags = (env->pstate << 2) | ((env->lsu & (DMMU_E | IMMU_E)) >> 2);
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#else
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                flags = env->psrs | ((env->mmuregs[0] & (MMU_E | MMU_NF)) << 1);
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#endif
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                cs_base = env->npc;
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                pc = env->pc;
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#elif defined(TARGET_PPC)
......
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    env->cpsr = compute_cpsr();
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    /* XXX: Save/restore host fpu exception state?.  */
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#elif defined(TARGET_SPARC)
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#if defined(reg_REGWPTR)
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    REGWPTR = saved_regwptr;
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#endif
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#elif defined(TARGET_PPC)
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#else
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#error unsupported target CPU
......
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#endif
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    T0 = saved_T0;
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    T1 = saved_T1;
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#if defined(reg_T2)
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    T2 = saved_T2;
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#endif
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    env = saved_env;
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    return ret;
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}

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