Revision 3475187d target-sparc/op.c

b/target-sparc/op.c
46 46
#define REG (env->gregs[7])
47 47
#include "op_template.h"
48 48
#define REGNAME i0
49
#define REG (env->regwptr[16])
49
#define REG (REGWPTR[16])
50 50
#include "op_template.h"
51 51
#define REGNAME i1
52
#define REG (env->regwptr[17])
52
#define REG (REGWPTR[17])
53 53
#include "op_template.h"
54 54
#define REGNAME i2
55
#define REG (env->regwptr[18])
55
#define REG (REGWPTR[18])
56 56
#include "op_template.h"
57 57
#define REGNAME i3
58
#define REG (env->regwptr[19])
58
#define REG (REGWPTR[19])
59 59
#include "op_template.h"
60 60
#define REGNAME i4
61
#define REG (env->regwptr[20])
61
#define REG (REGWPTR[20])
62 62
#include "op_template.h"
63 63
#define REGNAME i5
64
#define REG (env->regwptr[21])
64
#define REG (REGWPTR[21])
65 65
#include "op_template.h"
66 66
#define REGNAME i6
67
#define REG (env->regwptr[22])
67
#define REG (REGWPTR[22])
68 68
#include "op_template.h"
69 69
#define REGNAME i7
70
#define REG (env->regwptr[23])
70
#define REG (REGWPTR[23])
71 71
#include "op_template.h"
72 72
#define REGNAME l0
73
#define REG (env->regwptr[8])
73
#define REG (REGWPTR[8])
74 74
#include "op_template.h"
75 75
#define REGNAME l1
76
#define REG (env->regwptr[9])
76
#define REG (REGWPTR[9])
77 77
#include "op_template.h"
78 78
#define REGNAME l2
79
#define REG (env->regwptr[10])
79
#define REG (REGWPTR[10])
80 80
#include "op_template.h"
81 81
#define REGNAME l3
82
#define REG (env->regwptr[11])
82
#define REG (REGWPTR[11])
83 83
#include "op_template.h"
84 84
#define REGNAME l4
85
#define REG (env->regwptr[12])
85
#define REG (REGWPTR[12])
86 86
#include "op_template.h"
87 87
#define REGNAME l5
88
#define REG (env->regwptr[13])
88
#define REG (REGWPTR[13])
89 89
#include "op_template.h"
90 90
#define REGNAME l6
91
#define REG (env->regwptr[14])
91
#define REG (REGWPTR[14])
92 92
#include "op_template.h"
93 93
#define REGNAME l7
94
#define REG (env->regwptr[15])
94
#define REG (REGWPTR[15])
95 95
#include "op_template.h"
96 96
#define REGNAME o0
97
#define REG (env->regwptr[0])
97
#define REG (REGWPTR[0])
98 98
#include "op_template.h"
99 99
#define REGNAME o1
100
#define REG (env->regwptr[1])
100
#define REG (REGWPTR[1])
101 101
#include "op_template.h"
102 102
#define REGNAME o2
103
#define REG (env->regwptr[2])
103
#define REG (REGWPTR[2])
104 104
#include "op_template.h"
105 105
#define REGNAME o3
106
#define REG (env->regwptr[3])
106
#define REG (REGWPTR[3])
107 107
#include "op_template.h"
108 108
#define REGNAME o4
109
#define REG (env->regwptr[4])
109
#define REG (REGWPTR[4])
110 110
#include "op_template.h"
111 111
#define REGNAME o5
112
#define REG (env->regwptr[5])
112
#define REG (REGWPTR[5])
113 113
#include "op_template.h"
114 114
#define REGNAME o6
115
#define REG (env->regwptr[6])
115
#define REG (REGWPTR[6])
116 116
#include "op_template.h"
117 117
#define REGNAME o7
118
#define REG (env->regwptr[7])
118
#define REG (REGWPTR[7])
119 119
#include "op_template.h"
120 120

  
121 121
#define REGNAME f0
......
215 215
#define REG (env->fpr[31])
216 216
#include "fop_template.h"
217 217

  
218
#ifdef TARGET_SPARC64
219
#define REGNAME f32
220
#define REG (env->fpr[32])
221
#include "fop_template.h"
222
#define REGNAME f34
223
#define REG (env->fpr[34])
224
#include "fop_template.h"
225
#define REGNAME f36
226
#define REG (env->fpr[36])
227
#include "fop_template.h"
228
#define REGNAME f38
229
#define REG (env->fpr[38])
230
#include "fop_template.h"
231
#define REGNAME f40
232
#define REG (env->fpr[40])
233
#include "fop_template.h"
234
#define REGNAME f42
235
#define REG (env->fpr[42])
236
#include "fop_template.h"
237
#define REGNAME f44
238
#define REG (env->fpr[44])
239
#include "fop_template.h"
240
#define REGNAME f46
241
#define REG (env->fpr[46])
242
#include "fop_template.h"
243
#define REGNAME f48
244
#define REG (env->fpr[47])
245
#include "fop_template.h"
246
#define REGNAME f50
247
#define REG (env->fpr[50])
248
#include "fop_template.h"
249
#define REGNAME f52
250
#define REG (env->fpr[52])
251
#include "fop_template.h"
252
#define REGNAME f54
253
#define REG (env->fpr[54])
254
#include "fop_template.h"
255
#define REGNAME f56
256
#define REG (env->fpr[56])
257
#include "fop_template.h"
258
#define REGNAME f58
259
#define REG (env->fpr[58])
260
#include "fop_template.h"
261
#define REGNAME f60
262
#define REG (env->fpr[60])
263
#include "fop_template.h"
264
#define REGNAME f62
265
#define REG (env->fpr[62])
266
#include "fop_template.h"
267
#endif
268

  
269
#ifdef TARGET_SPARC64
270
#undef JUMP_TB
271
#define JUMP_TB(opname, tbparam, n, eip)	\
272
    do {					\
273
	GOTO_TB(opname, tbparam, n);		\
274
	T0 = (long)(tbparam) + (n);		\
275
	env->pc = (eip) & 0xffffffff;		\
276
	EXIT_TB();				\
277
    } while (0)
278

  
279
#ifdef WORDS_BIGENDIAN
280
typedef union UREG64 {
281
    struct { uint16_t v3, v2, v1, v0; } w;
282
    struct { uint32_t v1, v0; } l;
283
    uint64_t q;
284
} UREG64;
285
#else
286
typedef union UREG64 {
287
    struct { uint16_t v0, v1, v2, v3; } w;
288
    struct { uint32_t v0, v1; } l;
289
    uint64_t q;
290
} UREG64;
291
#endif
292

  
293
#define PARAMQ1 \
294
({\
295
    UREG64 __p;\
296
    __p.l.v1 = PARAM1;\
297
    __p.l.v0 = PARAM2;\
298
    __p.q;\
299
}) 
300

  
301
void OPPROTO op_movq_T0_im64(void)
302
{
303
    T0 = PARAMQ1;
304
}
305

  
306
void OPPROTO op_movq_T1_im64(void)
307
{
308
    T1 = PARAMQ1;
309
}
310

  
311
#define XFLAG_SET(x) ((env->xcc&x)?1:0)
312

  
313
#else
218 314
#define EIP (env->pc)
315
#endif
219 316

  
220 317
#define FLAG_SET(x) ((env->psr&x)?1:0)
221
#define FFLAG_SET(x) ((env->fsr&x)?1:0)
222 318

  
223 319
void OPPROTO op_movl_T0_0(void)
224 320
{
......
227 323

  
228 324
void OPPROTO op_movl_T0_im(void)
229 325
{
230
    T0 = PARAM1;
326
    T0 = (uint32_t)PARAM1;
231 327
}
232 328

  
233 329
void OPPROTO op_movl_T1_im(void)
234 330
{
235
    T1 = PARAM1;
331
    T1 = (uint32_t)PARAM1;
236 332
}
237 333

  
238 334
void OPPROTO op_movl_T2_im(void)
239 335
{
240
    T2 = PARAM1;
336
    T2 = (uint32_t)PARAM1;
337
}
338

  
339
void OPPROTO op_movl_T0_sim(void)
340
{
341
    T0 = (int32_t)PARAM1;
342
}
343

  
344
void OPPROTO op_movl_T1_sim(void)
345
{
346
    T1 = (int32_t)PARAM1;
347
}
348

  
349
void OPPROTO op_movl_T2_sim(void)
350
{
351
    T2 = (int32_t)PARAM1;
352
}
353

  
354
void OPPROTO op_movl_T0_env(void)
355
{
356
    T0 = *(uint32_t *)((char *)env + PARAM1);
357
}
358

  
359
void OPPROTO op_movl_env_T0(void)
360
{
361
    *(uint32_t *)((char *)env + PARAM1) = T0;
362
}
363

  
364
void OPPROTO op_movtl_T0_env(void)
365
{
366
    T0 = *(target_ulong *)((char *)env + PARAM1);
367
}
368

  
369
void OPPROTO op_movtl_env_T0(void)
370
{
371
    *(target_ulong *)((char *)env + PARAM1) = T0;
241 372
}
242 373

  
243 374
void OPPROTO op_add_T1_T0(void)
......
252 383
    src1 = T0;
253 384
    T0 += T1;
254 385
    env->psr = 0;
386
#ifdef TARGET_SPARC64
387
    if (!(T0 & 0xffffffff))
388
	env->psr |= PSR_ZERO;
389
    if ((int32_t) T0 < 0)
390
	env->psr |= PSR_NEG;
391
    if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
392
	env->psr |= PSR_CARRY;
393
    if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
394
	 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
395
	env->psr |= PSR_OVF;
396

  
397
    env->xcc = 0;
398
    if (!T0)
399
	env->xcc |= PSR_ZERO;
400
    if ((int64_t) T0 < 0)
401
	env->xcc |= PSR_NEG;
402
    if (T0 < src1)
403
	env->xcc |= PSR_CARRY;
404
    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63))
405
	env->xcc |= PSR_OVF;
406
#else
255 407
    if (!T0)
256 408
	env->psr |= PSR_ZERO;
257 409
    if ((int32_t) T0 < 0)
......
260 412
	env->psr |= PSR_CARRY;
261 413
    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
262 414
	env->psr |= PSR_OVF;
263
    /* V9 xcc */
415
#endif
264 416
    FORCE_RET();
265 417
}
266 418

  
......
276 428
    src1 = T0;
277 429
    T0 += T1 + FLAG_SET(PSR_CARRY);
278 430
    env->psr = 0;
431
#ifdef TARGET_SPARC64
432
    if (!(T0 & 0xffffffff))
433
	env->psr |= PSR_ZERO;
434
    if ((int32_t) T0 < 0)
435
	env->psr |= PSR_NEG;
436
    if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
437
	env->psr |= PSR_CARRY;
438
    if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff) ^ -1) &
439
	 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
440
	env->psr |= PSR_OVF;
441

  
442
    env->xcc = 0;
443
    if (!T0)
444
	env->xcc |= PSR_ZERO;
445
    if ((int64_t) T0 < 0)
446
	env->xcc |= PSR_NEG;
447
    if (T0 < src1)
448
	env->xcc |= PSR_CARRY;
449
    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1ULL << 63))
450
	env->xcc |= PSR_OVF;
451
#else
279 452
    if (!T0)
280 453
	env->psr |= PSR_ZERO;
281 454
    if ((int32_t) T0 < 0)
......
284 457
	env->psr |= PSR_CARRY;
285 458
    if (((src1 ^ T1 ^ -1) & (src1 ^ T0)) & (1 << 31))
286 459
	env->psr |= PSR_OVF;
287
    /* V9 xcc */
460
#endif
288 461
    FORCE_RET();
289 462
}
290 463

  
......
300 473
    src1 = T0;
301 474
    T0 -= T1;
302 475
    env->psr = 0;
476
#ifdef TARGET_SPARC64
477
    if (!(T0 & 0xffffffff))
478
	env->psr |= PSR_ZERO;
479
    if ((int32_t) T0 < 0)
480
	env->psr |= PSR_NEG;
481
    if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
482
	env->psr |= PSR_CARRY;
483
    if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
484
	 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
485
	env->psr |= PSR_OVF;
486

  
487
    env->xcc = 0;
488
    if (!T0)
489
	env->xcc |= PSR_ZERO;
490
    if ((int64_t) T0 < 0)
491
	env->xcc |= PSR_NEG;
492
    if (T0 < src1)
493
	env->xcc |= PSR_CARRY;
494
    if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63))
495
	env->xcc |= PSR_OVF;
496
#else
303 497
    if (!T0)
304 498
	env->psr |= PSR_ZERO;
305 499
    if ((int32_t) T0 < 0)
......
308 502
	env->psr |= PSR_CARRY;
309 503
    if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
310 504
	env->psr |= PSR_OVF;
311
    /* V9 xcc */
505
#endif
312 506
    FORCE_RET();
313 507
}
314 508

  
......
324 518
    src1 = T0;
325 519
    T0 -= T1 + FLAG_SET(PSR_CARRY);
326 520
    env->psr = 0;
521
#ifdef TARGET_SPARC64
522
    if (!(T0 & 0xffffffff))
523
	env->psr |= PSR_ZERO;
524
    if ((int32_t) T0 < 0)
525
	env->psr |= PSR_NEG;
526
    if ((T0 & 0xffffffff) < (src1 & 0xffffffff))
527
	env->psr |= PSR_CARRY;
528
    if ((((src1 & 0xffffffff) ^ (T1 & 0xffffffff)) &
529
	 ((src1 & 0xffffffff) ^ (T0 & 0xffffffff))) & (1 << 31))
530
	env->psr |= PSR_OVF;
531

  
532
    env->xcc = 0;
533
    if (!T0)
534
	env->xcc |= PSR_ZERO;
535
    if ((int64_t) T0 < 0)
536
	env->xcc |= PSR_NEG;
537
    if (T0 < src1)
538
	env->xcc |= PSR_CARRY;
539
    if (((src1 ^ T1) & (src1 ^ T0)) & (1ULL << 63))
540
	env->xcc |= PSR_OVF;
541
#else
327 542
    if (!T0)
328 543
	env->psr |= PSR_ZERO;
329 544
    if ((int32_t) T0 < 0)
......
332 547
	env->psr |= PSR_CARRY;
333 548
    if (((src1 ^ T1) & (src1 ^ T0)) & (1 << 31))
334 549
	env->psr |= PSR_OVF;
335
    /* V9 xcc */
550
#endif
336 551
    FORCE_RET();
337 552
}
338 553

  
......
449 664
void OPPROTO op_div_cc(void)
450 665
{
451 666
    env->psr = 0;
667
#ifdef TARGET_SPARC64
668
    if (!T0)
669
	env->psr |= PSR_ZERO;
670
    if ((int32_t) T0 < 0)
671
	env->psr |= PSR_NEG;
672
    if (T1)
673
	env->psr |= PSR_OVF;
674

  
675
    env->xcc = 0;
676
    if (!T0)
677
	env->xcc |= PSR_ZERO;
678
    if ((int64_t) T0 < 0)
679
	env->xcc |= PSR_NEG;
680
#else
452 681
    if (!T0)
453 682
	env->psr |= PSR_ZERO;
454 683
    if ((int32_t) T0 < 0)
455 684
	env->psr |= PSR_NEG;
456 685
    if (T1)
457 686
	env->psr |= PSR_OVF;
458
    /* V9 xcc */
687
#endif
459 688
    FORCE_RET();
460 689
}
461 690

  
691
#ifdef TARGET_SPARC64
692
void OPPROTO op_mulx_T1_T0(void)
693
{
694
    T0 *= T1;
695
    FORCE_RET();
696
}
697

  
698
void OPPROTO op_udivx_T1_T0(void)
699
{
700
    T0 /= T1;
701
    FORCE_RET();
702
}
703

  
704
void OPPROTO op_sdivx_T1_T0(void)
705
{
706
    if (T0 == INT64_MIN && T1 == -1)
707
	T0 = INT64_MIN;
708
    else
709
	T0 /= (target_long) T1;
710
    FORCE_RET();
711
}
712
#endif
713

  
462 714
void OPPROTO op_logic_T0_cc(void)
463 715
{
464 716
    env->psr = 0;
717
#ifdef TARGET_SPARC64
718
    if (!(T0 & 0xffffffff))
719
	env->psr |= PSR_ZERO;
720
    if ((int32_t) T0 < 0)
721
	env->psr |= PSR_NEG;
722

  
723
    env->xcc = 0;
724
    if (!T0)
725
	env->xcc |= PSR_ZERO;
726
    if ((int64_t) T0 < 0)
727
	env->xcc |= PSR_NEG;
728
#else
465 729
    if (!T0)
466 730
	env->psr |= PSR_ZERO;
467 731
    if ((int32_t) T0 < 0)
468 732
	env->psr |= PSR_NEG;
469
    /* V9 xcc */
733
#endif
470 734
    FORCE_RET();
471 735
}
472 736

  
......
475 739
    T0 <<= T1;
476 740
}
477 741

  
742
#ifdef TARGET_SPARC64
743
void OPPROTO op_srl(void)
744
{
745
    T0 = (T0 & 0xffffffff) >> T1;
746
}
747

  
748
void OPPROTO op_srlx(void)
749
{
750
    T0 >>= T1;
751
}
752

  
753
void OPPROTO op_sra(void)
754
{
755
    T0 = ((int32_t) (T0 & 0xffffffff)) >> T1;
756
}
757

  
758
void OPPROTO op_srax(void)
759
{
760
    T0 = ((int64_t) T0) >> T1;
761
}
762
#else
478 763
void OPPROTO op_srl(void)
479 764
{
480 765
    T0 >>= T1;
......
484 769
{
485 770
    T0 = ((int32_t) T0) >> T1;
486 771
}
772
#endif
487 773

  
488 774
/* Load and store */
489 775
#define MEMSUFFIX _raw
......
498 784

  
499 785
void OPPROTO op_ldfsr(void)
500 786
{
501
    env->fsr = *((uint32_t *) &FT0);
787
    PUT_FSR32(env, *((uint32_t *) &FT0));
502 788
    helper_ldfsr();
503 789
}
504 790

  
505 791
void OPPROTO op_stfsr(void)
506 792
{
507
    *((uint32_t *) &FT0) = env->fsr;
793
    *((uint32_t *) &FT0) = GET_FSR32(env);
508 794
}
509 795

  
510
void OPPROTO op_wry(void)
796
#ifndef TARGET_SPARC64
797
void OPPROTO op_rdpsr(void)
511 798
{
512
    env->y = T0;
799
    do_rdpsr();
513 800
}
514 801

  
515
void OPPROTO op_rdy(void)
802
void OPPROTO op_wrpsr(void)
516 803
{
517
    T0 = env->y;
804
    do_wrpsr();
805
    FORCE_RET();
518 806
}
519 807

  
520
void OPPROTO op_rdwim(void)
808
void OPPROTO op_rett(void)
521 809
{
522
    T0 = env->wim;
810
    helper_rett();
811
    FORCE_RET();
523 812
}
524 813

  
525
void OPPROTO op_wrwim(void)
814
/* XXX: use another pointer for %iN registers to avoid slow wrapping
815
   handling ? */
816
void OPPROTO op_save(void)
526 817
{
527
    env->wim = T0;
818
    uint32_t cwp;
819
    cwp = (env->cwp - 1) & (NWINDOWS - 1); 
820
    if (env->wim & (1 << cwp)) {
821
        raise_exception(TT_WIN_OVF);
822
    }
823
    set_cwp(cwp);
528 824
    FORCE_RET();
529 825
}
530 826

  
531
void OPPROTO op_rdpsr(void)
827
void OPPROTO op_restore(void)
532 828
{
533
    do_rdpsr();
829
    uint32_t cwp;
830
    cwp = (env->cwp + 1) & (NWINDOWS - 1); 
831
    if (env->wim & (1 << cwp)) {
832
        raise_exception(TT_WIN_UNF);
833
    }
834
    set_cwp(cwp);
835
    FORCE_RET();
836
}
837
#else
838
void OPPROTO op_rdccr(void)
839
{
840
    T0 = GET_CCR(env);
534 841
}
535 842

  
536
void OPPROTO op_wrpsr(void)
843
void OPPROTO op_wrccr(void)
537 844
{
538
    do_wrpsr();
539
    FORCE_RET();
845
    PUT_CCR(env, T0);
540 846
}
541 847

  
542
void OPPROTO op_rdtbr(void)
848
void OPPROTO op_rdtick(void)
543 849
{
544
    T0 = env->tbr;
850
    T0 = 0; // XXX read cycle counter and bit 31
545 851
}
546 852

  
547
void OPPROTO op_wrtbr(void)
853
void OPPROTO op_wrtick(void)
548 854
{
549
    env->tbr = T0;
550
    FORCE_RET();
855
    // XXX write cycle counter and bit 31
551 856
}
552 857

  
553
void OPPROTO op_rett(void)
858
void OPPROTO op_rdtpc(void)
554 859
{
555
    helper_rett();
556
    FORCE_RET();
860
    T0 = env->tpc[env->tl];
861
}
862

  
863
void OPPROTO op_wrtpc(void)
864
{
865
    env->tpc[env->tl] = T0;
866
}
867

  
868
void OPPROTO op_rdtnpc(void)
869
{
870
    T0 = env->tnpc[env->tl];
871
}
872

  
873
void OPPROTO op_wrtnpc(void)
874
{
875
    env->tnpc[env->tl] = T0;
876
}
877

  
878
void OPPROTO op_rdtstate(void)
879
{
880
    T0 = env->tstate[env->tl];
881
}
882

  
883
void OPPROTO op_wrtstate(void)
884
{
885
    env->tstate[env->tl] = T0;
886
}
887

  
888
void OPPROTO op_rdtt(void)
889
{
890
    T0 = env->tt[env->tl];
891
}
892

  
893
void OPPROTO op_wrtt(void)
894
{
895
    env->tt[env->tl] = T0;
896
}
897

  
898
void OPPROTO op_rdpstate(void)
899
{
900
    T0 = env->pstate;
901
}
902

  
903
void OPPROTO op_wrpstate(void)
904
{
905
    env->pstate = T0 & 0x1f;
906
}
907

  
908
// CWP handling is reversed in V9, but we still use the V8 register
909
// order.
910
void OPPROTO op_rdcwp(void)
911
{
912
    T0 = NWINDOWS - 1 - env->cwp;
913
}
914

  
915
void OPPROTO op_wrcwp(void)
916
{
917
    env->cwp = NWINDOWS - 1 - T0;
557 918
}
558 919

  
559 920
/* XXX: use another pointer for %iN registers to avoid slow wrapping
......
562 923
{
563 924
    uint32_t cwp;
564 925
    cwp = (env->cwp - 1) & (NWINDOWS - 1); 
565
    if (env->wim & (1 << cwp)) {
566
        raise_exception(TT_WIN_OVF);
926
    if (env->cansave == 0) {
927
        raise_exception(TT_SPILL | (env->otherwin != 0 ? 
928
				    (TT_WOTHER | ((env->wstate & 0x38) >> 1)):
929
				    ((env->wstate & 0x7) << 2)));
930
    } else {
931
	if (env->cleanwin - env->canrestore == 0) {
932
	    // XXX Clean windows without trap
933
	    raise_exception(TT_CLRWIN);
934
	} else {
935
	    env->cansave--;
936
	    env->canrestore++;
937
	    set_cwp(cwp);
938
	}
567 939
    }
568
    set_cwp(cwp);
569 940
    FORCE_RET();
570 941
}
571 942

  
......
573 944
{
574 945
    uint32_t cwp;
575 946
    cwp = (env->cwp + 1) & (NWINDOWS - 1); 
576
    if (env->wim & (1 << cwp)) {
577
        raise_exception(TT_WIN_UNF);
947
    if (env->canrestore == 0) {
948
        raise_exception(TT_FILL | (env->otherwin != 0 ? 
949
				   (TT_WOTHER | ((env->wstate & 0x38) >> 1)):
950
				   ((env->wstate & 0x7) << 2)));
951
    } else {
952
	env->cansave++;
953
	env->canrestore--;
954
	set_cwp(cwp);
578 955
    }
579
    set_cwp(cwp);
580 956
    FORCE_RET();
581 957
}
958
#endif
582 959

  
583 960
void OPPROTO op_exception(void)
584 961
{
......
629 1006
    EXIT_TB();
630 1007
}
631 1008

  
1009
void OPPROTO op_eval_ba(void)
1010
{
1011
    T2 = 1;
1012
}
1013

  
632 1014
void OPPROTO op_eval_be(void)
633 1015
{
634 1016
    T2 = FLAG_SET(PSR_ZERO);
......
665 1047
    T2 = FLAG_SET(PSR_OVF);
666 1048
}
667 1049

  
1050
void OPPROTO op_eval_bn(void)
1051
{
1052
    T2 = 0;
1053
}
1054

  
668 1055
void OPPROTO op_eval_bneg(void)
669 1056
{
670 1057
    T2 = FLAG_SET(PSR_NEG);
......
711 1098
    T2 = !FLAG_SET(PSR_OVF);
712 1099
}
713 1100

  
714
/* FCC1:FCC0: 0 =, 1 <, 2 >, 3 u */
1101
#ifdef TARGET_SPARC64
1102
void OPPROTO op_eval_xbe(void)
1103
{
1104
    T2 = XFLAG_SET(PSR_ZERO);
1105
}
715 1106

  
716
void OPPROTO op_eval_fbne(void)
1107
void OPPROTO op_eval_xble(void)
717 1108
{
718
// !0
719
    T2 = (env->fsr & (FSR_FCC1 | FSR_FCC0)); /* L or G or U */
1109
    target_ulong Z = XFLAG_SET(PSR_ZERO), N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1110
    
1111
    T2 = Z | (N ^ V);
720 1112
}
721 1113

  
722
void OPPROTO op_eval_fblg(void)
1114
void OPPROTO op_eval_xbl(void)
723 1115
{
724
// 1 or 2
725
    T2 = FFLAG_SET(FSR_FCC0) ^ FFLAG_SET(FSR_FCC1);
1116
    target_ulong N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1117

  
1118
    T2 = N ^ V;
726 1119
}
727 1120

  
728
void OPPROTO op_eval_fbul(void)
1121
void OPPROTO op_eval_xbleu(void)
729 1122
{
730
// 1 or 3
731
    T2 = FFLAG_SET(FSR_FCC0);
1123
    target_ulong Z = XFLAG_SET(PSR_ZERO), C = XFLAG_SET(PSR_CARRY);
1124

  
1125
    T2 = C | Z;
732 1126
}
733 1127

  
734
void OPPROTO op_eval_fbl(void)
1128
void OPPROTO op_eval_xbcs(void)
735 1129
{
736
// 1
737
    T2 = FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1);
1130
    T2 = XFLAG_SET(PSR_CARRY);
738 1131
}
739 1132

  
740
void OPPROTO op_eval_fbug(void)
1133
void OPPROTO op_eval_xbvs(void)
741 1134
{
742
// 2 or 3
743
    T2 = FFLAG_SET(FSR_FCC1);
1135
    T2 = XFLAG_SET(PSR_OVF);
744 1136
}
745 1137

  
746
void OPPROTO op_eval_fbg(void)
1138
void OPPROTO op_eval_xbneg(void)
747 1139
{
748
// 2
749
    T2 = !FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1);
1140
    T2 = XFLAG_SET(PSR_NEG);
750 1141
}
751 1142

  
752
void OPPROTO op_eval_fbu(void)
1143
void OPPROTO op_eval_xbne(void)
753 1144
{
754
// 3
755
    T2 = FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1);
1145
    T2 = !XFLAG_SET(PSR_ZERO);
756 1146
}
757 1147

  
758
void OPPROTO op_eval_fbe(void)
1148
void OPPROTO op_eval_xbg(void)
759 1149
{
760
// 0
761
    T2 = !FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1);
1150
    target_ulong Z = XFLAG_SET(PSR_ZERO), N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1151

  
1152
    T2 = !(Z | (N ^ V));
762 1153
}
763 1154

  
764
void OPPROTO op_eval_fbue(void)
1155
void OPPROTO op_eval_xbge(void)
765 1156
{
766
// 0 or 3
767
    T2 = !(FFLAG_SET(FSR_FCC1) ^ FFLAG_SET(FSR_FCC0));
768
    FORCE_RET();
1157
    target_ulong N = XFLAG_SET(PSR_NEG), V = XFLAG_SET(PSR_OVF);
1158

  
1159
    T2 = !(N ^ V);
1160
}
1161

  
1162
void OPPROTO op_eval_xbgu(void)
1163
{
1164
    target_ulong Z = XFLAG_SET(PSR_ZERO), C = XFLAG_SET(PSR_CARRY);
1165

  
1166
    T2 = !(C | Z);
1167
}
1168

  
1169
void OPPROTO op_eval_xbcc(void)
1170
{
1171
    T2 = !XFLAG_SET(PSR_CARRY);
1172
}
1173

  
1174
void OPPROTO op_eval_xbpos(void)
1175
{
1176
    T2 = !XFLAG_SET(PSR_NEG);
1177
}
1178

  
1179
void OPPROTO op_eval_xbvc(void)
1180
{
1181
    T2 = !XFLAG_SET(PSR_OVF);
1182
}
1183
#endif
1184

  
1185
#define FCC
1186
#define FFLAG_SET(x) (env->fsr & x? 1: 0)
1187
#include "fbranch_template.h"
1188

  
1189
#ifdef TARGET_SPARC64
1190
#define FCC _fcc1
1191
#define FFLAG_SET(x) ((env->fsr & ((uint64_t)x >> 32))? 1: 0)
1192
#include "fbranch_template.h"
1193
#define FCC _fcc2
1194
#define FFLAG_SET(x) ((env->fsr & ((uint64_t)x >> 34))? 1: 0)
1195
#include "fbranch_template.h"
1196
#define FCC _fcc3
1197
#define FFLAG_SET(x) ((env->fsr & ((uint64_t)x >> 36))? 1: 0)
1198
#include "fbranch_template.h"
1199
#endif
1200

  
1201
#ifdef TARGET_SPARC64
1202
void OPPROTO op_eval_brz(void)
1203
{
1204
    T2 = T0;
769 1205
}
770 1206

  
771
void OPPROTO op_eval_fbge(void)
1207
void OPPROTO op_eval_brnz(void)
772 1208
{
773
// 0 or 2
774
    T2 = !FFLAG_SET(FSR_FCC0);
1209
    T2 = !T0;
775 1210
}
776 1211

  
777
void OPPROTO op_eval_fbuge(void)
1212
void OPPROTO op_eval_brlz(void)
778 1213
{
779
// !1
780
    T2 = !(FFLAG_SET(FSR_FCC0) & !FFLAG_SET(FSR_FCC1));
1214
    T2 = ((int64_t)T0 < 0);
781 1215
}
782 1216

  
783
void OPPROTO op_eval_fble(void)
1217
void OPPROTO op_eval_brlez(void)
784 1218
{
785
// 0 or 1
786
    T2 = !FFLAG_SET(FSR_FCC1);
1219
    T2 = ((int64_t)T0 <= 0);
787 1220
}
788 1221

  
789
void OPPROTO op_eval_fbule(void)
1222
void OPPROTO op_eval_brgz(void)
790 1223
{
791
// !2
792
    T2 = !(!FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1));
1224
    T2 = ((int64_t)T0 > 0);
793 1225
}
794 1226

  
795
void OPPROTO op_eval_fbo(void)
1227
void OPPROTO op_eval_brgez(void)
796 1228
{
797
// !3
798
    T2 = !(FFLAG_SET(FSR_FCC0) & FFLAG_SET(FSR_FCC1));
1229
    T2 = ((int64_t)T0 >= 0);
799 1230
}
800 1231

  
1232
void OPPROTO op_jmp_im64(void)
1233
{
1234
    env->pc = PARAMQ1;
1235
}
1236

  
1237
void OPPROTO op_movq_npc_im64(void)
1238
{
1239
    env->npc = PARAMQ1;
1240
}
1241
#endif
1242

  
801 1243
void OPPROTO op_jmp_im(void)
802 1244
{
803
    env->pc = PARAM1;
1245
    env->pc = (uint32_t)PARAM1;
804 1246
}
805 1247

  
806 1248
void OPPROTO op_movl_npc_im(void)
807 1249
{
808
    env->npc = PARAM1;
1250
    env->npc = (uint32_t)PARAM1;
809 1251
}
810 1252

  
811 1253
void OPPROTO op_movl_npc_T0(void)
......
826 1268

  
827 1269
void OPPROTO op_branch(void)
828 1270
{
829
    env->npc = PARAM3; /* XXX: optimize */
1271
    env->npc = (uint32_t)PARAM3; /* XXX: optimize */
830 1272
    JUMP_TB(op_branch, PARAM1, 0, PARAM2);
831 1273
}
832 1274

  
833 1275
void OPPROTO op_branch2(void)
834 1276
{
835 1277
    if (T2) {
836
        env->npc = PARAM2 + 4; 
1278
        env->npc = (uint32_t)PARAM2 + 4; 
837 1279
        JUMP_TB(op_branch2, PARAM1, 0, PARAM2);
838 1280
    } else {
839
        env->npc = PARAM3 + 4; 
1281
        env->npc = (uint32_t)PARAM3 + 4; 
840 1282
        JUMP_TB(op_branch2, PARAM1, 1, PARAM3);
841 1283
    }
842 1284
    FORCE_RET();
......
845 1287
void OPPROTO op_branch_a(void)
846 1288
{
847 1289
    if (T2) {
848
	env->npc = PARAM2; /* XXX: optimize */
1290
	env->npc = (uint32_t)PARAM2; /* XXX: optimize */
849 1291
        JUMP_TB(op_branch_a, PARAM1, 0, PARAM3);
850 1292
    } else {
851
	env->npc = PARAM3 + 8; /* XXX: optimize */
1293
	env->npc = (uint32_t)PARAM3 + 8; /* XXX: optimize */
852 1294
        JUMP_TB(op_branch_a, PARAM1, 1, PARAM3 + 4);
853 1295
    }
854 1296
    FORCE_RET();
......
857 1299
void OPPROTO op_generic_branch(void)
858 1300
{
859 1301
    if (T2) {
860
	env->npc = PARAM1;
1302
	env->npc = (uint32_t)PARAM1;
861 1303
    } else {
862
	env->npc = PARAM2;
1304
	env->npc = (uint32_t)PARAM2;
863 1305
    }
864 1306
    FORCE_RET();
865 1307
}
......
879 1321
    do_fabss();
880 1322
}
881 1323

  
1324
#ifdef TARGET_SPARC64
1325
void OPPROTO op_fnegd(void)
1326
{
1327
    DT0 = -DT1;
1328
}
1329

  
1330
void OPPROTO op_fabsd(void)
1331
{
1332
    do_fabsd();
1333
}
1334
#endif
1335

  
882 1336
void OPPROTO op_fsqrts(void)
883 1337
{
884 1338
    do_fsqrts();
......
944 1398
    do_fcmpd();
945 1399
}
946 1400

  
1401
#ifdef TARGET_SPARC64
1402
void OPPROTO op_fcmps_fcc1(void)
1403
{
1404
    do_fcmps_fcc1();
1405
}
1406

  
1407
void OPPROTO op_fcmpd_fcc1(void)
1408
{
1409
    do_fcmpd_fcc1();
1410
}
1411

  
1412
void OPPROTO op_fcmps_fcc2(void)
1413
{
1414
    do_fcmps_fcc2();
1415
}
1416

  
1417
void OPPROTO op_fcmpd_fcc2(void)
1418
{
1419
    do_fcmpd_fcc2();
1420
}
1421

  
1422
void OPPROTO op_fcmps_fcc3(void)
1423
{
1424
    do_fcmps_fcc3();
1425
}
1426

  
1427
void OPPROTO op_fcmpd_fcc3(void)
1428
{
1429
    do_fcmpd_fcc3();
1430
}
1431
#endif
1432

  
947 1433
#ifdef USE_INT_TO_FLOAT_HELPERS
948 1434
void OPPROTO op_fitos(void)
949 1435
{
......
964 1450
{
965 1451
    DT0 = (double) *((int32_t *)&FT1);
966 1452
}
1453

  
1454
#ifdef TARGET_SPARC64
1455
void OPPROTO op_fxtos(void)
1456
{
1457
    FT0 = (float) *((int64_t *)&DT1);
1458
}
1459

  
1460
void OPPROTO op_fxtod(void)
1461
{
1462
    DT0 = (double) *((int64_t *)&DT1);
1463
}
1464
#endif
967 1465
#endif
968 1466

  
969 1467
void OPPROTO op_fdtos(void)
......
986 1484
    *((int32_t *)&FT0) = (int32_t) DT1;
987 1485
}
988 1486

  
1487
#ifdef TARGET_SPARC64
1488
void OPPROTO op_fstox(void)
1489
{
1490
    *((int64_t *)&DT0) = (int64_t) FT1;
1491
}
1492

  
1493
void OPPROTO op_fdtox(void)
1494
{
1495
    *((int64_t *)&DT0) = (int64_t) DT1;
1496
}
1497

  
1498
void OPPROTO op_fmovs_cc(void)
1499
{
1500
    if (T2)
1501
	FT0 = FT1;
1502
}
1503

  
1504
void OPPROTO op_fmovd_cc(void)
1505
{
1506
    if (T2)
1507
	DT0 = DT1;
1508
}
1509

  
1510
void OPPROTO op_mov_cc(void)
1511
{
1512
    if (T2)
1513
	T0 = T1;
1514
}
1515

  
1516
void OPPROTO op_flushw(void)
1517
{
1518
    if (env->cansave != NWINDOWS - 2) {
1519
        raise_exception(TT_SPILL | (env->otherwin != 0 ? 
1520
				    (TT_WOTHER | ((env->wstate & 0x38) >> 1)):
1521
				    ((env->wstate & 0x7) << 2)));
1522
    }
1523
}
1524

  
1525
void OPPROTO op_saved(void)
1526
{
1527
    env->cansave++;
1528
    if (env->otherwin == 0)
1529
	env->canrestore--;
1530
}
1531

  
1532
void OPPROTO op_restored(void)
1533
{
1534
    env->canrestore++;
1535
    if (env->cleanwin < NWINDOWS - 1)
1536
	env->cleanwin++;
1537
    if (env->otherwin == 0)
1538
	env->cansave--;
1539
    else
1540
	env->otherwin--;
1541
}
1542

  
1543
void OPPROTO op_popc(void)
1544
{
1545
    do_popc();
1546
}
1547

  
1548
void OPPROTO op_done(void)
1549
{
1550
    env->pc = env->tnpc[env->tl];
1551
    env->npc = env->tnpc[env->tl] + 4;
1552
    env->pstate = env->tstate[env->tl];
1553
    env->tl--;
1554
}
1555

  
1556
void OPPROTO op_retry(void)
1557
{
1558
    env->pc = env->tpc[env->tl];
1559
    env->npc = env->tnpc[env->tl];
1560
    env->pstate = env->tstate[env->tl];
1561
    env->tl--;
1562
}
1563

  
1564
void OPPROTO op_sir(void)
1565
{
1566
    // XXX
1567

  
1568
}
1569

  
1570
void OPPROTO op_ld_asi_reg()
1571
{
1572
    T0 += PARAM1;
1573
    helper_ld_asi(env->asi, PARAM2, PARAM3);
1574
}
1575

  
1576
void OPPROTO op_st_asi_reg()
1577
{
1578
    T0 += PARAM1;
1579
    helper_st_asi(env->asi, PARAM2, PARAM3);
1580
}
1581
#endif
1582

  
989 1583
void OPPROTO op_ld_asi()
990 1584
{
991 1585
    helper_ld_asi(PARAM1, PARAM2, PARAM3);

Also available in: Unified diff