Revision 355b1943 cpu-defs.h
| b/cpu-defs.h | ||
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| 76 | 76 |
#define CPU_TLB_BITS 8 |
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#define CPU_TLB_SIZE (1 << CPU_TLB_BITS) |
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#if TARGET_PHYS_ADDR_BITS == 32 && TARGET_LONG_BITS == 32
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#if HOST_LONG_BITS == 32 && TARGET_LONG_BITS == 32
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#define CPU_TLB_ENTRY_BITS 4 |
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#else |
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#define CPU_TLB_ENTRY_BITS 5 |
| ... | ... | |
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target_ulong addr_read; |
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target_ulong addr_write; |
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target_ulong addr_code; |
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/* Addend to virtual address to get physical address. IO accesses
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/* Addend to virtual address to get host address. IO accesses
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use the corresponding iotlb value. */ |
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#if TARGET_PHYS_ADDR_BITS == 64 |
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/* on i386 Linux make sure it is aligned */ |
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target_phys_addr_t addend __attribute__((aligned(8))); |
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#else |
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target_phys_addr_t addend; |
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#endif |
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unsigned long addend; |
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/* padding to get a power of two size */ |
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uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) - |
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(sizeof(target_ulong) * 3 + |
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((-sizeof(target_ulong) * 3) & (sizeof(target_phys_addr_t) - 1)) +
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sizeof(target_phys_addr_t))];
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((-sizeof(target_ulong) * 3) & (sizeof(unsigned long) - 1)) +
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sizeof(unsigned long))];
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} CPUTLBEntry; |
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extern int CPUTLBEntry_wrong_size[sizeof(CPUTLBEntry) == (1 << CPU_TLB_ENTRY_BITS) ? 1 : -1]; |
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#define CPU_COMMON_TLB \ |
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/* The meaning of the MMU modes is defined in the target code. */ \ |
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CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ |
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