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  arm
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  ia64
  mips
  ppc
  ppc64
  s390
  sparc
  x86_64
LICENSE 146 Bytes
README 14 kB
TODO 394 Bytes
tcg-op.h 70.2 kB
tcg-opc.h 9 kB
tcg-runtime.h 706 Bytes
tcg.c 63.7 kB
tcg.h 14.5 kB

Latest revisions

# Date Author Comment
355b1943 04/05/2010 02:28 am Paul Brook

Split TLB addend and target_phys_addr_t

Historically the qemu tlb "addend" field was used for both RAM and IO accesses,
so needed to be able to hold both host addresses (unsigned long) and guest
physical addresses (target_phys_addr_t). However since the introduction of...

36368cf0 04/04/2010 07:36 pm malc

tcg/ppc: Fix not_i32

Thanks to Alexander Graf for bug report and a good reproducible test
case.

Signed-off-by: malc <>

a18f844f 04/01/2010 11:00 pm Aurelien Jarno

tcg/TODO: remove setcond

Signed-off-by: Aurelien Jarno <>

477ba620 04/01/2010 10:51 pm Aurelien Jarno

tcg: initial ia64 support

A few words about design choices:
  • On IA64, instructions should be grouped by bundle, and dependencies
    between instructions declared. A first version of this code tried to
    schedule instructions automatically, but was very complex and too...
6d8ff4d8 03/29/2010 03:09 am Aurelien Jarno

tcg/mips: fix branch offset during retranslation

Branch offsets should only be overwritten during relocation, to support
partial retranslation.

Signed-off-by: Aurelien Jarno <>

1584c845 03/28/2010 05:39 pm Stefan Weil

tcg/arm: Replace qemu_ld32u (left over from previous commit)

Commit 86feb1c860dc38e9c89e787c5210e8191800385e
did not change all occurrences of INDEX_op_qemu_ld32u
for tcg/arm.

Please note that I could not test this patch
(I have currently no arm system available)....

cc01cc8e 03/27/2010 06:31 pm Aurelien Jarno

tcg-mips: add guest base support

Signed-off-by: Aurelien Jarno <>

489722cf 03/27/2010 05:50 pm Aurelien Jarno

tcg/mips: implement the not_i32 op the same way as gcc

Signed-off-by: Aurelien Jarno <>

2b79487a 03/27/2010 05:32 pm Aurelien Jarno

tcg-mips: implement nor

Signed-off-by: Aurelien Jarno <>

86feb1c8 03/27/2010 12:01 am Richard Henderson

tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.

Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand). For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with...

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