Revision 3594c774 target-mips/translate.c
b/target-mips/translate.c | ||
---|---|---|
503 | 503 |
#define MIPS_DEBUG(fmt, args...) \ |
504 | 504 |
do { \ |
505 | 505 |
if (loglevel & CPU_LOG_TB_IN_ASM) { \ |
506 |
fprintf(logfile, TLSZ ": %08x " fmt "\n", \
|
|
506 |
fprintf(logfile, TARGET_FMT_lx ": %08x " fmt "\n", \
|
|
507 | 507 |
ctx->pc, ctx->opcode , ##args); \ |
508 | 508 |
} \ |
509 | 509 |
} while (0) |
... | ... | |
4124 | 4124 |
switch (op) { |
4125 | 4125 |
case OPC_BC1F: |
4126 | 4126 |
gen_op_bc1f(); |
4127 |
MIPS_DEBUG("bc1f " TLSZ, btarget);
|
|
4127 |
MIPS_DEBUG("bc1f " TARGET_FMT_lx, btarget);
|
|
4128 | 4128 |
goto not_likely; |
4129 | 4129 |
case OPC_BC1FL: |
4130 | 4130 |
gen_op_bc1f(); |
4131 |
MIPS_DEBUG("bc1fl " TLSZ, btarget);
|
|
4131 |
MIPS_DEBUG("bc1fl " TARGET_FMT_lx, btarget);
|
|
4132 | 4132 |
goto likely; |
4133 | 4133 |
case OPC_BC1T: |
4134 | 4134 |
gen_op_bc1t(); |
4135 |
MIPS_DEBUG("bc1t " TLSZ, btarget);
|
|
4135 |
MIPS_DEBUG("bc1t " TARGET_FMT_lx, btarget);
|
|
4136 | 4136 |
not_likely: |
4137 | 4137 |
ctx->hflags |= MIPS_HFLAG_BC; |
4138 | 4138 |
break; |
4139 | 4139 |
case OPC_BC1TL: |
4140 | 4140 |
gen_op_bc1t(); |
4141 |
MIPS_DEBUG("bc1tl " TLSZ, btarget);
|
|
4141 |
MIPS_DEBUG("bc1tl " TARGET_FMT_lx, btarget);
|
|
4142 | 4142 |
likely: |
4143 | 4143 |
ctx->hflags |= MIPS_HFLAG_BL; |
4144 | 4144 |
break; |
... | ... | |
4149 | 4149 |
} |
4150 | 4150 |
gen_op_set_bcond(); |
4151 | 4151 |
|
4152 |
MIPS_DEBUG("enter ds: cond %02x target " TLSZ,
|
|
4152 |
MIPS_DEBUG("enter ds: cond %02x target " TARGET_FMT_lx,
|
|
4153 | 4153 |
ctx->hflags, btarget); |
4154 | 4154 |
ctx->btarget = btarget; |
4155 | 4155 |
|
... | ... | |
4583 | 4583 |
|
4584 | 4584 |
if ((ctx->hflags & MIPS_HFLAG_BMASK) == MIPS_HFLAG_BL) { |
4585 | 4585 |
/* Handle blikely not taken case */ |
4586 |
MIPS_DEBUG("blikely condition (" TLSZ ")", ctx->pc + 4);
|
|
4586 |
MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4);
|
|
4587 | 4587 |
gen_blikely(ctx); |
4588 | 4588 |
} |
4589 | 4589 |
op = MASK_OP_MAJOR(ctx->opcode); |
... | ... | |
5191 | 5191 |
void dump_fpu (CPUState *env) |
5192 | 5192 |
{ |
5193 | 5193 |
if (loglevel) { |
5194 |
fprintf(logfile, "pc=0x" TLSZ " HI=0x" TLSZ " LO=0x" TLSZ " ds %04x " TLSZ " %d\n",
|
|
5194 |
fprintf(logfile, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
|
|
5195 | 5195 |
env->PC, env->HI, env->LO, env->hflags, env->btarget, env->bcond); |
5196 | 5196 |
fpu_dump_state(env, logfile, fprintf, 0); |
5197 | 5197 |
} |
... | ... | |
5212 | 5212 |
int i; |
5213 | 5213 |
|
5214 | 5214 |
if (!SIGN_EXT_P(env->PC)) |
5215 |
cpu_fprintf(f, "BROKEN: pc=0x" TLSZ "\n", env->PC);
|
|
5215 |
cpu_fprintf(f, "BROKEN: pc=0x" TARGET_FMT_lx "\n", env->PC);
|
|
5216 | 5216 |
if (!SIGN_EXT_P(env->HI)) |
5217 |
cpu_fprintf(f, "BROKEN: HI=0x" TLSZ "\n", env->HI);
|
|
5217 |
cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI);
|
|
5218 | 5218 |
if (!SIGN_EXT_P(env->LO)) |
5219 |
cpu_fprintf(f, "BROKEN: LO=0x" TLSZ "\n", env->LO);
|
|
5219 |
cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO);
|
|
5220 | 5220 |
if (!SIGN_EXT_P(env->btarget)) |
5221 |
cpu_fprintf(f, "BROKEN: btarget=0x" TLSZ "\n", env->btarget);
|
|
5221 |
cpu_fprintf(f, "BROKEN: btarget=0x" TARGET_FMT_lx "\n", env->btarget);
|
|
5222 | 5222 |
|
5223 | 5223 |
for (i = 0; i < 32; i++) { |
5224 | 5224 |
if (!SIGN_EXT_P(env->gpr[i])) |
5225 |
cpu_fprintf(f, "BROKEN: %s=0x" TLSZ "\n", regnames[i], env->gpr[i]);
|
|
5225 |
cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[i]);
|
|
5226 | 5226 |
} |
5227 | 5227 |
|
5228 | 5228 |
if (!SIGN_EXT_P(env->CP0_EPC)) |
5229 |
cpu_fprintf(f, "BROKEN: EPC=0x" TLSZ "\n", env->CP0_EPC);
|
|
5229 |
cpu_fprintf(f, "BROKEN: EPC=0x" TARGET_FMT_lx "\n", env->CP0_EPC);
|
|
5230 | 5230 |
if (!SIGN_EXT_P(env->CP0_LLAddr)) |
5231 |
cpu_fprintf(f, "BROKEN: LLAddr=0x" TLSZ "\n", env->CP0_LLAddr);
|
|
5231 |
cpu_fprintf(f, "BROKEN: LLAddr=0x" TARGET_FMT_lx "\n", env->CP0_LLAddr);
|
|
5232 | 5232 |
} |
5233 | 5233 |
#endif |
5234 | 5234 |
|
... | ... | |
5239 | 5239 |
uint32_t c0_status; |
5240 | 5240 |
int i; |
5241 | 5241 |
|
5242 |
cpu_fprintf(f, "pc=0x" TLSZ " HI=0x" TLSZ " LO=0x" TLSZ " ds %04x " TLSZ " %d\n",
|
|
5242 |
cpu_fprintf(f, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
|
|
5243 | 5243 |
env->PC, env->HI, env->LO, env->hflags, env->btarget, env->bcond); |
5244 | 5244 |
for (i = 0; i < 32; i++) { |
5245 | 5245 |
if ((i & 3) == 0) |
5246 | 5246 |
cpu_fprintf(f, "GPR%02d:", i); |
5247 |
cpu_fprintf(f, " %s " TLSZ, regnames[i], env->gpr[i]);
|
|
5247 |
cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[i]);
|
|
5248 | 5248 |
if ((i & 3) == 3) |
5249 | 5249 |
cpu_fprintf(f, "\n"); |
5250 | 5250 |
} |
... | ... | |
5257 | 5257 |
if (env->hflags & MIPS_HFLAG_EXL) |
5258 | 5258 |
c0_status |= (1 << CP0St_EXL); |
5259 | 5259 |
|
5260 |
cpu_fprintf(f, "CP0 Status 0x%08x Cause 0x%08x EPC 0x" TLSZ "\n",
|
|
5260 |
cpu_fprintf(f, "CP0 Status 0x%08x Cause 0x%08x EPC 0x" TARGET_FMT_lx "\n",
|
|
5261 | 5261 |
c0_status, env->CP0_Cause, env->CP0_EPC); |
5262 |
cpu_fprintf(f, " Config0 0x%08x Config1 0x%08x LLAddr 0x" TLSZ "\n",
|
|
5262 |
cpu_fprintf(f, " Config0 0x%08x Config1 0x%08x LLAddr 0x" TARGET_FMT_lx "\n",
|
|
5263 | 5263 |
env->CP0_Config0, env->CP0_Config1, env->CP0_LLAddr); |
5264 | 5264 |
#ifdef MIPS_USES_FPU |
5265 | 5265 |
if (c0_status & (1 << CP0St_CU1)) |
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