Revision 36081602 target-ppc/helper.c
| b/target-ppc/helper.c | ||
|---|---|---|
| 64 | 64 |
{
|
| 65 | 65 |
return addr; |
| 66 | 66 |
} |
| 67 |
|
|
| 67 | 68 |
#else |
| 68 | 69 |
/* Common routines used by software and hardware TLBs emulation */ |
| 69 | 70 |
static inline int pte_is_valid (target_ulong pte0) |
| ... | ... | |
| 635 | 636 |
/* Generic TLB check function for embedded PowerPC implementations */ |
| 636 | 637 |
static int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb, |
| 637 | 638 |
target_phys_addr_t *raddrp, |
| 638 |
target_ulong address, int i) |
|
| 639 |
target_ulong address, |
|
| 640 |
uint32_t pid, int ext, int i) |
|
| 639 | 641 |
{
|
| 640 | 642 |
target_ulong mask; |
| 641 | 643 |
|
| ... | ... | |
| 649 | 651 |
if (loglevel != 0) {
|
| 650 | 652 |
fprintf(logfile, "%s: TLB %d address " ADDRX " PID %d <=> " |
| 651 | 653 |
ADDRX " " ADDRX " %d\n", |
| 652 |
__func__, i, address, (int)env->spr[SPR_40x_PID], |
|
| 653 |
tlb->EPN, mask, (int)tlb->PID); |
|
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__func__, i, address, pid, tlb->EPN, mask, (int)tlb->PID); |
|
| 654 | 655 |
} |
| 655 | 656 |
/* Check PID */ |
| 656 |
if (tlb->PID != 0 && tlb->PID != env->spr[SPR_40x_PID])
|
|
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if (tlb->PID != 0 && tlb->PID != pid)
|
|
| 657 | 658 |
return -1; |
| 658 | 659 |
/* Check effective address */ |
| 659 | 660 |
if ((address & mask) != tlb->EPN) |
| 660 | 661 |
return -1; |
| 661 | 662 |
*raddrp = (tlb->RPN & mask) | (address & ~mask); |
| 663 |
if (ext) {
|
|
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/* Extend the physical address to 36 bits */ |
|
| 665 |
*raddrp |= (target_phys_addr_t)(tlb->RPN & 0xF) << 32; |
|
| 666 |
} |
|
| 662 | 667 |
|
| 663 | 668 |
return 0; |
| 664 | 669 |
} |
| 665 | 670 |
|
| 666 | 671 |
/* Generic TLB search function for PowerPC embedded implementations */ |
| 667 |
int ppcemb_tlb_search (CPUState *env, target_ulong address)
|
|
| 672 |
int ppcemb_tlb_search (CPUPPCState *env, target_ulong address, uint32_t pid)
|
|
| 668 | 673 |
{
|
| 669 | 674 |
ppcemb_tlb_t *tlb; |
| 670 | 675 |
target_phys_addr_t raddr; |
| ... | ... | |
| 674 | 679 |
ret = -1; |
| 675 | 680 |
for (i = 0; i < 64; i++) {
|
| 676 | 681 |
tlb = &env->tlb[i].tlbe; |
| 677 |
if (ppcemb_tlb_check(env, tlb, &raddr, address, i) == 0) {
|
|
| 682 |
if (ppcemb_tlb_check(env, tlb, &raddr, address, pid, 0, i) == 0) {
|
|
| 678 | 683 |
ret = i; |
| 679 | 684 |
break; |
| 680 | 685 |
} |
| ... | ... | |
| 703 | 708 |
tlb_flush(env, 1); |
| 704 | 709 |
} |
| 705 | 710 |
|
| 706 |
int mmu4xx_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
|
|
| 711 |
int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
|
|
| 707 | 712 |
target_ulong address, int rw, int access_type) |
| 708 | 713 |
{
|
| 709 | 714 |
ppcemb_tlb_t *tlb; |
| ... | ... | |
| 714 | 719 |
raddr = -1; |
| 715 | 720 |
for (i = 0; i < env->nb_tlb; i++) {
|
| 716 | 721 |
tlb = &env->tlb[i].tlbe; |
| 717 |
if (ppcemb_tlb_check(env, tlb, &raddr, address, i) < 0) |
|
| 722 |
if (ppcemb_tlb_check(env, tlb, &raddr, address, |
|
| 723 |
env->spr[SPR_40x_PID], 0, i) < 0) |
|
| 718 | 724 |
continue; |
| 719 | 725 |
zsel = (tlb->attr >> 4) & 0xF; |
| 720 | 726 |
zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3; |
| ... | ... | |
| 890 | 896 |
break; |
| 891 | 897 |
case PPC_FLAGS_MMU_SOFT_4xx: |
| 892 | 898 |
case PPC_FLAGS_MMU_403: |
| 893 |
ret = mmu4xx_get_physical_address(env, ctx, eaddr,
|
|
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ret = mmu40x_get_physical_address(env, ctx, eaddr,
|
|
| 894 | 900 |
rw, access_type); |
| 895 | 901 |
break; |
| 896 | 902 |
case PPC_FLAGS_MMU_601: |
| ... | ... | |
| 1536 | 1542 |
env->exception_index = -1; |
| 1537 | 1543 |
} |
| 1538 | 1544 |
#else /* defined (CONFIG_USER_ONLY) */ |
| 1539 |
static void dump_syscall(CPUState *env) |
|
| 1545 |
static void dump_syscall (CPUState *env)
|
|
| 1540 | 1546 |
{
|
| 1541 | 1547 |
fprintf(logfile, "syscall r0=0x" REGX " r3=0x" REGX " r4=0x" REGX |
| 1542 | 1548 |
" r5=0x" REGX " r6=0x" REGX " nip=0x" ADDRX "\n", |
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