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Revision 364d4831

ID364d48314a97dc4e3a98ff2643232faf37a2690d

Added by Nathan Froyd over 14 years ago

target-mips: add mips16 instruction decoding

There's no good way to add this incrementally, so we do it all at once.
The only changes to shared code are in handle_delay_slot. We need to
flip ISAMode when doing a jump-and-exchange. We also need to set
ISAMode the low bit of the target address for jump-to-register.

Also, since we're now adding bits that can be in MIPS_HFLAG_BMASK_EXT,
make sure we use MIPS_HFLAG_BMASK_BASE in the places where we just want
basic information about a branch.

Signed-off-by: Nathan Froyd <>
Signed-off-by: Aurelien Jarno <>

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