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1 | 367e86e8 | bellard | #ifndef CPU_I386_H
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2 | 367e86e8 | bellard | #define CPU_I386_H
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3 | 367e86e8 | bellard | |
4 | 367e86e8 | bellard | #define R_EAX 0 |
5 | 367e86e8 | bellard | #define R_ECX 1 |
6 | 367e86e8 | bellard | #define R_EDX 2 |
7 | 367e86e8 | bellard | #define R_EBX 3 |
8 | 367e86e8 | bellard | #define R_ESP 4 |
9 | 367e86e8 | bellard | #define R_EBP 5 |
10 | 367e86e8 | bellard | #define R_ESI 6 |
11 | 367e86e8 | bellard | #define R_EDI 7 |
12 | 367e86e8 | bellard | |
13 | 367e86e8 | bellard | #define R_AL 0 |
14 | 367e86e8 | bellard | #define R_CL 1 |
15 | 367e86e8 | bellard | #define R_DL 2 |
16 | 367e86e8 | bellard | #define R_BL 3 |
17 | 367e86e8 | bellard | #define R_AH 4 |
18 | 367e86e8 | bellard | #define R_CH 5 |
19 | 367e86e8 | bellard | #define R_DH 6 |
20 | 367e86e8 | bellard | #define R_BH 7 |
21 | 367e86e8 | bellard | |
22 | 367e86e8 | bellard | #define R_ES 0 |
23 | 367e86e8 | bellard | #define R_CS 1 |
24 | 367e86e8 | bellard | #define R_SS 2 |
25 | 367e86e8 | bellard | #define R_DS 3 |
26 | 367e86e8 | bellard | #define R_FS 4 |
27 | 367e86e8 | bellard | #define R_GS 5 |
28 | 367e86e8 | bellard | |
29 | 367e86e8 | bellard | #define CC_C 0x0001 |
30 | 367e86e8 | bellard | #define CC_P 0x0004 |
31 | 367e86e8 | bellard | #define CC_A 0x0010 |
32 | 367e86e8 | bellard | #define CC_Z 0x0040 |
33 | 367e86e8 | bellard | #define CC_S 0x0080 |
34 | 367e86e8 | bellard | #define CC_O 0x0800 |
35 | 367e86e8 | bellard | |
36 | 367e86e8 | bellard | #define TRAP_FLAG 0x0100 |
37 | 367e86e8 | bellard | #define INTERRUPT_FLAG 0x0200 |
38 | 367e86e8 | bellard | #define DIRECTION_FLAG 0x0400 |
39 | 367e86e8 | bellard | #define IOPL_FLAG_MASK 0x3000 |
40 | 367e86e8 | bellard | #define NESTED_FLAG 0x4000 |
41 | 367e86e8 | bellard | #define BYTE_FL 0x8000 /* Intel reserved! */ |
42 | 367e86e8 | bellard | #define RF_FLAG 0x10000 |
43 | 367e86e8 | bellard | #define VM_FLAG 0x20000 |
44 | 367e86e8 | bellard | /* AC 0x40000 */
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45 | 367e86e8 | bellard | |
46 | 367e86e8 | bellard | enum {
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47 | 367e86e8 | bellard | CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
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48 | 367e86e8 | bellard | CC_OP_EFLAGS, /* all cc are explicitely computed, CC_SRC = flags */
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49 | 367e86e8 | bellard | CC_OP_MUL, /* modify all flags, C, O = (CC_SRC != 0) */
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50 | 367e86e8 | bellard | |
51 | 367e86e8 | bellard | CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
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52 | 367e86e8 | bellard | CC_OP_ADDW, |
53 | 367e86e8 | bellard | CC_OP_ADDL, |
54 | 367e86e8 | bellard | |
55 | 367e86e8 | bellard | CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
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56 | 367e86e8 | bellard | CC_OP_SUBW, |
57 | 367e86e8 | bellard | CC_OP_SUBL, |
58 | 367e86e8 | bellard | |
59 | 367e86e8 | bellard | CC_OP_LOGICB, /* modify all flags, CC_DST = res */
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60 | 367e86e8 | bellard | CC_OP_LOGICW, |
61 | 367e86e8 | bellard | CC_OP_LOGICL, |
62 | 367e86e8 | bellard | |
63 | 367e86e8 | bellard | CC_OP_INCB, /* modify all flags except, CC_DST = res */
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64 | 367e86e8 | bellard | CC_OP_INCW, |
65 | 367e86e8 | bellard | CC_OP_INCL, |
66 | 367e86e8 | bellard | |
67 | 367e86e8 | bellard | CC_OP_DECB, /* modify all flags except, CC_DST = res */
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68 | 367e86e8 | bellard | CC_OP_DECW, |
69 | 367e86e8 | bellard | CC_OP_DECL, |
70 | 367e86e8 | bellard | |
71 | 367e86e8 | bellard | CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
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72 | 367e86e8 | bellard | CC_OP_SHLW, |
73 | 367e86e8 | bellard | CC_OP_SHLL, |
74 | 367e86e8 | bellard | |
75 | 367e86e8 | bellard | CC_OP_NB, |
76 | 367e86e8 | bellard | }; |
77 | 367e86e8 | bellard | |
78 | 367e86e8 | bellard | typedef struct CPU86State { |
79 | 367e86e8 | bellard | /* standard registers */
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80 | 367e86e8 | bellard | uint32_t regs[8];
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81 | 367e86e8 | bellard | uint32_t pc; /* cs_case + eip value */
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82 | 367e86e8 | bellard | |
83 | 367e86e8 | bellard | /* eflags handling */
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84 | 367e86e8 | bellard | uint32_t eflags; |
85 | 367e86e8 | bellard | uint32_t cc_src; |
86 | 367e86e8 | bellard | uint32_t cc_dst; |
87 | 367e86e8 | bellard | uint32_t cc_op; |
88 | 367e86e8 | bellard | int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
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89 | 367e86e8 | bellard | |
90 | 367e86e8 | bellard | /* segments */
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91 | 367e86e8 | bellard | uint8_t *segs_base[6];
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92 | 367e86e8 | bellard | uint32_t segs[6];
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93 | 367e86e8 | bellard | |
94 | 367e86e8 | bellard | /* emulator internal variables */
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95 | 367e86e8 | bellard | uint32_t t0; /* temporary t0 storage */
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96 | 367e86e8 | bellard | uint32_t t1; /* temporary t1 storage */
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97 | 367e86e8 | bellard | uint32_t a0; /* temporary a0 storage (address) */
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98 | 367e86e8 | bellard | } CPU86State; |
99 | 367e86e8 | bellard | |
100 | 367e86e8 | bellard | static inline int ldub(void *ptr) |
101 | 367e86e8 | bellard | { |
102 | 367e86e8 | bellard | return *(uint8_t *)ptr;
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103 | 367e86e8 | bellard | } |
104 | 367e86e8 | bellard | |
105 | 367e86e8 | bellard | static inline int ldsb(void *ptr) |
106 | 367e86e8 | bellard | { |
107 | 367e86e8 | bellard | return *(int8_t *)ptr;
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108 | 367e86e8 | bellard | } |
109 | 367e86e8 | bellard | |
110 | 367e86e8 | bellard | static inline int lduw(void *ptr) |
111 | 367e86e8 | bellard | { |
112 | 367e86e8 | bellard | return *(uint16_t *)ptr;
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113 | 367e86e8 | bellard | } |
114 | 367e86e8 | bellard | |
115 | 367e86e8 | bellard | static inline int ldsw(void *ptr) |
116 | 367e86e8 | bellard | { |
117 | 367e86e8 | bellard | return *(int16_t *)ptr;
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118 | 367e86e8 | bellard | } |
119 | 367e86e8 | bellard | |
120 | 367e86e8 | bellard | static inline int ldl(void *ptr) |
121 | 367e86e8 | bellard | { |
122 | 367e86e8 | bellard | return *(uint32_t *)ptr;
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123 | 367e86e8 | bellard | } |
124 | 367e86e8 | bellard | |
125 | 367e86e8 | bellard | |
126 | 367e86e8 | bellard | static inline void stb(void *ptr, int v) |
127 | 367e86e8 | bellard | { |
128 | 367e86e8 | bellard | *(uint8_t *)ptr = v; |
129 | 367e86e8 | bellard | } |
130 | 367e86e8 | bellard | |
131 | 367e86e8 | bellard | static inline void stw(void *ptr, int v) |
132 | 367e86e8 | bellard | { |
133 | 367e86e8 | bellard | *(uint16_t *)ptr = v; |
134 | 367e86e8 | bellard | } |
135 | 367e86e8 | bellard | |
136 | 367e86e8 | bellard | static inline void stl(void *ptr, int v) |
137 | 367e86e8 | bellard | { |
138 | 367e86e8 | bellard | *(uint32_t *)ptr = v; |
139 | 367e86e8 | bellard | } |
140 | 367e86e8 | bellard | |
141 | 367e86e8 | bellard | void port_outb(int addr, int val); |
142 | 367e86e8 | bellard | void port_outw(int addr, int val); |
143 | 367e86e8 | bellard | void port_outl(int addr, int val); |
144 | 367e86e8 | bellard | int port_inb(int addr); |
145 | 367e86e8 | bellard | int port_inw(int addr); |
146 | 367e86e8 | bellard | int port_inl(int addr); |
147 | 367e86e8 | bellard | |
148 | 367e86e8 | bellard | #endif /* CPU_I386_H */ |