Statistics
| Branch: | Revision:

root / cpu-i386.h @ 367e86e8

History | View | Annotate | Download (2.8 kB)

1
#ifndef CPU_I386_H
2
#define CPU_I386_H
3

    
4
#define R_EAX 0
5
#define R_ECX 1
6
#define R_EDX 2
7
#define R_EBX 3
8
#define R_ESP 4
9
#define R_EBP 5
10
#define R_ESI 6
11
#define R_EDI 7
12

    
13
#define R_AL 0
14
#define R_CL 1
15
#define R_DL 2
16
#define R_BL 3
17
#define R_AH 4
18
#define R_CH 5
19
#define R_DH 6
20
#define R_BH 7
21

    
22
#define R_ES 0
23
#define R_CS 1
24
#define R_SS 2
25
#define R_DS 3
26
#define R_FS 4
27
#define R_GS 5
28

    
29
#define CC_C           0x0001
30
#define CC_P         0x0004
31
#define CC_A        0x0010
32
#define CC_Z        0x0040
33
#define CC_S    0x0080
34
#define CC_O    0x0800
35

    
36
#define TRAP_FLAG                0x0100
37
#define INTERRUPT_FLAG                0x0200
38
#define DIRECTION_FLAG                0x0400
39
#define IOPL_FLAG_MASK                0x3000
40
#define NESTED_FLAG                0x4000
41
#define BYTE_FL                        0x8000        /* Intel reserved! */
42
#define RF_FLAG                        0x10000
43
#define VM_FLAG                        0x20000
44
/* AC                                0x40000 */
45

    
46
enum {
47
    CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
48
    CC_OP_EFLAGS,  /* all cc are explicitely computed, CC_SRC = flags */
49
    CC_OP_MUL, /* modify all flags, C, O = (CC_SRC != 0) */
50

    
51
    CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
52
    CC_OP_ADDW,
53
    CC_OP_ADDL,
54

    
55
    CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
56
    CC_OP_SUBW,
57
    CC_OP_SUBL,
58

    
59
    CC_OP_LOGICB, /* modify all flags, CC_DST = res */
60
    CC_OP_LOGICW,
61
    CC_OP_LOGICL,
62

    
63
    CC_OP_INCB, /* modify all flags except, CC_DST = res */
64
    CC_OP_INCW,
65
    CC_OP_INCL,
66

    
67
    CC_OP_DECB, /* modify all flags except, CC_DST = res */
68
    CC_OP_DECW,
69
    CC_OP_DECL,
70

    
71
    CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
72
    CC_OP_SHLW,
73
    CC_OP_SHLL,
74

    
75
    CC_OP_NB,
76
};
77

    
78
typedef struct CPU86State {
79
    /* standard registers */
80
    uint32_t regs[8];
81
    uint32_t pc; /* cs_case + eip value */
82

    
83
    /* eflags handling */
84
    uint32_t eflags;
85
    uint32_t cc_src;
86
    uint32_t cc_dst;
87
    uint32_t cc_op;
88
    int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
89
    
90
    /* segments */
91
    uint8_t *segs_base[6];
92
    uint32_t segs[6];
93

    
94
    /* emulator internal variables */
95
    uint32_t t0; /* temporary t0 storage */
96
    uint32_t t1; /* temporary t1 storage */
97
    uint32_t a0; /* temporary a0 storage (address) */
98
} CPU86State;
99

    
100
static inline int ldub(void *ptr)
101
{
102
    return *(uint8_t *)ptr;
103
}
104

    
105
static inline int ldsb(void *ptr)
106
{
107
    return *(int8_t *)ptr;
108
}
109

    
110
static inline int lduw(void *ptr)
111
{
112
    return *(uint16_t *)ptr;
113
}
114

    
115
static inline int ldsw(void *ptr)
116
{
117
    return *(int16_t *)ptr;
118
}
119

    
120
static inline int ldl(void *ptr)
121
{
122
    return *(uint32_t *)ptr;
123
}
124

    
125

    
126
static inline void stb(void *ptr, int v)
127
{
128
    *(uint8_t *)ptr = v;
129
}
130

    
131
static inline void stw(void *ptr, int v)
132
{
133
    *(uint16_t *)ptr = v;
134
}
135

    
136
static inline void stl(void *ptr, int v)
137
{
138
    *(uint32_t *)ptr = v;
139
}
140

    
141
void port_outb(int addr, int val);
142
void port_outw(int addr, int val);
143
void port_outl(int addr, int val);
144
int port_inb(int addr);
145
int port_inw(int addr);
146
int port_inl(int addr);
147

    
148
#endif /* CPU_I386_H */