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/*
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* QEMU ES1370 emulation
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*
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* Copyright (c) 2005 Vassili Karpov (malc)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/* #define DEBUG_ES1370 */
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/* #define VERBOSE_ES1370 */
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#define SILENT_ES1370
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#include "hw/hw.h" |
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#include "hw/audio/audio.h" |
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#include "audio/audio.h" |
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#include "hw/pci/pci.h" |
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#include "sysemu/dma.h" |
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/* Missing stuff:
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SCTRL_P[12](END|ST)INC
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SCTRL_P1SCTRLD
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SCTRL_P2DACSEN
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CTRL_DAC_SYNC
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MIDI
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non looped mode
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surely more
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*/
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/*
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Following macros and samplerate array were copied verbatim from
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Linux kernel 2.4.30: drivers/sound/es1370.c
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Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
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*/
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/* Start blatant GPL violation */
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#define ES1370_REG_CONTROL 0x00 |
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#define ES1370_REG_STATUS 0x04 |
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#define ES1370_REG_UART_DATA 0x08 |
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#define ES1370_REG_UART_STATUS 0x09 |
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#define ES1370_REG_UART_CONTROL 0x09 |
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#define ES1370_REG_UART_TEST 0x0a |
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#define ES1370_REG_MEMPAGE 0x0c |
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#define ES1370_REG_CODEC 0x10 |
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#define ES1370_REG_SERIAL_CONTROL 0x20 |
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#define ES1370_REG_DAC1_SCOUNT 0x24 |
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#define ES1370_REG_DAC2_SCOUNT 0x28 |
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#define ES1370_REG_ADC_SCOUNT 0x2c |
66 |
|
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#define ES1370_REG_DAC1_FRAMEADR 0xc30 |
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#define ES1370_REG_DAC1_FRAMECNT 0xc34 |
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#define ES1370_REG_DAC2_FRAMEADR 0xc38 |
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#define ES1370_REG_DAC2_FRAMECNT 0xc3c |
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#define ES1370_REG_ADC_FRAMEADR 0xd30 |
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#define ES1370_REG_ADC_FRAMECNT 0xd34 |
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#define ES1370_REG_PHANTOM_FRAMEADR 0xd38 |
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#define ES1370_REG_PHANTOM_FRAMECNT 0xd3c |
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|
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static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 }; |
77 |
|
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#define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2) |
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#define DAC2_DIVTOSR(x) (1411200/((x)+2)) |
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|
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#define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */ |
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#define CTRL_XCTL1 0x40000000 /* electret mic bias */ |
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#define CTRL_OPEN 0x20000000 /* no function, can be read and written */ |
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#define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */ |
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#define CTRL_SH_PCLKDIV 16 |
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#define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */ |
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#define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */ |
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#define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */ |
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#define CTRL_SH_WTSRSEL 12 |
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#define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */ |
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#define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */ |
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#define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */ |
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#define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */ |
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#define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */ |
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#define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */ |
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#define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */ |
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#define CTRL_ADC_EN 0x00000010 /* enable ADC */ |
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#define CTRL_UART_EN 0x00000008 /* enable MIDI uart */ |
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#define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */ |
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#define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */ |
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#define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */ |
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|
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#define STAT_INTR 0x80000000 /* wired or of all interrupt bits */ |
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#define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */ |
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#define STAT_CBUSY 0x00000200 /* 1 = codec busy */ |
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#define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */ |
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#define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */ |
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#define STAT_SH_VC 5 |
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#define STAT_MCCB 0x00000010 /* CCB int pending */ |
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#define STAT_UART 0x00000008 /* UART int pending */ |
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#define STAT_DAC1 0x00000004 /* DAC1 int pending */ |
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#define STAT_DAC2 0x00000002 /* DAC2 int pending */ |
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#define STAT_ADC 0x00000001 /* ADC int pending */ |
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#define USTAT_RXINT 0x80 /* UART rx int pending */ |
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#define USTAT_TXINT 0x04 /* UART tx int pending */ |
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#define USTAT_TXRDY 0x02 /* UART tx ready */ |
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#define USTAT_RXRDY 0x01 /* UART rx ready */ |
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#define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */ |
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#define UCTRL_TXINTEN 0x60 /* TX int enable field mask */ |
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#define UCTRL_ENA_TXINT 0x20 /* enable TX int */ |
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#define UCTRL_CNTRL 0x03 /* control field */ |
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#define UCTRL_CNTRL_SWR 0x03 /* software reset command */ |
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#define SCTRL_P2ENDINC 0x00380000 /* */ |
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#define SCTRL_SH_P2ENDINC 19 |
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#define SCTRL_P2STINC 0x00070000 /* */ |
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#define SCTRL_SH_P2STINC 16 |
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#define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */ |
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#define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */ |
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#define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */ |
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#define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */ |
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#define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */ |
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#define SCTRL_R1INTEN 0x00000400 /* enable interrupt */ |
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#define SCTRL_P2INTEN 0x00000200 /* enable interrupt */ |
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#define SCTRL_P1INTEN 0x00000100 /* enable interrupt */ |
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#define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */ |
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#define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */ |
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#define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */ |
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#define SCTRL_R1SMB 0x00000010 /* 1 = stereo */ |
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#define SCTRL_R1FMT 0x00000030 /* format mask */ |
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#define SCTRL_SH_R1FMT 4 |
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#define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */ |
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#define SCTRL_P2SMB 0x00000004 /* 1 = stereo */ |
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#define SCTRL_P2FMT 0x0000000c /* format mask */ |
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#define SCTRL_SH_P2FMT 2 |
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#define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */ |
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#define SCTRL_P1SMB 0x00000001 /* 1 = stereo */ |
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#define SCTRL_P1FMT 0x00000003 /* format mask */ |
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#define SCTRL_SH_P1FMT 0 |
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/* End blatant GPL violation */
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#define NB_CHANNELS 3 |
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#define DAC1_CHANNEL 0 |
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#define DAC2_CHANNEL 1 |
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#define ADC_CHANNEL 2 |
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#define IO_READ_PROTO(n) \
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static uint32_t n (void *opaque, uint32_t addr) |
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#define IO_WRITE_PROTO(n) \
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static void n (void *opaque, uint32_t addr, uint32_t val) |
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static void es1370_dac1_callback (void *opaque, int free); |
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static void es1370_dac2_callback (void *opaque, int free); |
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static void es1370_adc_callback (void *opaque, int avail); |
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#ifdef DEBUG_ES1370
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#define ldebug(...) AUD_log ("es1370", __VA_ARGS__) |
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static void print_ctl (uint32_t val) |
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{ |
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char buf[1024]; |
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buf[0] = '\0'; |
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#define a(n) if (val & CTRL_##n) strcat (buf, " "#n) |
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a (ADC_STOP); |
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a (XCTL1); |
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a (OPEN); |
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a (MSFMTSEL); |
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a (M_SBB); |
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a (DAC_SYNC); |
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a (CCB_INTRM); |
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a (M_CB); |
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a (XCTL0); |
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a (BREQ); |
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a (DAC1_EN); |
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a (DAC2_EN); |
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a (ADC_EN); |
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a (UART_EN); |
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a (JYSTK_EN); |
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a (CDC_EN); |
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a (SERR_DIS); |
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#undef a
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AUD_log ("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n", |
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(val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV, |
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DAC2_DIVTOSR ((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV), |
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dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL], |
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buf); |
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} |
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static void print_sctl (uint32_t val) |
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{ |
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static const char *fmt_names[] = {"8M", "8S", "16M", "16S"}; |
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char buf[1024]; |
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buf[0] = '\0'; |
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#define a(n) if (val & SCTRL_##n) strcat (buf, " "#n) |
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#define b(n) if (!(val & SCTRL_##n)) strcat (buf, " "#n) |
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b (R1LOOPSEL); |
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b (P2LOOPSEL); |
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b (P1LOOPSEL); |
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a (P2PAUSE); |
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a (P1PAUSE); |
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a (R1INTEN); |
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a (P2INTEN); |
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a (P1INTEN); |
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a (P1SCTRLD); |
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a (P2DACSEN); |
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if (buf[0]) { |
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strcat (buf, "\n ");
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} |
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else {
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buf[0] = ' '; |
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buf[1] = '\0'; |
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} |
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#undef b
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#undef a
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AUD_log ("es1370",
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"%s"
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"p2_end_inc %d, p2_st_inc %d, r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
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buf, |
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(val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC, |
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(val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC, |
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fmt_names [(val >> SCTRL_SH_R1FMT) & 3],
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fmt_names [(val >> SCTRL_SH_P2FMT) & 3],
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fmt_names [(val >> SCTRL_SH_P1FMT) & 3]
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); |
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} |
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#else
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#define ldebug(...)
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#define print_ctl(...)
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#define print_sctl(...)
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#endif
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#ifdef VERBOSE_ES1370
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#define dolog(...) AUD_log ("es1370", __VA_ARGS__) |
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#else
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#define dolog(...)
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#endif
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#ifndef SILENT_ES1370
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#define lwarn(...) AUD_log ("es1370: warning", __VA_ARGS__) |
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#else
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#define lwarn(...)
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#endif
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|
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struct chan {
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uint32_t shift; |
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uint32_t leftover; |
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uint32_t scount; |
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uint32_t frame_addr; |
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uint32_t frame_cnt; |
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}; |
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|
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typedef struct ES1370State { |
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PCIDevice dev; |
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QEMUSoundCard card; |
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MemoryRegion io; |
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struct chan chan[NB_CHANNELS];
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SWVoiceOut *dac_voice[2];
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SWVoiceIn *adc_voice; |
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uint32_t ctl; |
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uint32_t status; |
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uint32_t mempage; |
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uint32_t codec; |
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uint32_t sctl; |
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} ES1370State; |
283 |
|
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struct chan_bits {
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uint32_t ctl_en; |
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uint32_t stat_int; |
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uint32_t sctl_pause; |
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uint32_t sctl_inten; |
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uint32_t sctl_fmt; |
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uint32_t sctl_sh_fmt; |
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uint32_t sctl_loopsel; |
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void (*calc_freq) (ES1370State *s, uint32_t ctl,
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uint32_t *old_freq, uint32_t *new_freq); |
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}; |
295 |
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static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, |
297 |
uint32_t *old_freq, uint32_t *new_freq); |
298 |
static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, |
299 |
uint32_t *old_freq, |
300 |
uint32_t *new_freq); |
301 |
|
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static const struct chan_bits es1370_chan_bits[] = { |
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{CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN, |
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SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL, |
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es1370_dac1_calc_freq}, |
306 |
|
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{CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN, |
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SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL, |
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es1370_dac2_and_adc_calc_freq}, |
310 |
|
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{CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN,
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SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL, |
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es1370_dac2_and_adc_calc_freq} |
314 |
}; |
315 |
|
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static void es1370_update_status (ES1370State *s, uint32_t new_status) |
317 |
{ |
318 |
uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC); |
319 |
|
320 |
if (level) {
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s->status = new_status | STAT_INTR; |
322 |
} |
323 |
else {
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s->status = new_status & ~STAT_INTR; |
325 |
} |
326 |
qemu_set_irq (s->dev.irq[0], !!level);
|
327 |
} |
328 |
|
329 |
static void es1370_reset (ES1370State *s) |
330 |
{ |
331 |
size_t i; |
332 |
|
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s->ctl = 1;
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s->status = 0x60;
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s->mempage = 0;
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s->codec = 0;
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s->sctl = 0;
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338 |
|
339 |
for (i = 0; i < NB_CHANNELS; ++i) { |
340 |
struct chan *d = &s->chan[i];
|
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d->scount = 0;
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d->leftover = 0;
|
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if (i == ADC_CHANNEL) {
|
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AUD_close_in (&s->card, s->adc_voice); |
345 |
s->adc_voice = NULL;
|
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} |
347 |
else {
|
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AUD_close_out (&s->card, s->dac_voice[i]); |
349 |
s->dac_voice[i] = NULL;
|
350 |
} |
351 |
} |
352 |
qemu_irq_lower (s->dev.irq[0]);
|
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} |
354 |
|
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static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl) |
356 |
{ |
357 |
uint32_t new_status = s->status; |
358 |
|
359 |
if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) {
|
360 |
new_status &= ~STAT_DAC1; |
361 |
} |
362 |
|
363 |
if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) {
|
364 |
new_status &= ~STAT_DAC2; |
365 |
} |
366 |
|
367 |
if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) {
|
368 |
new_status &= ~STAT_ADC; |
369 |
} |
370 |
|
371 |
if (new_status != s->status) {
|
372 |
es1370_update_status (s, new_status); |
373 |
} |
374 |
} |
375 |
|
376 |
static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl, |
377 |
uint32_t *old_freq, uint32_t *new_freq) |
378 |
|
379 |
{ |
380 |
*old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; |
381 |
*new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL]; |
382 |
} |
383 |
|
384 |
static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl, |
385 |
uint32_t *old_freq, |
386 |
uint32_t *new_freq) |
387 |
|
388 |
{ |
389 |
uint32_t old_pclkdiv, new_pclkdiv; |
390 |
|
391 |
new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; |
392 |
old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV; |
393 |
*new_freq = DAC2_DIVTOSR (new_pclkdiv); |
394 |
*old_freq = DAC2_DIVTOSR (old_pclkdiv); |
395 |
} |
396 |
|
397 |
static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl) |
398 |
{ |
399 |
size_t i; |
400 |
uint32_t old_freq, new_freq, old_fmt, new_fmt; |
401 |
|
402 |
for (i = 0; i < NB_CHANNELS; ++i) { |
403 |
struct chan *d = &s->chan[i];
|
404 |
const struct chan_bits *b = &es1370_chan_bits[i]; |
405 |
|
406 |
new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt; |
407 |
old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt; |
408 |
|
409 |
b->calc_freq (s, ctl, &old_freq, &new_freq); |
410 |
|
411 |
if ((old_fmt != new_fmt) || (old_freq != new_freq)) {
|
412 |
d->shift = (new_fmt & 1) + (new_fmt >> 1); |
413 |
ldebug ("channel %zu, freq = %d, nchannels %d, fmt %d, shift %d\n",
|
414 |
i, |
415 |
new_freq, |
416 |
1 << (new_fmt & 1), |
417 |
(new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8,
|
418 |
d->shift); |
419 |
if (new_freq) {
|
420 |
struct audsettings as;
|
421 |
|
422 |
as.freq = new_freq; |
423 |
as.nchannels = 1 << (new_fmt & 1); |
424 |
as.fmt = (new_fmt & 2) ? AUD_FMT_S16 : AUD_FMT_U8;
|
425 |
as.endianness = 0;
|
426 |
|
427 |
if (i == ADC_CHANNEL) {
|
428 |
s->adc_voice = |
429 |
AUD_open_in ( |
430 |
&s->card, |
431 |
s->adc_voice, |
432 |
"es1370.adc",
|
433 |
s, |
434 |
es1370_adc_callback, |
435 |
&as |
436 |
); |
437 |
} |
438 |
else {
|
439 |
s->dac_voice[i] = |
440 |
AUD_open_out ( |
441 |
&s->card, |
442 |
s->dac_voice[i], |
443 |
i ? "es1370.dac2" : "es1370.dac1", |
444 |
s, |
445 |
i ? es1370_dac2_callback : es1370_dac1_callback, |
446 |
&as |
447 |
); |
448 |
} |
449 |
} |
450 |
} |
451 |
|
452 |
if (((ctl ^ s->ctl) & b->ctl_en)
|
453 |
|| ((sctl ^ s->sctl) & b->sctl_pause)) { |
454 |
int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause);
|
455 |
|
456 |
if (i == ADC_CHANNEL) {
|
457 |
AUD_set_active_in (s->adc_voice, on); |
458 |
} |
459 |
else {
|
460 |
AUD_set_active_out (s->dac_voice[i], on); |
461 |
} |
462 |
} |
463 |
} |
464 |
|
465 |
s->ctl = ctl; |
466 |
s->sctl = sctl; |
467 |
} |
468 |
|
469 |
static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr) |
470 |
{ |
471 |
addr &= 0xff;
|
472 |
if (addr >= 0x30 && addr <= 0x3f) |
473 |
addr |= s->mempage << 8;
|
474 |
return addr;
|
475 |
} |
476 |
|
477 |
IO_WRITE_PROTO (es1370_writeb) |
478 |
{ |
479 |
ES1370State *s = opaque; |
480 |
uint32_t shift, mask; |
481 |
|
482 |
addr = es1370_fixup (s, addr); |
483 |
|
484 |
switch (addr) {
|
485 |
case ES1370_REG_CONTROL:
|
486 |
case ES1370_REG_CONTROL + 1: |
487 |
case ES1370_REG_CONTROL + 2: |
488 |
case ES1370_REG_CONTROL + 3: |
489 |
shift = (addr - ES1370_REG_CONTROL) << 3;
|
490 |
mask = 0xff << shift;
|
491 |
val = (s->ctl & ~mask) | ((val & 0xff) << shift);
|
492 |
es1370_update_voices (s, val, s->sctl); |
493 |
print_ctl (val); |
494 |
break;
|
495 |
case ES1370_REG_MEMPAGE:
|
496 |
s->mempage = val; |
497 |
break;
|
498 |
case ES1370_REG_SERIAL_CONTROL:
|
499 |
case ES1370_REG_SERIAL_CONTROL + 1: |
500 |
case ES1370_REG_SERIAL_CONTROL + 2: |
501 |
case ES1370_REG_SERIAL_CONTROL + 3: |
502 |
shift = (addr - ES1370_REG_SERIAL_CONTROL) << 3;
|
503 |
mask = 0xff << shift;
|
504 |
val = (s->sctl & ~mask) | ((val & 0xff) << shift);
|
505 |
es1370_maybe_lower_irq (s, val); |
506 |
es1370_update_voices (s, s->ctl, val); |
507 |
print_sctl (val); |
508 |
break;
|
509 |
default:
|
510 |
lwarn ("writeb %#x <- %#x\n", addr, val);
|
511 |
break;
|
512 |
} |
513 |
} |
514 |
|
515 |
IO_WRITE_PROTO (es1370_writew) |
516 |
{ |
517 |
ES1370State *s = opaque; |
518 |
addr = es1370_fixup (s, addr); |
519 |
uint32_t shift, mask; |
520 |
struct chan *d = &s->chan[0]; |
521 |
|
522 |
switch (addr) {
|
523 |
case ES1370_REG_CODEC:
|
524 |
dolog ("ignored codec write address %#x, data %#x\n",
|
525 |
(val >> 8) & 0xff, val & 0xff); |
526 |
s->codec = val; |
527 |
break;
|
528 |
|
529 |
case ES1370_REG_CONTROL:
|
530 |
case ES1370_REG_CONTROL + 2: |
531 |
shift = (addr != ES1370_REG_CONTROL) << 4;
|
532 |
mask = 0xffff << shift;
|
533 |
val = (s->ctl & ~mask) | ((val & 0xffff) << shift);
|
534 |
es1370_update_voices (s, val, s->sctl); |
535 |
print_ctl (val); |
536 |
break;
|
537 |
|
538 |
case ES1370_REG_ADC_SCOUNT:
|
539 |
d++; |
540 |
case ES1370_REG_DAC2_SCOUNT:
|
541 |
d++; |
542 |
case ES1370_REG_DAC1_SCOUNT:
|
543 |
d->scount = (d->scount & ~0xffff) | (val & 0xffff); |
544 |
break;
|
545 |
|
546 |
default:
|
547 |
lwarn ("writew %#x <- %#x\n", addr, val);
|
548 |
break;
|
549 |
} |
550 |
} |
551 |
|
552 |
IO_WRITE_PROTO (es1370_writel) |
553 |
{ |
554 |
ES1370State *s = opaque; |
555 |
struct chan *d = &s->chan[0]; |
556 |
|
557 |
addr = es1370_fixup (s, addr); |
558 |
|
559 |
switch (addr) {
|
560 |
case ES1370_REG_CONTROL:
|
561 |
es1370_update_voices (s, val, s->sctl); |
562 |
print_ctl (val); |
563 |
break;
|
564 |
|
565 |
case ES1370_REG_MEMPAGE:
|
566 |
s->mempage = val & 0xf;
|
567 |
break;
|
568 |
|
569 |
case ES1370_REG_SERIAL_CONTROL:
|
570 |
es1370_maybe_lower_irq (s, val); |
571 |
es1370_update_voices (s, s->ctl, val); |
572 |
print_sctl (val); |
573 |
break;
|
574 |
|
575 |
case ES1370_REG_ADC_SCOUNT:
|
576 |
d++; |
577 |
case ES1370_REG_DAC2_SCOUNT:
|
578 |
d++; |
579 |
case ES1370_REG_DAC1_SCOUNT:
|
580 |
d->scount = (val & 0xffff) | (d->scount & ~0xffff); |
581 |
ldebug ("chan %td CURR_SAMP_CT %d, SAMP_CT %d\n",
|
582 |
d - &s->chan[0], val >> 16, (val & 0xffff)); |
583 |
break;
|
584 |
|
585 |
case ES1370_REG_ADC_FRAMEADR:
|
586 |
d++; |
587 |
case ES1370_REG_DAC2_FRAMEADR:
|
588 |
d++; |
589 |
case ES1370_REG_DAC1_FRAMEADR:
|
590 |
d->frame_addr = val; |
591 |
ldebug ("chan %td frame address %#x\n", d - &s->chan[0], val); |
592 |
break;
|
593 |
|
594 |
case ES1370_REG_PHANTOM_FRAMECNT:
|
595 |
lwarn ("writing to phantom frame count %#x\n", val);
|
596 |
break;
|
597 |
case ES1370_REG_PHANTOM_FRAMEADR:
|
598 |
lwarn ("writing to phantom frame address %#x\n", val);
|
599 |
break;
|
600 |
|
601 |
case ES1370_REG_ADC_FRAMECNT:
|
602 |
d++; |
603 |
case ES1370_REG_DAC2_FRAMECNT:
|
604 |
d++; |
605 |
case ES1370_REG_DAC1_FRAMECNT:
|
606 |
d->frame_cnt = val; |
607 |
d->leftover = 0;
|
608 |
ldebug ("chan %td frame count %d, buffer size %d\n",
|
609 |
d - &s->chan[0], val >> 16, val & 0xffff); |
610 |
break;
|
611 |
|
612 |
default:
|
613 |
lwarn ("writel %#x <- %#x\n", addr, val);
|
614 |
break;
|
615 |
} |
616 |
} |
617 |
|
618 |
IO_READ_PROTO (es1370_readb) |
619 |
{ |
620 |
ES1370State *s = opaque; |
621 |
uint32_t val; |
622 |
|
623 |
addr = es1370_fixup (s, addr); |
624 |
|
625 |
switch (addr) {
|
626 |
case 0x1b: /* Legacy */ |
627 |
lwarn ("Attempt to read from legacy register\n");
|
628 |
val = 5;
|
629 |
break;
|
630 |
case ES1370_REG_MEMPAGE:
|
631 |
val = s->mempage; |
632 |
break;
|
633 |
case ES1370_REG_CONTROL + 0: |
634 |
case ES1370_REG_CONTROL + 1: |
635 |
case ES1370_REG_CONTROL + 2: |
636 |
case ES1370_REG_CONTROL + 3: |
637 |
val = s->ctl >> ((addr - ES1370_REG_CONTROL) << 3);
|
638 |
break;
|
639 |
case ES1370_REG_STATUS + 0: |
640 |
case ES1370_REG_STATUS + 1: |
641 |
case ES1370_REG_STATUS + 2: |
642 |
case ES1370_REG_STATUS + 3: |
643 |
val = s->status >> ((addr - ES1370_REG_STATUS) << 3);
|
644 |
break;
|
645 |
default:
|
646 |
val = ~0;
|
647 |
lwarn ("readb %#x -> %#x\n", addr, val);
|
648 |
break;
|
649 |
} |
650 |
return val;
|
651 |
} |
652 |
|
653 |
IO_READ_PROTO (es1370_readw) |
654 |
{ |
655 |
ES1370State *s = opaque; |
656 |
struct chan *d = &s->chan[0]; |
657 |
uint32_t val; |
658 |
|
659 |
addr = es1370_fixup (s, addr); |
660 |
|
661 |
switch (addr) {
|
662 |
case ES1370_REG_ADC_SCOUNT + 2: |
663 |
d++; |
664 |
case ES1370_REG_DAC2_SCOUNT + 2: |
665 |
d++; |
666 |
case ES1370_REG_DAC1_SCOUNT + 2: |
667 |
val = d->scount >> 16;
|
668 |
break;
|
669 |
|
670 |
case ES1370_REG_ADC_FRAMECNT:
|
671 |
d++; |
672 |
case ES1370_REG_DAC2_FRAMECNT:
|
673 |
d++; |
674 |
case ES1370_REG_DAC1_FRAMECNT:
|
675 |
val = d->frame_cnt & 0xffff;
|
676 |
break;
|
677 |
|
678 |
case ES1370_REG_ADC_FRAMECNT + 2: |
679 |
d++; |
680 |
case ES1370_REG_DAC2_FRAMECNT + 2: |
681 |
d++; |
682 |
case ES1370_REG_DAC1_FRAMECNT + 2: |
683 |
val = d->frame_cnt >> 16;
|
684 |
break;
|
685 |
|
686 |
default:
|
687 |
val = ~0;
|
688 |
lwarn ("readw %#x -> %#x\n", addr, val);
|
689 |
break;
|
690 |
} |
691 |
|
692 |
return val;
|
693 |
} |
694 |
|
695 |
IO_READ_PROTO (es1370_readl) |
696 |
{ |
697 |
ES1370State *s = opaque; |
698 |
uint32_t val; |
699 |
struct chan *d = &s->chan[0]; |
700 |
|
701 |
addr = es1370_fixup (s, addr); |
702 |
|
703 |
switch (addr) {
|
704 |
case ES1370_REG_CONTROL:
|
705 |
val = s->ctl; |
706 |
break;
|
707 |
case ES1370_REG_STATUS:
|
708 |
val = s->status; |
709 |
break;
|
710 |
case ES1370_REG_MEMPAGE:
|
711 |
val = s->mempage; |
712 |
break;
|
713 |
case ES1370_REG_CODEC:
|
714 |
val = s->codec; |
715 |
break;
|
716 |
case ES1370_REG_SERIAL_CONTROL:
|
717 |
val = s->sctl; |
718 |
break;
|
719 |
|
720 |
case ES1370_REG_ADC_SCOUNT:
|
721 |
d++; |
722 |
case ES1370_REG_DAC2_SCOUNT:
|
723 |
d++; |
724 |
case ES1370_REG_DAC1_SCOUNT:
|
725 |
val = d->scount; |
726 |
#ifdef DEBUG_ES1370
|
727 |
{ |
728 |
uint32_t curr_count = d->scount >> 16;
|
729 |
uint32_t count = d->scount & 0xffff;
|
730 |
|
731 |
curr_count <<= d->shift; |
732 |
count <<= d->shift; |
733 |
dolog ("read scount curr %d, total %d\n", curr_count, count);
|
734 |
} |
735 |
#endif
|
736 |
break;
|
737 |
|
738 |
case ES1370_REG_ADC_FRAMECNT:
|
739 |
d++; |
740 |
case ES1370_REG_DAC2_FRAMECNT:
|
741 |
d++; |
742 |
case ES1370_REG_DAC1_FRAMECNT:
|
743 |
val = d->frame_cnt; |
744 |
#ifdef DEBUG_ES1370
|
745 |
{ |
746 |
uint32_t size = ((d->frame_cnt & 0xffff) + 1) << 2; |
747 |
uint32_t curr = ((d->frame_cnt >> 16) + 1) << 2; |
748 |
if (curr > size) {
|
749 |
dolog ("read framecnt curr %d, size %d %d\n", curr, size,
|
750 |
curr > size); |
751 |
} |
752 |
} |
753 |
#endif
|
754 |
break;
|
755 |
|
756 |
case ES1370_REG_ADC_FRAMEADR:
|
757 |
d++; |
758 |
case ES1370_REG_DAC2_FRAMEADR:
|
759 |
d++; |
760 |
case ES1370_REG_DAC1_FRAMEADR:
|
761 |
val = d->frame_addr; |
762 |
break;
|
763 |
|
764 |
case ES1370_REG_PHANTOM_FRAMECNT:
|
765 |
val = ~0U;
|
766 |
lwarn ("reading from phantom frame count\n");
|
767 |
break;
|
768 |
case ES1370_REG_PHANTOM_FRAMEADR:
|
769 |
val = ~0U;
|
770 |
lwarn ("reading from phantom frame address\n");
|
771 |
break;
|
772 |
|
773 |
default:
|
774 |
val = ~0U;
|
775 |
lwarn ("readl %#x -> %#x\n", addr, val);
|
776 |
break;
|
777 |
} |
778 |
return val;
|
779 |
} |
780 |
|
781 |
static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel, |
782 |
int max, int *irq) |
783 |
{ |
784 |
uint8_t tmpbuf[4096];
|
785 |
uint32_t addr = d->frame_addr; |
786 |
int sc = d->scount & 0xffff; |
787 |
int csc = d->scount >> 16; |
788 |
int csc_bytes = (csc + 1) << d->shift; |
789 |
int cnt = d->frame_cnt >> 16; |
790 |
int size = d->frame_cnt & 0xffff; |
791 |
int left = ((size - cnt + 1) << 2) + d->leftover; |
792 |
int transferred = 0; |
793 |
int temp = audio_MIN (max, audio_MIN (left, csc_bytes));
|
794 |
int index = d - &s->chan[0]; |
795 |
|
796 |
addr += (cnt << 2) + d->leftover;
|
797 |
|
798 |
if (index == ADC_CHANNEL) {
|
799 |
while (temp) {
|
800 |
int acquired, to_copy;
|
801 |
|
802 |
to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf));
|
803 |
acquired = AUD_read (s->adc_voice, tmpbuf, to_copy); |
804 |
if (!acquired)
|
805 |
break;
|
806 |
|
807 |
pci_dma_write (&s->dev, addr, tmpbuf, acquired); |
808 |
|
809 |
temp -= acquired; |
810 |
addr += acquired; |
811 |
transferred += acquired; |
812 |
} |
813 |
} |
814 |
else {
|
815 |
SWVoiceOut *voice = s->dac_voice[index]; |
816 |
|
817 |
while (temp) {
|
818 |
int copied, to_copy;
|
819 |
|
820 |
to_copy = audio_MIN ((size_t) temp, sizeof (tmpbuf));
|
821 |
pci_dma_read (&s->dev, addr, tmpbuf, to_copy); |
822 |
copied = AUD_write (voice, tmpbuf, to_copy); |
823 |
if (!copied)
|
824 |
break;
|
825 |
temp -= copied; |
826 |
addr += copied; |
827 |
transferred += copied; |
828 |
} |
829 |
} |
830 |
|
831 |
if (csc_bytes == transferred) {
|
832 |
*irq = 1;
|
833 |
d->scount = sc | (sc << 16);
|
834 |
ldebug ("sc = %d, rate = %f\n",
|
835 |
(sc + 1) << d->shift,
|
836 |
(sc + 1) / (double) 44100); |
837 |
} |
838 |
else {
|
839 |
*irq = 0;
|
840 |
d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16); |
841 |
} |
842 |
|
843 |
cnt += (transferred + d->leftover) >> 2;
|
844 |
|
845 |
if (s->sctl & loop_sel) {
|
846 |
/* Bah, how stupid is that having a 0 represent true value?
|
847 |
i just spent few hours on this shit */
|
848 |
AUD_log ("es1370: warning", "non looping mode\n"); |
849 |
} |
850 |
else {
|
851 |
d->frame_cnt = size; |
852 |
|
853 |
if ((uint32_t) cnt <= d->frame_cnt)
|
854 |
d->frame_cnt |= cnt << 16;
|
855 |
} |
856 |
|
857 |
d->leftover = (transferred + d->leftover) & 3;
|
858 |
} |
859 |
|
860 |
static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail) |
861 |
{ |
862 |
uint32_t new_status = s->status; |
863 |
int max_bytes, irq;
|
864 |
struct chan *d = &s->chan[chan];
|
865 |
const struct chan_bits *b = &es1370_chan_bits[chan]; |
866 |
|
867 |
if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) {
|
868 |
return;
|
869 |
} |
870 |
|
871 |
max_bytes = free_or_avail; |
872 |
max_bytes &= ~((1 << d->shift) - 1); |
873 |
if (!max_bytes) {
|
874 |
return;
|
875 |
} |
876 |
|
877 |
es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq); |
878 |
|
879 |
if (irq) {
|
880 |
if (s->sctl & b->sctl_inten) {
|
881 |
new_status |= b->stat_int; |
882 |
} |
883 |
} |
884 |
|
885 |
if (new_status != s->status) {
|
886 |
es1370_update_status (s, new_status); |
887 |
} |
888 |
} |
889 |
|
890 |
static void es1370_dac1_callback (void *opaque, int free) |
891 |
{ |
892 |
ES1370State *s = opaque; |
893 |
|
894 |
es1370_run_channel (s, DAC1_CHANNEL, free); |
895 |
} |
896 |
|
897 |
static void es1370_dac2_callback (void *opaque, int free) |
898 |
{ |
899 |
ES1370State *s = opaque; |
900 |
|
901 |
es1370_run_channel (s, DAC2_CHANNEL, free); |
902 |
} |
903 |
|
904 |
static void es1370_adc_callback (void *opaque, int avail) |
905 |
{ |
906 |
ES1370State *s = opaque; |
907 |
|
908 |
es1370_run_channel (s, ADC_CHANNEL, avail); |
909 |
} |
910 |
|
911 |
static uint64_t es1370_read(void *opaque, hwaddr addr, |
912 |
unsigned size)
|
913 |
{ |
914 |
switch (size) {
|
915 |
case 1: |
916 |
return es1370_readb(opaque, addr);
|
917 |
case 2: |
918 |
return es1370_readw(opaque, addr);
|
919 |
case 4: |
920 |
return es1370_readl(opaque, addr);
|
921 |
default:
|
922 |
return -1; |
923 |
} |
924 |
} |
925 |
|
926 |
static void es1370_write(void *opaque, hwaddr addr, uint64_t val, |
927 |
unsigned size)
|
928 |
{ |
929 |
switch (size) {
|
930 |
case 1: |
931 |
es1370_writeb(opaque, addr, val); |
932 |
break;
|
933 |
case 2: |
934 |
es1370_writew(opaque, addr, val); |
935 |
break;
|
936 |
case 4: |
937 |
es1370_writel(opaque, addr, val); |
938 |
break;
|
939 |
} |
940 |
} |
941 |
|
942 |
static const MemoryRegionOps es1370_io_ops = { |
943 |
.read = es1370_read, |
944 |
.write = es1370_write, |
945 |
.impl = { |
946 |
.min_access_size = 1,
|
947 |
.max_access_size = 4,
|
948 |
}, |
949 |
.endianness = DEVICE_LITTLE_ENDIAN, |
950 |
}; |
951 |
|
952 |
static const VMStateDescription vmstate_es1370_channel = { |
953 |
.name = "es1370_channel",
|
954 |
.version_id = 2,
|
955 |
.minimum_version_id = 2,
|
956 |
.minimum_version_id_old = 2,
|
957 |
.fields = (VMStateField []) { |
958 |
VMSTATE_UINT32 (shift, struct chan),
|
959 |
VMSTATE_UINT32 (leftover, struct chan),
|
960 |
VMSTATE_UINT32 (scount, struct chan),
|
961 |
VMSTATE_UINT32 (frame_addr, struct chan),
|
962 |
VMSTATE_UINT32 (frame_cnt, struct chan),
|
963 |
VMSTATE_END_OF_LIST () |
964 |
} |
965 |
}; |
966 |
|
967 |
static int es1370_post_load (void *opaque, int version_id) |
968 |
{ |
969 |
uint32_t ctl, sctl; |
970 |
ES1370State *s = opaque; |
971 |
size_t i; |
972 |
|
973 |
for (i = 0; i < NB_CHANNELS; ++i) { |
974 |
if (i == ADC_CHANNEL) {
|
975 |
if (s->adc_voice) {
|
976 |
AUD_close_in (&s->card, s->adc_voice); |
977 |
s->adc_voice = NULL;
|
978 |
} |
979 |
} |
980 |
else {
|
981 |
if (s->dac_voice[i]) {
|
982 |
AUD_close_out (&s->card, s->dac_voice[i]); |
983 |
s->dac_voice[i] = NULL;
|
984 |
} |
985 |
} |
986 |
} |
987 |
|
988 |
ctl = s->ctl; |
989 |
sctl = s->sctl; |
990 |
s->ctl = 0;
|
991 |
s->sctl = 0;
|
992 |
es1370_update_voices (s, ctl, sctl); |
993 |
return 0; |
994 |
} |
995 |
|
996 |
static const VMStateDescription vmstate_es1370 = { |
997 |
.name = "es1370",
|
998 |
.version_id = 2,
|
999 |
.minimum_version_id = 2,
|
1000 |
.minimum_version_id_old = 2,
|
1001 |
.post_load = es1370_post_load, |
1002 |
.fields = (VMStateField []) { |
1003 |
VMSTATE_PCI_DEVICE (dev, ES1370State), |
1004 |
VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2,
|
1005 |
vmstate_es1370_channel, struct chan),
|
1006 |
VMSTATE_UINT32 (ctl, ES1370State), |
1007 |
VMSTATE_UINT32 (status, ES1370State), |
1008 |
VMSTATE_UINT32 (mempage, ES1370State), |
1009 |
VMSTATE_UINT32 (codec, ES1370State), |
1010 |
VMSTATE_UINT32 (sctl, ES1370State), |
1011 |
VMSTATE_END_OF_LIST () |
1012 |
} |
1013 |
}; |
1014 |
|
1015 |
static void es1370_on_reset (void *opaque) |
1016 |
{ |
1017 |
ES1370State *s = opaque; |
1018 |
es1370_reset (s); |
1019 |
} |
1020 |
|
1021 |
static int es1370_initfn (PCIDevice *dev) |
1022 |
{ |
1023 |
ES1370State *s = DO_UPCAST (ES1370State, dev, dev); |
1024 |
uint8_t *c = s->dev.config; |
1025 |
|
1026 |
c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8; |
1027 |
|
1028 |
#if 0
|
1029 |
c[PCI_CAPABILITY_LIST] = 0xdc;
|
1030 |
c[PCI_INTERRUPT_LINE] = 10;
|
1031 |
c[0xdc] = 0x00;
|
1032 |
#endif
|
1033 |
|
1034 |
c[PCI_INTERRUPT_PIN] = 1;
|
1035 |
c[PCI_MIN_GNT] = 0x0c;
|
1036 |
c[PCI_MAX_LAT] = 0x80;
|
1037 |
|
1038 |
memory_region_init_io (&s->io, &es1370_io_ops, s, "es1370", 256); |
1039 |
pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
|
1040 |
qemu_register_reset (es1370_on_reset, s); |
1041 |
|
1042 |
AUD_register_card ("es1370", &s->card);
|
1043 |
es1370_reset (s); |
1044 |
return 0; |
1045 |
} |
1046 |
|
1047 |
static void es1370_exitfn (PCIDevice *dev) |
1048 |
{ |
1049 |
ES1370State *s = DO_UPCAST (ES1370State, dev, dev); |
1050 |
|
1051 |
memory_region_destroy (&s->io); |
1052 |
} |
1053 |
|
1054 |
static int es1370_init (PCIBus *bus) |
1055 |
{ |
1056 |
pci_create_simple (bus, -1, "ES1370"); |
1057 |
return 0; |
1058 |
} |
1059 |
|
1060 |
static void es1370_class_init (ObjectClass *klass, void *data) |
1061 |
{ |
1062 |
DeviceClass *dc = DEVICE_CLASS (klass); |
1063 |
PCIDeviceClass *k = PCI_DEVICE_CLASS (klass); |
1064 |
|
1065 |
k->init = es1370_initfn; |
1066 |
k->exit = es1370_exitfn; |
1067 |
k->vendor_id = PCI_VENDOR_ID_ENSONIQ; |
1068 |
k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370; |
1069 |
k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO; |
1070 |
k->subsystem_vendor_id = 0x4942;
|
1071 |
k->subsystem_id = 0x4c4c;
|
1072 |
dc->desc = "ENSONIQ AudioPCI ES1370";
|
1073 |
dc->vmsd = &vmstate_es1370; |
1074 |
} |
1075 |
|
1076 |
static const TypeInfo es1370_info = { |
1077 |
.name = "ES1370",
|
1078 |
.parent = TYPE_PCI_DEVICE, |
1079 |
.instance_size = sizeof (ES1370State),
|
1080 |
.class_init = es1370_class_init, |
1081 |
}; |
1082 |
|
1083 |
static void es1370_register_types (void) |
1084 |
{ |
1085 |
type_register_static (&es1370_info); |
1086 |
pci_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370", es1370_init); |
1087 |
} |
1088 |
|
1089 |
type_init (es1370_register_types) |
1090 |
|