Revision 36f69651 target-ppc/op_helper_mem.h
b/target-ppc/op_helper_mem.h | ||
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} |
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#endif |
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/* Instruction cache invalidation helper */ |
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void glue(do_icbi, MEMSUFFIX) (void) |
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{ |
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uint32_t tmp; |
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/* Invalidate one cache line : |
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* PowerPC specification says this is to be treated like a load |
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* (not a fetch) by the MMU. To be sure it will be so, |
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* do the load "by hand". |
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*/ |
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tmp = glue(ldl, MEMSUFFIX)((uint32_t)T0); |
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T0 &= ~(ICACHE_LINE_SIZE - 1); |
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tb_invalidate_page_range((uint32_t)T0, (uint32_t)(T0 + ICACHE_LINE_SIZE)); |
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} |
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#if defined(TARGET_PPC64) |
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void glue(do_icbi_64, MEMSUFFIX) (void) |
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{ |
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uint64_t tmp; |
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/* Invalidate one cache line : |
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* PowerPC specification says this is to be treated like a load |
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* (not a fetch) by the MMU. To be sure it will be so, |
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* do the load "by hand". |
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*/ |
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tmp = glue(ldq, MEMSUFFIX)((uint64_t)T0); |
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T0 &= ~(ICACHE_LINE_SIZE - 1); |
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tb_invalidate_page_range((uint64_t)T0, (uint64_t)(T0 + ICACHE_LINE_SIZE)); |
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} |
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#endif |
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/* PPC 601 specific instructions (POWER bridge) */ |
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// XXX: to be tested |
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void glue(do_POWER_lscbx, MEMSUFFIX) (int dest, int ra, int rb) |
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