Revision 3761035f target-alpha/op_template.h
| b/target-alpha/op_template.h | ||
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/* Optimized constant loads */ |
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#if REG < 3 |
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void OPPROTO glue(op_reset_T, REG) (void) |
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{
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glue(T, REG) = 0; |
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RETURN(); |
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} |
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#if !defined(HOST_SPARC) && !defined(HOST_SPARC64) |
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void OPPROTO glue(op_reset_FT, REG) (void) |
| ... | ... | |
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} |
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#endif |
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/* XXX: This can be great on most RISC machines */ |
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#if !defined(__i386__) && !defined(__x86_64__) |
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void OPPROTO glue(op_set_s16_T, REG) (void) |
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{
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glue(T, REG) = (int16_t)PARAM(1); |
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RETURN(); |
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} |
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void OPPROTO glue(op_set_u16_T, REG) (void) |
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{
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glue(T, REG) = (uint16_t)PARAM(1); |
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RETURN(); |
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} |
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#endif |
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void OPPROTO glue(op_set_s32_T, REG) (void) |
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{
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glue(T, REG) = (int32_t)PARAM(1); |
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RETURN(); |
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} |
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void OPPROTO glue(op_set_u32_T, REG) (void) |
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{
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glue(T, REG) = (uint32_t)PARAM(1); |
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RETURN(); |
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} |
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#if 0 // Qemu does not know how to do this... |
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void OPPROTO glue(op_set_64_T, REG) (void) |
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{
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glue(T, REG) = (int64_t)PARAM(1); |
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RETURN(); |
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} |
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#else |
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void OPPROTO glue(op_set_64_T, REG) (void) |
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{
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glue(T, REG) = ((int64_t)PARAM(1) << 32) | (int64_t)PARAM(2); |
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RETURN(); |
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} |
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#endif |
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#endif /* REG < 3 */ |
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/* Fixed-point register moves */ |
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#if REG < 31 |
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void OPPROTO glue(op_load_T0_ir, REG) (void) |
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{
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T0 = env->ir[REG]; |
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RETURN(); |
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} |
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void OPPROTO glue(op_load_T1_ir, REG) (void) |
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{
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T1 = env->ir[REG]; |
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RETURN(); |
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} |
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void OPPROTO glue(op_load_T2_ir, REG) (void) |
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{
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T2 = env->ir[REG]; |
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RETURN(); |
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} |
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void OPPROTO glue(op_store_T0_ir, REG) (void) |
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{
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env->ir[REG] = T0; |
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RETURN(); |
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} |
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void OPPROTO glue(op_store_T1_ir, REG) (void) |
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{
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env->ir[REG] = T1; |
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RETURN(); |
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} |
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void OPPROTO glue(op_store_T2_ir, REG) (void) |
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{
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env->ir[REG] = T2; |
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RETURN(); |
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} |
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void OPPROTO glue(op_cmov_ir, REG) (void) |
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{
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if (T0) |
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