Archipelago » qemu

#include "vl.h"

/* Board init. */

enum gumstix_model_e { connex };

    cpu->env->regs[15] = 0x00000000;

}

static void connex_init(int ram_size, int vga_ram_size,

struct pxa2xx_gpio_info_s;

struct pxa2xx_gpio_info_s *pxa2xx_gpio_init(target_phys_addr_t base,

                CPUState *env, qemu_irq *pic, int lines);

/* pxa2xx_dma.c */

struct pxa2xx_dma_state_s;

struct pxa2xx_lcdc_s;

struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base,

                qemu_irq irq, DisplayState *ds);

void pxa2xx_lcdc_oritentation(void *opaque, int angle);

/* pxa2xx_mmci.c */

struct pxa2xx_state_s {

    CPUState *env;

    qemu_irq *pic;

    struct pxa2xx_dma_state_s *dma;

    struct pxa2xx_gpio_info_s *gpio;

    struct pxa2xx_lcdc_s *lcd;

                const char *revision);

struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds);

#endif	/* PXA_H */

    return s;

}

{

    struct pxa2xx_state_s *s = (struct pxa2xx_state_s *) opaque;

    if (level && (s->pm_regs[PCFR >> 2] & 0x10)) {	/* GPR_EN */

        cpu_reset(s->env);

        /* TODO: reset peripherals */

    register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load,

                    s->env);

    /* SDRAM & Internal Memory Storage */

    cpu_register_physical_memory(PXA2XX_SDRAM_BASE,

                    sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);

    /* GPIO1 resets the processor */

    /* The handler can be overridden by board-specific code */

    return s;

}

    register_savevm("cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load,

                    s->env);

    /* SDRAM & Internal Memory Storage */

    cpu_register_physical_memory(PXA2XX_SDRAM_BASE, sdram_size,

                    qemu_ram_alloc(sdram_size) | IO_MEM_RAM);

    /* GPIO1 resets the processor */

    /* The handler can be overridden by board-specific code */

    return s;

}

    qemu_irq *pic;

    int lines;

    CPUState *cpu_env;

    /* XXX: GNU C vectors are more suitable */

    uint32_t ilevel[PXA2XX_GPIO_BANKS];

    uint32_t gafr[PXA2XX_GPIO_BANKS * 2];

    uint32_t prev_level[PXA2XX_GPIO_BANKS];

};

static struct {

}

/* Bitmap of pins used as standby and sleep wake-up sources.  */

    0x8003fe1b, 0x002001fc, 0xec080000, 0x0012007f,

};

{

    int bank;

    uint32_t mask;

        for (diff = s->prev_level[i] ^ level; diff; diff ^= 1 << bit) {

            bit = ffs(diff) - 1;

            line = bit + 32 * i;

        }

        s->prev_level[i] = level;

    case GPLR:		/* GPIO Pin-Level registers */

        ret = (s->olevel[bank] & s->dir[bank]) |

                (s->ilevel[bank] & ~s->dir[bank]);

        return ret;

    case GEDR:		/* GPIO Edge Detect Status registers */

    s->pic = pic;

    s->lines = lines;

    s->cpu_env = env;

    iomemtype = cpu_register_io_memory(0, pxa2xx_gpio_readfn,

                    pxa2xx_gpio_writefn, s);

    return s;

}

    if (line >= s->lines) {

        printf("%s: No GPIO pin %i\n", __FUNCTION__, line);

        return;

    }

}

/*

 * Registers a callback to notify on GPLR reads.  This normally

 * shouldn't be needed but it is used for the hack on Spitz machines.

 */

    s->read_notify = handler;

}

        uint32_t command;

    } dma_ch[7];

    int orientation;

};

        dpy_update(s->ds, 0, miny, s->xres, maxy);

    pxa2xx_lcdc_int_update(s);

}

static void pxa2xx_invalidate_display(void *opaque)

    return s;

}

}

static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, };

struct spitz_keyboard_s {

    int keymap[0x80];

    uint16_t keyrow[SPITZ_KEY_SENSE_NUM];

    uint16_t strobe_state;

        if (strobe) {

            sense |= 1 << i;

            if (!(s->sense_state & (1 << i)))

        } else if (s->sense_state & (1 << i))

    }

    s->sense_state = sense;

}

{

}

static void spitz_keyboard_keydown(struct spitz_keyboard_s *s, int keycode)

    /* Handle the additional keys */

    if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {

                        spitz_gpio_invert[spitz_keycode & 0xf]);

        return;

    }

    s = (struct spitz_keyboard_s *)

            qemu_mallocz(sizeof(struct spitz_keyboard_s));

    memset(s, 0, sizeof(struct spitz_keyboard_s));

    for (i = 0; i < 0x80; i ++)

        s->keymap[i] = -1;

            if (spitz_keymap[i][j] != -1)

                s->keymap[spitz_keymap[i][j]] = (i << 4) | j;

    for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)

    spitz_keyboard_pre_map(s);

    qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s);

struct scoop_info_s {

    target_phys_addr_t target_base;

    uint16_t status;

    uint16_t power;

    uint32_t gpio_level;

    uint32_t gpio_dir;

    uint32_t prev_level;

    uint16_t mcr;

    uint16_t cdr;

    for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {

        bit = ffs(diff) - 1;

    }

    s->prev_level = level;

    scoop_writeb,

};

{

    if (level)

        s->gpio_level |= (1 << line);

        s->gpio_level &= ~(1 << line);

}

    if (line >= 16) {

        spitz_printf("No GPIO pin %i\n", line);

        return;

    }

}

static void scoop_save(QEMUFile *f, void *opaque)

    s[0].status = 0x02;

    s[1].status = 0x02;

    iomemtype = cpu_register_io_memory(0, scoop_readfn,

                    scoop_writefn, &s[0]);

    cpu_register_physical_memory(s[0].target_base, 0x1000, iomemtype);

    if (count < 2)

        return s;

    iomemtype = cpu_register_io_memory(0, scoop_readfn,

                    scoop_writefn, &s[1]);

    cpu_register_physical_memory(s[1].target_base, 0x1000, iomemtype);

        spitz_printf("LCD Backlight now off\n");

}

{

    int prev = bl_intensity;

        spitz_bl_update((struct pxa2xx_state_s *) opaque);

}

{

    bl_power = !!level;

    spitz_bl_update((struct pxa2xx_state_s *) opaque);

        max111x_write(max1111, value);

}

{

        lcd_en = !level;

        ads_en = !level;

        max_en = !level;

}

#define MAX1111_BATT_VOLT	1

#define SPITZ_BATTERY_VOLT	0xd0	/* About 4.0V */

#define SPITZ_CHARGEON_ACIN	0x80	/* About 5.0V */

{

    if (!max1111)

        return;

        max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);

}

static void spitz_ssp_save(QEMUFile *f, void *opaque)

{

    qemu_put_be32(f, lcd_en);

static void spitz_ssp_attach(struct pxa2xx_state_s *cpu)

{

    lcd_en = ads_en = max_en = 0;

    max1111 = max1111_init(0);

    max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);

    pxa2xx_ssp_attach(cpu->ssp[CORGI_SSP_PORT - 1], corgi_ssp_read,

                    corgi_ssp_write, cpu);

    bl_intensity = 0x20;

    bl_power = 0;

#define SPITZ_GPIO_WM	5

#ifdef HAS_AUDIO

{

    i2c_slave *wm = (i2c_slave *) opaque;

    if (level)

    /* Attach a WM8750 to the bus */

    wm = wm8750_init(bus, audio);

    /* .. and to the sound interface.  */

    cpu->i2s->opaque = wm;

    cpu->i2s->codec_out = wm8750_dac_dat;

/* Other peripherals */

{

}

#define SPITZ_SCP_LED_GREEN		1

static void spitz_scoop_gpio_setup(struct pxa2xx_state_s *cpu,

                struct scoop_info_s *scp, int num)

{

    if (num >= 2) {

    }

}

#define SPITZ_GPIO_HSYNC		22

#define SPITZ_GPIO_CF2_IRQ		106

#define SPITZ_GPIO_CF2_CD		93

{

    struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;

    spitz_hsync ^= 1;

}

static void spitz_mmc_coverswitch_change(void *opaque, int in)

{

    struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;

}

static void spitz_mmc_writeprotect_change(void *opaque, int wp)

{

    struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;

}

static void spitz_gpio_setup(struct pxa2xx_state_s *cpu, int slots)

{

    /*

     * Bad hack: We toggle the LCD hsync GPIO on every GPIO status

     * read to satisfy broken guests that poll-wait for hsync.

     * wouldn't guarantee that a guest ever exits the loop.

     */

    spitz_hsync = 0;

    /* MMC/SD host */

    pxa2xx_mmci_handlers(cpu->mmc, cpu, spitz_mmc_writeprotect_change,

                    spitz_mmc_coverswitch_change);

    /* Battery lock always closed */

    /* Handle reset */

    /* PCMCIA signals: card's IRQ and Card-Detect */

    if (slots >= 1)

    if (slots >= 2)

    /* Initialise the screen rotation related signals */

    spitz_gpio_invert[3] = 0;	/* Always open */

    } else {			/* Portrait mode */

        spitz_gpio_invert[4] = 1;

    }

}

/* Write the bootloader parameters memory area.  */

void ecc_put(QEMUFile *f, struct ecc_state_s *s);

void ecc_get(QEMUFile *f, struct ecc_state_s *s);

/* ads7846.c */

struct ads7846_state_s;

uint32_t ads7846_read(void *opaque);