Revision 38641a52 hw/pxa.h
| b/hw/pxa.h | ||
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| 72 | 72 |
struct pxa2xx_gpio_info_s; |
| 73 | 73 |
struct pxa2xx_gpio_info_s *pxa2xx_gpio_init(target_phys_addr_t base, |
| 74 | 74 |
CPUState *env, qemu_irq *pic, int lines); |
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void pxa2xx_gpio_set(struct pxa2xx_gpio_info_s *s, int line, int level); |
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void pxa2xx_gpio_handler_set(struct pxa2xx_gpio_info_s *s, int line, |
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gpio_handler_t handler, void *opaque); |
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void pxa2xx_gpio_read_notifier(struct pxa2xx_gpio_info_s *s, |
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void (*handler)(void *opaque), void *opaque); |
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qemu_irq *pxa2xx_gpio_in_get(struct pxa2xx_gpio_info_s *s); |
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void pxa2xx_gpio_out_set(struct pxa2xx_gpio_info_s *s, |
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int line, qemu_irq handler); |
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void pxa2xx_gpio_read_notifier(struct pxa2xx_gpio_info_s *s, qemu_irq handler); |
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| 80 | 79 |
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| 81 | 80 |
/* pxa2xx_dma.c */ |
| 82 | 81 |
struct pxa2xx_dma_state_s; |
| ... | ... | |
| 90 | 89 |
struct pxa2xx_lcdc_s; |
| 91 | 90 |
struct pxa2xx_lcdc_s *pxa2xx_lcdc_init(target_phys_addr_t base, |
| 92 | 91 |
qemu_irq irq, DisplayState *ds); |
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void pxa2xx_lcd_vsync_cb(struct pxa2xx_lcdc_s *s, |
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void (*cb)(void *opaque), void *opaque); |
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void pxa2xx_lcd_vsync_notifier(struct pxa2xx_lcdc_s *s, qemu_irq handler); |
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| 95 | 93 |
void pxa2xx_lcdc_oritentation(void *opaque, int angle); |
| 96 | 94 |
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| 97 | 95 |
/* pxa2xx_mmci.c */ |
| ... | ... | |
| 126 | 124 |
struct pxa2xx_state_s {
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| 127 | 125 |
CPUState *env; |
| 128 | 126 |
qemu_irq *pic; |
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qemu_irq reset; |
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| 129 | 128 |
struct pxa2xx_dma_state_s *dma; |
| 130 | 129 |
struct pxa2xx_gpio_info_s *gpio; |
| 131 | 130 |
struct pxa2xx_lcdc_s *lcd; |
| ... | ... | |
| 209 | 208 |
const char *revision); |
| 210 | 209 |
struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size, DisplayState *ds); |
| 211 | 210 |
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void pxa2xx_reset(int line, int level, void *opaque); |
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| 214 | 211 |
#endif /* PXA_H */ |
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