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/*
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 * PalmOne's (TM) PDAs.
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 *
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 * Copyright (C) 2006-2007 Andrzej Zaborowski  <balrog@zabor.org>
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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#include "vl.h"
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static uint32_t static_readb(void *opaque, target_phys_addr_t offset)
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{
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    uint32_t *val = (uint32_t *) opaque;
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    return *val >> ((offset & 3) << 3);
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}
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static uint32_t static_readh(void *opaque, target_phys_addr_t offset) {
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    uint32_t *val = (uint32_t *) opaque;
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    return *val >> ((offset & 1) << 3);
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}
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static uint32_t static_readw(void *opaque, target_phys_addr_t offset) {
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    uint32_t *val = (uint32_t *) opaque;
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    return *val >> ((offset & 0) << 3);
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}
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static void static_write(void *opaque, target_phys_addr_t offset,
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                uint32_t value) {
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#ifdef SPY
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    printf("%s: value %08lx written at " PA_FMT "\n",
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                    __FUNCTION__, value, offset);
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#endif
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}
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static CPUReadMemoryFunc *static_readfn[] = {
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    static_readb,
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    static_readh,
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    static_readw,
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};
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static CPUWriteMemoryFunc *static_writefn[] = {
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    static_write,
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    static_write,
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    static_write,
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};
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/* Palm Tunsgten|E support */
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static void palmte_microwire_setup(struct omap_mpu_state_s *cpu)
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{
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}
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static struct {
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    int row;
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    int column;
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} palmte_keymap[0x80] = {
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    [0 ... 0x7f] = { -1, -1 },
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    [0x3b] = { 0, 0 },        /* F1        -> Calendar */
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    [0x3c] = { 1, 0 },        /* F2        -> Contacts */
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    [0x3d] = { 2, 0 },        /* F3        -> Tasks List */
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    [0x3e] = { 3, 0 },        /* F4        -> Note Pad */
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    [0x01] = { 4, 0 },        /* Esc        -> Power */
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    [0x4b] = { 0, 1 },        /*            Left */
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    [0x50] = { 1, 1 },        /*            Down */
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    [0x48] = { 2, 1 },        /*           Up */
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    [0x4d] = { 3, 1 },        /*           Right */
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    [0x4c] = { 4, 1 },        /*            Centre */
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    [0x39] = { 4, 1 },        /* Spc        -> Centre */
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};
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static void palmte_button_event(void *opaque, int keycode)
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{
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    struct omap_mpu_state_s *cpu = (struct omap_mpu_state_s *) opaque;
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    if (palmte_keymap[keycode & 0x7f].row != -1)
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        omap_mpuio_key(cpu->mpuio,
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                        palmte_keymap[keycode & 0x7f].row,
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                        palmte_keymap[keycode & 0x7f].column,
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                        !(keycode & 0x80));
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}
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static void palmte_init(int ram_size, int vga_ram_size, int boot_device,
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                DisplayState *ds, const char **fd_filename, int snapshot,
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                const char *kernel_filename, const char *kernel_cmdline,
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                const char *initrd_filename, const char *cpu_model)
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{
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    struct omap_mpu_state_s *cpu;
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    int flash_size = 0x00800000;
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    int sdram_size = 0x02000000;
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    int io;
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    static uint32_t cs0val = 0xffffffff;
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    static uint32_t cs1val = 0x0000e1a0;
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    static uint32_t cs2val = 0x0000e1a0;
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    static uint32_t cs3val = 0xe1a0e1a0;
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    ram_addr_t phys_flash;
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    int rom_size, rom_loaded = 0;
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    if (ram_size < flash_size + sdram_size + OMAP15XX_SRAM_SIZE) {
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        fprintf(stderr, "This architecture uses %i bytes of memory\n",
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                        flash_size + sdram_size + OMAP15XX_SRAM_SIZE);
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        exit(1);
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    }
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    cpu = omap310_mpu_init(sdram_size, ds, cpu_model);
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    /* External Flash (EMIFS) */
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    cpu_register_physical_memory(OMAP_CS0_BASE, flash_size,
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                    (phys_flash = qemu_ram_alloc(flash_size)) | IO_MEM_ROM);
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    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs0val);
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    cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
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                    OMAP_CS0_SIZE - flash_size, io);
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    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs1val);
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    cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
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    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs2val);
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    cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
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    io = cpu_register_io_memory(0, static_readfn, static_writefn, &cs3val);
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    cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);
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    palmte_microwire_setup(cpu);
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    qemu_add_kbd_event_handler(palmte_button_event, cpu);
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    /* Setup initial (reset) machine state */
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    if (nb_option_roms) {
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        rom_size = get_image_size(option_rom[0]);
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        if (rom_size > flash_size)
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            fprintf(stderr, "%s: ROM image too big (%x > %x)\n",
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                            __FUNCTION__, rom_size, flash_size);
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        else if (rom_size > 0 && load_image(option_rom[0],
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                                phys_ram_base + phys_flash) > 0) {
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            rom_loaded = 1;
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            cpu->env->regs[15] = 0x00000000;
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        } else
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            fprintf(stderr, "%s: error loading '%s'\n",
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                            __FUNCTION__, option_rom[0]);
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    }
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    if (!rom_loaded && !kernel_filename) {
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        fprintf(stderr, "Kernel or ROM image must be specified\n");
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        exit(1);
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    }
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    /* Load the kernel.  */
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    if (kernel_filename) {
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        /* Start at bootloader.  */
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        cpu->env->regs[15] = OMAP_EMIFF_BASE;
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        arm_load_kernel(cpu->env, sdram_size, kernel_filename, kernel_cmdline,
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                        initrd_filename, 0x331, OMAP_EMIFF_BASE);
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    }
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    dpy_resize(ds, 320, 320);
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}
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QEMUMachine palmte_machine = {
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    "cheetah",
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    "Palm Tungsten|E aka. Cheetah PDA (OMAP310)",
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    palmte_init,
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};