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# Date Author Comment
390efc54 05/11/2008 05:35 pm pbrook

Add TCG native negation op.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
86831435 05/11/2008 03:22 pm pbrook

Add zero extension (pseudo-)ops.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4424 c046a42c-6fe2-441c-8c8c-71466251a162
2f3a1b07 05/10/2008 10:20 pm edgar_igl

CRIS: helper_dummy no longer needed as barrier for qemu_ld/st.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4416 c046a42c-6fe2-441c-8c8c-71466251a162
73e51723 05/09/2008 11:14 am edgar_igl

CRIS: Concistent use of btarget and make it possible to single-step over delayslots.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4389 c046a42c-6fe2-441c-8c8c-71466251a162
dceaf394 05/07/2008 06:24 pm edgar_igl CRIS: More TCG conversion.
  • Convert moves to/from support function regs (including TLB updates) to TCG.
  • SCC no longer requires T0 to strictly be 0 or 1, relaxed to 0 or non-zero.
  • Convert the the condition code evaluation to TCG.
  • Convert rfe into a helper and TCG....
17ac9754 05/06/2008 11:30 am edgar_igl More TCG updates for CRIS
  • Convert parts of the jump logic to TCG.
  • Stores no longer have to go via T0/T1.
  • Use the byte and halfword ldx_code variants when appropriate for insn fetching.
  • Do not disassemble beyond the translation block.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4350 c046a42c-6fe2-441c-8c8c-71466251a162
aae6b32a 05/04/2008 12:34 am edgar_igl

CRIS: Convert divide step to TCG.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4313 c046a42c-6fe2-441c-8c8c-71466251a162
d059c172 05/03/2008 08:11 pm edgar_igl

CRIS: Convert lz (leading zeros) to TCG.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4309 c046a42c-6fe2-441c-8c8c-71466251a162
50cfa95c 05/03/2008 11:36 am edgar_igl

CRIS: Eliminate a few unneeded moves to/from T0/T1.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4306 c046a42c-6fe2-441c-8c8c-71466251a162
c7d05695 05/03/2008 09:54 am edgar_igl

CRIS: Do post-increment without going via T0.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4304 c046a42c-6fe2-441c-8c8c-71466251a162
b41f7df0 05/03/2008 01:16 am edgar_igl CRIS updates:
  • Support both the I and D MMUs and improve the accuracy of the MMU model.
  • Handle the automatic user/kernel stack pointer switching when leaving or entering user mode.
  • Move the CCS evaluation into helper funcs.
  • Make sure user-mode cannot change flags only writeable in kernel mode....
d2856f1a 04/28/2008 03:32 am aurel32

Factorize code in translate.c

(Glauber Costa)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
ca10f867 04/12/2008 12:35 am aurel32

Remove osdep.c/qemu-img code duplication

(Kevin Wolf)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
a825e703 03/16/2008 06:51 pm edgar_igl

More TCG conversions for CRIS.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4071 c046a42c-6fe2-441c-8c8c-71466251a162
3157a0a9 03/15/2008 10:45 pm edgar_igl More TCG conversions for CRIS.
  • Bit swap insn (bitwise not, endian swap and bit reverse).
  • Muls and mulu.
  • Extended arithmetics.
  • Parts of the condition code handling.
  • Use tcg_const_tl.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4069 c046a42c-6fe2-441c-8c8c-71466251a162
54728ac6 03/15/2008 11:13 am edgar_igl

Simplified some dead extended arith code after search and replace.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4066 c046a42c-6fe2-441c-8c8c-71466251a162
05ba7d5f 03/14/2008 03:11 am edgar_igl

A first small step to convert the CRIS translator to TCG.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4057 c046a42c-6fe2-441c-8c8c-71466251a162
4f400ab5 02/28/2008 11:37 am edgar_igl

Cut the translation block after translating a break insn. This avoids an issue where QEMU finds an illegal CRIS insn while the guest is returning through a signal return trampoline.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3997 c046a42c-6fe2-441c-8c8c-71466251a162
9004627f 02/28/2008 10:28 am edgar_igl

More consistent naming for CRIS register-number macros.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3996 c046a42c-6fe2-441c-8c8c-71466251a162
5d4a534d 02/25/2008 11:58 am edgar_igl

Silently ignore CRIS cache flushes, instead of aborting due to unknown insn.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3990 c046a42c-6fe2-441c-8c8c-71466251a162
57fec1fe 02/01/2008 12:50 pm bellard

use the TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
fd56059f 01/14/2008 05:18 am balrog

Optimize clear insns by treating support reg P0 specially and
add missing micro-op RETURN's (Edgar E. Iglesias).

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3913 c046a42c-6fe2-441c-8c8c-71466251a162
aaed909a 11/10/2007 05:15 pm bellard

added cpu_model parameter to cpu_init()

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
8170028d 10/08/2007 03:49 pm ths

CRIS instruction translation, by Edgar E. Iglesias.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3358 c046a42c-6fe2-441c-8c8c-71466251a162