root / tcg / tcg-op.h @ 390efc54
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "tcg.h" |
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#ifdef CONFIG_DYNGEN_OP
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/* legacy dyngen operations */
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#include "gen-op.h" |
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#endif
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int gen_new_label(void); |
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static inline void tcg_gen_op1(int opc, TCGv arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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} |
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static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = arg1; |
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} |
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static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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} |
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static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = arg2; |
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} |
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static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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} |
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static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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} |
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static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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} |
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static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
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TCGArg arg4) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = arg3; |
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*gen_opparam_ptr++ = arg4; |
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} |
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static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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} |
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static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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} |
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static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGv arg5, TCGv arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = GET_TCGV(arg5); |
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*gen_opparam_ptr++ = GET_TCGV(arg6); |
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} |
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static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4, |
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TCGArg arg5, TCGArg arg6) |
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{ |
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*gen_opc_ptr++ = opc; |
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*gen_opparam_ptr++ = GET_TCGV(arg1); |
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*gen_opparam_ptr++ = GET_TCGV(arg2); |
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*gen_opparam_ptr++ = GET_TCGV(arg3); |
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*gen_opparam_ptr++ = GET_TCGV(arg4); |
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*gen_opparam_ptr++ = arg5; |
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*gen_opparam_ptr++ = arg6; |
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} |
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static inline void gen_set_label(int n) |
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{ |
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tcg_gen_op1i(INDEX_op_set_label, n); |
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} |
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static inline void tcg_gen_br(int label) |
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{ |
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tcg_gen_op1i(INDEX_op_br, label); |
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} |
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static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
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{ |
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if (GET_TCGV(ret) != GET_TCGV(arg))
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tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
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} |
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static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
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{ |
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tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
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} |
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/* helper calls */
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#define TCG_HELPER_CALL_FLAGS 0 |
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static inline void tcg_gen_helper_0_0(void *func) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 0, NULL); |
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} |
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static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 1, &arg); |
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} |
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static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 2, args); |
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} |
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static inline void tcg_gen_helper_0_3(void *func, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 3, args); |
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} |
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static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
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TCGv arg3, TCGv arg4) |
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{ |
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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0, NULL, 4, args); |
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} |
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static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 0, NULL); |
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} |
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static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
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{ |
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 1, &arg1); |
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} |
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static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2) |
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{ |
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TCGv args[2];
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args[0] = arg1;
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args[1] = arg2;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 2, args); |
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} |
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static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3) |
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{ |
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TCGv args[3];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 3, args); |
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} |
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static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
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TCGv arg1, TCGv arg2, TCGv arg3, |
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TCGv arg4) |
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{ |
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TCGv args[4];
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args[0] = arg1;
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args[1] = arg2;
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args[2] = arg3;
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args[3] = arg4;
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tcg_gen_call(&tcg_ctx, |
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tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, |
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1, &ret, 4, args); |
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} |
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/* 32 bit ops */
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static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
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} |
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static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
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{ |
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tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
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} |
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static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
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static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
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} |
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static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_movi_i32(ret, 0);
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} else if (arg2 == 0xffffffff) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
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} |
367 |
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static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
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{ |
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tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
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} |
372 |
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static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0xffffffff) { |
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tcg_gen_movi_i32(ret, 0xffffffff);
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} else if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
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} else {
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tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); |
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} |
383 |
} |
384 |
|
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static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
386 |
{ |
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tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
388 |
} |
389 |
|
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static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
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{ |
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/* some cases can be optimized here */
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if (arg2 == 0) { |
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tcg_gen_mov_i32(ret, arg1); |
395 |
} else {
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tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); |
397 |
} |
398 |
} |
399 |
|
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static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
401 |
{ |
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tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
403 |
} |
404 |
|
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static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
406 |
{ |
407 |
tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); |
408 |
} |
409 |
|
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static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
411 |
{ |
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tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
413 |
} |
414 |
|
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static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
416 |
{ |
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tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); |
418 |
} |
419 |
|
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static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
421 |
{ |
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tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
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} |
424 |
|
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static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
426 |
{ |
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tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); |
428 |
} |
429 |
|
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static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
431 |
int label_index)
|
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{ |
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tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
434 |
} |
435 |
|
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static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
437 |
{ |
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tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
439 |
} |
440 |
|
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static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
442 |
{ |
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tcg_gen_mul_i32(ret, arg1, tcg_const_i32(arg2)); |
444 |
} |
445 |
|
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#ifdef TCG_TARGET_HAS_div_i32
|
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static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
448 |
{ |
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tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
450 |
} |
451 |
|
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static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
453 |
{ |
454 |
tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
455 |
} |
456 |
|
457 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
458 |
{ |
459 |
tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
460 |
} |
461 |
|
462 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
463 |
{ |
464 |
tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
465 |
} |
466 |
#else
|
467 |
static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
468 |
{ |
469 |
TCGv t0; |
470 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
471 |
tcg_gen_sari_i32(t0, arg1, 31);
|
472 |
tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
473 |
} |
474 |
|
475 |
static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
476 |
{ |
477 |
TCGv t0; |
478 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
479 |
tcg_gen_sari_i32(t0, arg1, 31);
|
480 |
tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
481 |
} |
482 |
|
483 |
static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
484 |
{ |
485 |
TCGv t0; |
486 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
487 |
tcg_gen_movi_i32(t0, 0);
|
488 |
tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
489 |
} |
490 |
|
491 |
static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
492 |
{ |
493 |
TCGv t0; |
494 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
495 |
tcg_gen_movi_i32(t0, 0);
|
496 |
tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
497 |
} |
498 |
#endif
|
499 |
|
500 |
#if TCG_TARGET_REG_BITS == 32 |
501 |
|
502 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
503 |
{ |
504 |
if (GET_TCGV(ret) != GET_TCGV(arg)) {
|
505 |
tcg_gen_mov_i32(ret, arg); |
506 |
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
507 |
} |
508 |
} |
509 |
|
510 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
511 |
{ |
512 |
tcg_gen_movi_i32(ret, arg); |
513 |
tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32);
|
514 |
} |
515 |
|
516 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
517 |
{ |
518 |
tcg_gen_ld8u_i32(ret, arg2, offset); |
519 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
520 |
} |
521 |
|
522 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
523 |
{ |
524 |
tcg_gen_ld8s_i32(ret, arg2, offset); |
525 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
526 |
} |
527 |
|
528 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
529 |
{ |
530 |
tcg_gen_ld16u_i32(ret, arg2, offset); |
531 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
532 |
} |
533 |
|
534 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
535 |
{ |
536 |
tcg_gen_ld16s_i32(ret, arg2, offset); |
537 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
538 |
} |
539 |
|
540 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
541 |
{ |
542 |
tcg_gen_ld_i32(ret, arg2, offset); |
543 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
544 |
} |
545 |
|
546 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
547 |
{ |
548 |
tcg_gen_ld_i32(ret, arg2, offset); |
549 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
550 |
} |
551 |
|
552 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
553 |
{ |
554 |
/* since arg2 and ret have different types, they cannot be the
|
555 |
same temporary */
|
556 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
557 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
558 |
tcg_gen_ld_i32(ret, arg2, offset + 4);
|
559 |
#else
|
560 |
tcg_gen_ld_i32(ret, arg2, offset); |
561 |
tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4);
|
562 |
#endif
|
563 |
} |
564 |
|
565 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
566 |
{ |
567 |
tcg_gen_st8_i32(arg1, arg2, offset); |
568 |
} |
569 |
|
570 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
571 |
{ |
572 |
tcg_gen_st16_i32(arg1, arg2, offset); |
573 |
} |
574 |
|
575 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
576 |
{ |
577 |
tcg_gen_st_i32(arg1, arg2, offset); |
578 |
} |
579 |
|
580 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
581 |
{ |
582 |
#ifdef TCG_TARGET_WORDS_BIGENDIAN
|
583 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
584 |
tcg_gen_st_i32(arg1, arg2, offset + 4);
|
585 |
#else
|
586 |
tcg_gen_st_i32(arg1, arg2, offset); |
587 |
tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4);
|
588 |
#endif
|
589 |
} |
590 |
|
591 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
592 |
{ |
593 |
tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
594 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
595 |
} |
596 |
|
597 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
598 |
{ |
599 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
600 |
} |
601 |
|
602 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
603 |
{ |
604 |
tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
605 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
606 |
} |
607 |
|
608 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
609 |
{ |
610 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
611 |
} |
612 |
|
613 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
614 |
{ |
615 |
tcg_gen_and_i32(ret, arg1, arg2); |
616 |
tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
617 |
} |
618 |
|
619 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
620 |
{ |
621 |
tcg_gen_andi_i32(ret, arg1, arg2); |
622 |
tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
623 |
} |
624 |
|
625 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
626 |
{ |
627 |
tcg_gen_or_i32(ret, arg1, arg2); |
628 |
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
629 |
} |
630 |
|
631 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
632 |
{ |
633 |
tcg_gen_ori_i32(ret, arg1, arg2); |
634 |
tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
635 |
} |
636 |
|
637 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
638 |
{ |
639 |
tcg_gen_xor_i32(ret, arg1, arg2); |
640 |
tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
641 |
} |
642 |
|
643 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
644 |
{ |
645 |
tcg_gen_xori_i32(ret, arg1, arg2); |
646 |
tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
|
647 |
} |
648 |
|
649 |
/* XXX: use generic code when basic block handling is OK or CPU
|
650 |
specific code (x86) */
|
651 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
652 |
{ |
653 |
tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
654 |
} |
655 |
|
656 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
657 |
{ |
658 |
tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
659 |
} |
660 |
|
661 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
662 |
{ |
663 |
tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
664 |
} |
665 |
|
666 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
667 |
{ |
668 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
669 |
} |
670 |
|
671 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
672 |
{ |
673 |
tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
674 |
} |
675 |
|
676 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
677 |
{ |
678 |
tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
679 |
} |
680 |
|
681 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
682 |
int label_index)
|
683 |
{ |
684 |
tcg_gen_op6ii(INDEX_op_brcond2_i32, |
685 |
arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
686 |
cond, label_index); |
687 |
} |
688 |
|
689 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
690 |
{ |
691 |
TCGv t0, t1; |
692 |
|
693 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
694 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
695 |
|
696 |
tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
697 |
|
698 |
tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
699 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
700 |
tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
701 |
tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
702 |
|
703 |
tcg_gen_mov_i64(ret, t0); |
704 |
} |
705 |
|
706 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
707 |
{ |
708 |
tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2)); |
709 |
} |
710 |
|
711 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
712 |
{ |
713 |
tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
714 |
} |
715 |
|
716 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
717 |
{ |
718 |
tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
719 |
} |
720 |
|
721 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
722 |
{ |
723 |
tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
724 |
} |
725 |
|
726 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
727 |
{ |
728 |
tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
729 |
} |
730 |
|
731 |
#else
|
732 |
|
733 |
static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
734 |
{ |
735 |
if (GET_TCGV(ret) != GET_TCGV(arg))
|
736 |
tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
737 |
} |
738 |
|
739 |
static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
740 |
{ |
741 |
tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
742 |
} |
743 |
|
744 |
static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
745 |
tcg_target_long offset) |
746 |
{ |
747 |
tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
748 |
} |
749 |
|
750 |
static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
751 |
tcg_target_long offset) |
752 |
{ |
753 |
tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
754 |
} |
755 |
|
756 |
static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
757 |
tcg_target_long offset) |
758 |
{ |
759 |
tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
760 |
} |
761 |
|
762 |
static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
763 |
tcg_target_long offset) |
764 |
{ |
765 |
tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
766 |
} |
767 |
|
768 |
static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
769 |
tcg_target_long offset) |
770 |
{ |
771 |
tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
772 |
} |
773 |
|
774 |
static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
775 |
tcg_target_long offset) |
776 |
{ |
777 |
tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
778 |
} |
779 |
|
780 |
static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
781 |
{ |
782 |
tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
783 |
} |
784 |
|
785 |
static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
786 |
tcg_target_long offset) |
787 |
{ |
788 |
tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
789 |
} |
790 |
|
791 |
static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
792 |
tcg_target_long offset) |
793 |
{ |
794 |
tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
795 |
} |
796 |
|
797 |
static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
798 |
tcg_target_long offset) |
799 |
{ |
800 |
tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
801 |
} |
802 |
|
803 |
static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
804 |
{ |
805 |
tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
806 |
} |
807 |
|
808 |
static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
809 |
{ |
810 |
tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
811 |
} |
812 |
|
813 |
static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
814 |
{ |
815 |
tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); |
816 |
} |
817 |
|
818 |
static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
819 |
{ |
820 |
tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
821 |
} |
822 |
|
823 |
static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
824 |
{ |
825 |
tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); |
826 |
} |
827 |
|
828 |
static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
829 |
{ |
830 |
tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
831 |
} |
832 |
|
833 |
static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
834 |
{ |
835 |
tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); |
836 |
} |
837 |
|
838 |
static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
839 |
{ |
840 |
tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
841 |
} |
842 |
|
843 |
static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
844 |
{ |
845 |
tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); |
846 |
} |
847 |
|
848 |
static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
849 |
{ |
850 |
tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
851 |
} |
852 |
|
853 |
static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
854 |
{ |
855 |
tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); |
856 |
} |
857 |
|
858 |
static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
859 |
{ |
860 |
tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
861 |
} |
862 |
|
863 |
static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
864 |
{ |
865 |
tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); |
866 |
} |
867 |
|
868 |
static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
869 |
{ |
870 |
tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
871 |
} |
872 |
|
873 |
static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
874 |
{ |
875 |
tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); |
876 |
} |
877 |
|
878 |
static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
879 |
{ |
880 |
tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
881 |
} |
882 |
|
883 |
static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
884 |
{ |
885 |
tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); |
886 |
} |
887 |
|
888 |
static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
889 |
int label_index)
|
890 |
{ |
891 |
tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
892 |
} |
893 |
|
894 |
static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
895 |
{ |
896 |
tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
897 |
} |
898 |
|
899 |
static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
900 |
{ |
901 |
tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2)); |
902 |
} |
903 |
|
904 |
#ifdef TCG_TARGET_HAS_div_i64
|
905 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
906 |
{ |
907 |
tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
908 |
} |
909 |
|
910 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
911 |
{ |
912 |
tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
913 |
} |
914 |
|
915 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
916 |
{ |
917 |
tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
918 |
} |
919 |
|
920 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
921 |
{ |
922 |
tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
923 |
} |
924 |
#else
|
925 |
static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
926 |
{ |
927 |
TCGv t0; |
928 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
929 |
tcg_gen_sari_i64(t0, arg1, 63);
|
930 |
tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
931 |
} |
932 |
|
933 |
static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
934 |
{ |
935 |
TCGv t0; |
936 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
937 |
tcg_gen_sari_i64(t0, arg1, 63);
|
938 |
tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
939 |
} |
940 |
|
941 |
static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
942 |
{ |
943 |
TCGv t0; |
944 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
945 |
tcg_gen_movi_i64(t0, 0);
|
946 |
tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
947 |
} |
948 |
|
949 |
static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
950 |
{ |
951 |
TCGv t0; |
952 |
t0 = tcg_temp_new(TCG_TYPE_I64); |
953 |
tcg_gen_movi_i64(t0, 0);
|
954 |
tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
955 |
} |
956 |
#endif
|
957 |
|
958 |
#endif
|
959 |
|
960 |
/***************************************/
|
961 |
/* optional operations */
|
962 |
|
963 |
static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
964 |
{ |
965 |
#ifdef TCG_TARGET_HAS_ext8s_i32
|
966 |
tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
967 |
#else
|
968 |
tcg_gen_shli_i32(ret, arg, 24);
|
969 |
tcg_gen_sari_i32(ret, ret, 24);
|
970 |
#endif
|
971 |
} |
972 |
|
973 |
static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
974 |
{ |
975 |
#ifdef TCG_TARGET_HAS_ext16s_i32
|
976 |
tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
977 |
#else
|
978 |
tcg_gen_shli_i32(ret, arg, 16);
|
979 |
tcg_gen_sari_i32(ret, ret, 16);
|
980 |
#endif
|
981 |
} |
982 |
|
983 |
/* These are currently just for convenience.
|
984 |
We assume a target will recognise these automatically . */
|
985 |
static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) |
986 |
{ |
987 |
tcg_gen_andi_i32(ret, arg, 0xffu);
|
988 |
} |
989 |
|
990 |
static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) |
991 |
{ |
992 |
tcg_gen_andi_i32(ret, arg, 0xffffu);
|
993 |
} |
994 |
|
995 |
/* Note: we assume the two high bytes are set to zero */
|
996 |
static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
997 |
{ |
998 |
#ifdef TCG_TARGET_HAS_bswap16_i32
|
999 |
tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
1000 |
#else
|
1001 |
TCGv t0, t1; |
1002 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1003 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1004 |
|
1005 |
tcg_gen_shri_i32(t0, arg, 8);
|
1006 |
tcg_gen_andi_i32(t1, arg, 0x000000ff);
|
1007 |
tcg_gen_shli_i32(t1, t1, 8);
|
1008 |
tcg_gen_or_i32(ret, t0, t1); |
1009 |
#endif
|
1010 |
} |
1011 |
|
1012 |
static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
1013 |
{ |
1014 |
#ifdef TCG_TARGET_HAS_bswap_i32
|
1015 |
tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
1016 |
#else
|
1017 |
TCGv t0, t1; |
1018 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1019 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1020 |
|
1021 |
tcg_gen_shli_i32(t0, arg, 24);
|
1022 |
|
1023 |
tcg_gen_andi_i32(t1, arg, 0x0000ff00);
|
1024 |
tcg_gen_shli_i32(t1, t1, 8);
|
1025 |
tcg_gen_or_i32(t0, t0, t1); |
1026 |
|
1027 |
tcg_gen_shri_i32(t1, arg, 8);
|
1028 |
tcg_gen_andi_i32(t1, t1, 0x0000ff00);
|
1029 |
tcg_gen_or_i32(t0, t0, t1); |
1030 |
|
1031 |
tcg_gen_shri_i32(t1, arg, 24);
|
1032 |
tcg_gen_or_i32(ret, t0, t1); |
1033 |
#endif
|
1034 |
} |
1035 |
|
1036 |
#if TCG_TARGET_REG_BITS == 32 |
1037 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1038 |
{ |
1039 |
tcg_gen_ext8s_i32(ret, arg); |
1040 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1041 |
} |
1042 |
|
1043 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1044 |
{ |
1045 |
tcg_gen_ext16s_i32(ret, arg); |
1046 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1047 |
} |
1048 |
|
1049 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1050 |
{ |
1051 |
tcg_gen_mov_i32(ret, arg); |
1052 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1053 |
} |
1054 |
|
1055 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1056 |
{ |
1057 |
tcg_gen_ext8u_i32(ret, arg); |
1058 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1059 |
} |
1060 |
|
1061 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1062 |
{ |
1063 |
tcg_gen_ext16u_i32(ret, arg); |
1064 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1065 |
} |
1066 |
|
1067 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1068 |
{ |
1069 |
tcg_gen_mov_i32(ret, arg); |
1070 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1071 |
} |
1072 |
|
1073 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1074 |
{ |
1075 |
tcg_gen_mov_i32(ret, arg); |
1076 |
} |
1077 |
|
1078 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1079 |
{ |
1080 |
tcg_gen_mov_i32(ret, arg); |
1081 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1082 |
} |
1083 |
|
1084 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1085 |
{ |
1086 |
tcg_gen_mov_i32(ret, arg); |
1087 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1088 |
} |
1089 |
|
1090 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1091 |
{ |
1092 |
TCGv t0, t1; |
1093 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1094 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1095 |
|
1096 |
tcg_gen_bswap_i32(t0, arg); |
1097 |
tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
1098 |
tcg_gen_mov_i32(ret, t1); |
1099 |
tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
1100 |
} |
1101 |
#else
|
1102 |
|
1103 |
static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
1104 |
{ |
1105 |
#ifdef TCG_TARGET_HAS_ext8s_i64
|
1106 |
tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
1107 |
#else
|
1108 |
tcg_gen_shli_i64(ret, arg, 56);
|
1109 |
tcg_gen_sari_i64(ret, ret, 56);
|
1110 |
#endif
|
1111 |
} |
1112 |
|
1113 |
static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
1114 |
{ |
1115 |
#ifdef TCG_TARGET_HAS_ext16s_i64
|
1116 |
tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
1117 |
#else
|
1118 |
tcg_gen_shli_i64(ret, arg, 48);
|
1119 |
tcg_gen_sari_i64(ret, ret, 48);
|
1120 |
#endif
|
1121 |
} |
1122 |
|
1123 |
static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
1124 |
{ |
1125 |
#ifdef TCG_TARGET_HAS_ext32s_i64
|
1126 |
tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
1127 |
#else
|
1128 |
tcg_gen_shli_i64(ret, arg, 32);
|
1129 |
tcg_gen_sari_i64(ret, ret, 32);
|
1130 |
#endif
|
1131 |
} |
1132 |
|
1133 |
static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1134 |
{ |
1135 |
tcg_gen_andi_i64(ret, arg, 0xffu);
|
1136 |
} |
1137 |
|
1138 |
static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
1139 |
{ |
1140 |
tcg_gen_andi_i64(ret, arg, 0xffffu);
|
1141 |
} |
1142 |
|
1143 |
static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
1144 |
{ |
1145 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1146 |
} |
1147 |
|
1148 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1149 |
registers. This will probably break MIPS64 targets. */
|
1150 |
static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
1151 |
{ |
1152 |
tcg_gen_mov_i32(ret, arg); |
1153 |
} |
1154 |
|
1155 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1156 |
registers */
|
1157 |
static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
1158 |
{ |
1159 |
tcg_gen_andi_i64(ret, arg, 0xffffffffu);
|
1160 |
} |
1161 |
|
1162 |
/* Note: we assume the target supports move between 32 and 64 bit
|
1163 |
registers */
|
1164 |
static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
1165 |
{ |
1166 |
tcg_gen_ext32s_i64(ret, arg); |
1167 |
} |
1168 |
|
1169 |
static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
1170 |
{ |
1171 |
#ifdef TCG_TARGET_HAS_bswap_i64
|
1172 |
tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
1173 |
#else
|
1174 |
TCGv t0, t1; |
1175 |
t0 = tcg_temp_new(TCG_TYPE_I32); |
1176 |
t1 = tcg_temp_new(TCG_TYPE_I32); |
1177 |
|
1178 |
tcg_gen_shli_i64(t0, arg, 56);
|
1179 |
|
1180 |
tcg_gen_andi_i64(t1, arg, 0x0000ff00);
|
1181 |
tcg_gen_shli_i64(t1, t1, 40);
|
1182 |
tcg_gen_or_i64(t0, t0, t1); |
1183 |
|
1184 |
tcg_gen_andi_i64(t1, arg, 0x00ff0000);
|
1185 |
tcg_gen_shli_i64(t1, t1, 24);
|
1186 |
tcg_gen_or_i64(t0, t0, t1); |
1187 |
|
1188 |
tcg_gen_andi_i64(t1, arg, 0xff000000);
|
1189 |
tcg_gen_shli_i64(t1, t1, 8);
|
1190 |
tcg_gen_or_i64(t0, t0, t1); |
1191 |
|
1192 |
tcg_gen_shri_i64(t1, arg, 8);
|
1193 |
tcg_gen_andi_i64(t1, t1, 0xff000000);
|
1194 |
tcg_gen_or_i64(t0, t0, t1); |
1195 |
|
1196 |
tcg_gen_shri_i64(t1, arg, 24);
|
1197 |
tcg_gen_andi_i64(t1, t1, 0x00ff0000);
|
1198 |
tcg_gen_or_i64(t0, t0, t1); |
1199 |
|
1200 |
tcg_gen_shri_i64(t1, arg, 40);
|
1201 |
tcg_gen_andi_i64(t1, t1, 0x0000ff00);
|
1202 |
tcg_gen_or_i64(t0, t0, t1); |
1203 |
|
1204 |
tcg_gen_shri_i64(t1, arg, 56);
|
1205 |
tcg_gen_or_i64(ret, t0, t1); |
1206 |
#endif
|
1207 |
} |
1208 |
|
1209 |
#endif
|
1210 |
|
1211 |
static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1212 |
{ |
1213 |
#ifdef TCG_TARGET_HAS_neg_i32
|
1214 |
tcg_gen_op2(INDEX_op_neg_i32, ret, arg); |
1215 |
#else
|
1216 |
tcg_gen_sub_i32(ret, tcg_const_i32(0), arg);
|
1217 |
#endif
|
1218 |
} |
1219 |
|
1220 |
static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) |
1221 |
{ |
1222 |
#ifdef TCG_TARGET_HAS_neg_i64
|
1223 |
tcg_gen_op2(INDEX_op_neg_i64, ret, arg); |
1224 |
#else
|
1225 |
tcg_gen_sub_i64(ret, tcg_const_i64(0), arg);
|
1226 |
#endif
|
1227 |
} |
1228 |
|
1229 |
|
1230 |
static inline void tcg_gen_discard_i32(TCGv arg) |
1231 |
{ |
1232 |
tcg_gen_op1(INDEX_op_discard, arg); |
1233 |
} |
1234 |
|
1235 |
#if TCG_TARGET_REG_BITS == 32 |
1236 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1237 |
{ |
1238 |
tcg_gen_discard_i32(arg); |
1239 |
tcg_gen_discard_i32(TCGV_HIGH(arg)); |
1240 |
} |
1241 |
#else
|
1242 |
static inline void tcg_gen_discard_i64(TCGv arg) |
1243 |
{ |
1244 |
tcg_gen_op1(INDEX_op_discard, arg); |
1245 |
} |
1246 |
#endif
|
1247 |
|
1248 |
/***************************************/
|
1249 |
static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
1250 |
{ |
1251 |
tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
1252 |
} |
1253 |
|
1254 |
/***************************************/
|
1255 |
/* QEMU specific operations. Their type depend on the QEMU CPU
|
1256 |
type. */
|
1257 |
#ifndef TARGET_LONG_BITS
|
1258 |
#error must include QEMU headers
|
1259 |
#endif
|
1260 |
|
1261 |
static inline void tcg_gen_exit_tb(tcg_target_long val) |
1262 |
{ |
1263 |
tcg_gen_op1i(INDEX_op_exit_tb, val); |
1264 |
} |
1265 |
|
1266 |
static inline void tcg_gen_goto_tb(int idx) |
1267 |
{ |
1268 |
tcg_gen_op1i(INDEX_op_goto_tb, idx); |
1269 |
} |
1270 |
|
1271 |
#if TCG_TARGET_REG_BITS == 32 |
1272 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1273 |
{ |
1274 |
#if TARGET_LONG_BITS == 32 |
1275 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1276 |
#else
|
1277 |
tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1278 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1279 |
#endif
|
1280 |
} |
1281 |
|
1282 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1283 |
{ |
1284 |
#if TARGET_LONG_BITS == 32 |
1285 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1286 |
#else
|
1287 |
tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
1288 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1289 |
#endif
|
1290 |
} |
1291 |
|
1292 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1293 |
{ |
1294 |
#if TARGET_LONG_BITS == 32 |
1295 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1296 |
#else
|
1297 |
tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1298 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1299 |
#endif
|
1300 |
} |
1301 |
|
1302 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1303 |
{ |
1304 |
#if TARGET_LONG_BITS == 32 |
1305 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1306 |
#else
|
1307 |
tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
1308 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1309 |
#endif
|
1310 |
} |
1311 |
|
1312 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1313 |
{ |
1314 |
#if TARGET_LONG_BITS == 32 |
1315 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1316 |
#else
|
1317 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1318 |
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
|
1319 |
#endif
|
1320 |
} |
1321 |
|
1322 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1323 |
{ |
1324 |
#if TARGET_LONG_BITS == 32 |
1325 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1326 |
#else
|
1327 |
tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1328 |
tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31);
|
1329 |
#endif
|
1330 |
} |
1331 |
|
1332 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1333 |
{ |
1334 |
#if TARGET_LONG_BITS == 32 |
1335 |
tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
1336 |
#else
|
1337 |
tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1338 |
addr, TCGV_HIGH(addr), mem_index); |
1339 |
#endif
|
1340 |
} |
1341 |
|
1342 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1343 |
{ |
1344 |
#if TARGET_LONG_BITS == 32 |
1345 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1346 |
#else
|
1347 |
tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
1348 |
#endif
|
1349 |
} |
1350 |
|
1351 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1352 |
{ |
1353 |
#if TARGET_LONG_BITS == 32 |
1354 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1355 |
#else
|
1356 |
tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
1357 |
#endif
|
1358 |
} |
1359 |
|
1360 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1361 |
{ |
1362 |
#if TARGET_LONG_BITS == 32 |
1363 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1364 |
#else
|
1365 |
tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
1366 |
#endif
|
1367 |
} |
1368 |
|
1369 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1370 |
{ |
1371 |
#if TARGET_LONG_BITS == 32 |
1372 |
tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
1373 |
#else
|
1374 |
tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1375 |
addr, TCGV_HIGH(addr), mem_index); |
1376 |
#endif
|
1377 |
} |
1378 |
|
1379 |
#define tcg_gen_ld_ptr tcg_gen_ld_i32
|
1380 |
#define tcg_gen_discard_ptr tcg_gen_discard_i32
|
1381 |
|
1382 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1383 |
|
1384 |
static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
1385 |
{ |
1386 |
tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
1387 |
} |
1388 |
|
1389 |
static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
1390 |
{ |
1391 |
tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
1392 |
} |
1393 |
|
1394 |
static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
1395 |
{ |
1396 |
tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
1397 |
} |
1398 |
|
1399 |
static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
1400 |
{ |
1401 |
tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
1402 |
} |
1403 |
|
1404 |
static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
1405 |
{ |
1406 |
tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
1407 |
} |
1408 |
|
1409 |
static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
1410 |
{ |
1411 |
tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
1412 |
} |
1413 |
|
1414 |
static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
1415 |
{ |
1416 |
tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
1417 |
} |
1418 |
|
1419 |
static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
1420 |
{ |
1421 |
tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
1422 |
} |
1423 |
|
1424 |
static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
1425 |
{ |
1426 |
tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
1427 |
} |
1428 |
|
1429 |
static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
1430 |
{ |
1431 |
tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
1432 |
} |
1433 |
|
1434 |
static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
1435 |
{ |
1436 |
tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
1437 |
} |
1438 |
|
1439 |
#define tcg_gen_ld_ptr tcg_gen_ld_i64
|
1440 |
#define tcg_gen_discard_ptr tcg_gen_discard_i64
|
1441 |
|
1442 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1443 |
|
1444 |
#if TARGET_LONG_BITS == 64 |
1445 |
#define TCG_TYPE_TL TCG_TYPE_I64
|
1446 |
#define tcg_gen_movi_tl tcg_gen_movi_i64
|
1447 |
#define tcg_gen_mov_tl tcg_gen_mov_i64
|
1448 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
|
1449 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
|
1450 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
|
1451 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
|
1452 |
#define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
|
1453 |
#define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
|
1454 |
#define tcg_gen_ld_tl tcg_gen_ld_i64
|
1455 |
#define tcg_gen_st8_tl tcg_gen_st8_i64
|
1456 |
#define tcg_gen_st16_tl tcg_gen_st16_i64
|
1457 |
#define tcg_gen_st32_tl tcg_gen_st32_i64
|
1458 |
#define tcg_gen_st_tl tcg_gen_st_i64
|
1459 |
#define tcg_gen_add_tl tcg_gen_add_i64
|
1460 |
#define tcg_gen_addi_tl tcg_gen_addi_i64
|
1461 |
#define tcg_gen_sub_tl tcg_gen_sub_i64
|
1462 |
#define tcg_gen_neg_tl tcg_gen_neg_i64
|
1463 |
#define tcg_gen_subi_tl tcg_gen_subi_i64
|
1464 |
#define tcg_gen_and_tl tcg_gen_and_i64
|
1465 |
#define tcg_gen_andi_tl tcg_gen_andi_i64
|
1466 |
#define tcg_gen_or_tl tcg_gen_or_i64
|
1467 |
#define tcg_gen_ori_tl tcg_gen_ori_i64
|
1468 |
#define tcg_gen_xor_tl tcg_gen_xor_i64
|
1469 |
#define tcg_gen_xori_tl tcg_gen_xori_i64
|
1470 |
#define tcg_gen_shl_tl tcg_gen_shl_i64
|
1471 |
#define tcg_gen_shli_tl tcg_gen_shli_i64
|
1472 |
#define tcg_gen_shr_tl tcg_gen_shr_i64
|
1473 |
#define tcg_gen_shri_tl tcg_gen_shri_i64
|
1474 |
#define tcg_gen_sar_tl tcg_gen_sar_i64
|
1475 |
#define tcg_gen_sari_tl tcg_gen_sari_i64
|
1476 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
|
1477 |
#define tcg_gen_mul_tl tcg_gen_mul_i64
|
1478 |
#define tcg_gen_muli_tl tcg_gen_muli_i64
|
1479 |
#define tcg_gen_discard_tl tcg_gen_discard_i64
|
1480 |
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
|
1481 |
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
|
1482 |
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
|
1483 |
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
|
1484 |
#define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
|
1485 |
#define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
|
1486 |
#define tcg_const_tl tcg_const_i64
|
1487 |
#else
|
1488 |
#define TCG_TYPE_TL TCG_TYPE_I32
|
1489 |
#define tcg_gen_movi_tl tcg_gen_movi_i32
|
1490 |
#define tcg_gen_mov_tl tcg_gen_mov_i32
|
1491 |
#define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
|
1492 |
#define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
|
1493 |
#define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
|
1494 |
#define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
|
1495 |
#define tcg_gen_ld32u_tl tcg_gen_ld_i32
|
1496 |
#define tcg_gen_ld32s_tl tcg_gen_ld_i32
|
1497 |
#define tcg_gen_ld_tl tcg_gen_ld_i32
|
1498 |
#define tcg_gen_st8_tl tcg_gen_st8_i32
|
1499 |
#define tcg_gen_st16_tl tcg_gen_st16_i32
|
1500 |
#define tcg_gen_st32_tl tcg_gen_st_i32
|
1501 |
#define tcg_gen_st_tl tcg_gen_st_i32
|
1502 |
#define tcg_gen_add_tl tcg_gen_add_i32
|
1503 |
#define tcg_gen_addi_tl tcg_gen_addi_i32
|
1504 |
#define tcg_gen_sub_tl tcg_gen_sub_i32
|
1505 |
#define tcg_gen_neg_tl tcg_gen_neg_i32
|
1506 |
#define tcg_gen_subi_tl tcg_gen_subi_i32
|
1507 |
#define tcg_gen_and_tl tcg_gen_and_i32
|
1508 |
#define tcg_gen_andi_tl tcg_gen_andi_i32
|
1509 |
#define tcg_gen_or_tl tcg_gen_or_i32
|
1510 |
#define tcg_gen_ori_tl tcg_gen_ori_i32
|
1511 |
#define tcg_gen_xor_tl tcg_gen_xor_i32
|
1512 |
#define tcg_gen_xori_tl tcg_gen_xori_i32
|
1513 |
#define tcg_gen_shl_tl tcg_gen_shl_i32
|
1514 |
#define tcg_gen_shli_tl tcg_gen_shli_i32
|
1515 |
#define tcg_gen_shr_tl tcg_gen_shr_i32
|
1516 |
#define tcg_gen_shri_tl tcg_gen_shri_i32
|
1517 |
#define tcg_gen_sar_tl tcg_gen_sar_i32
|
1518 |
#define tcg_gen_sari_tl tcg_gen_sari_i32
|
1519 |
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
|
1520 |
#define tcg_gen_mul_tl tcg_gen_mul_i32
|
1521 |
#define tcg_gen_muli_tl tcg_gen_muli_i32
|
1522 |
#define tcg_gen_discard_tl tcg_gen_discard_i32
|
1523 |
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
|
1524 |
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
|
1525 |
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
|
1526 |
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
|
1527 |
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
|
1528 |
#define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
|
1529 |
#define tcg_const_tl tcg_const_i32
|
1530 |
#endif
|
1531 |
|
1532 |
#if TCG_TARGET_REG_BITS == 32 |
1533 |
#define tcg_gen_addi_ptr tcg_gen_addi_i32
|
1534 |
#else /* TCG_TARGET_REG_BITS == 32 */ |
1535 |
#define tcg_gen_addi_ptr tcg_gen_addi_i64
|
1536 |
#endif /* TCG_TARGET_REG_BITS != 32 */ |
1537 |
|