Revision 39d51eb8 target-mips/op.c
| b/target-mips/op.c | ||
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| 1397 | 1397 |
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void op_mtc0_cause (void) |
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{
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env->CP0_Cause = (env->CP0_Cause & 0xB000F87C) | (T0 & 0x00C00300); |
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uint32_t mask = 0x00C00300; |
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|
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if ((env->CP0_Config0 & (0x7 << CP0C0_AR)) == (1 << CP0C0_AR)) |
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mask |= 1 << CP0Ca_DC; |
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|
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env->CP0_Cause = (env->CP0_Cause & 0xFCC0FF7C) | (T0 & mask); |
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/* Handle the software interrupt as an hardware one, as they |
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are very similar */ |
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