Revision 39dd32ee target-ppc/translate.c
b/target-ppc/translate.c | ||
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827 | 827 |
#endif |
828 | 828 |
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829 | 829 |
/* add add. addo addo. */ |
830 |
static always_inline void gen_op_add (void) |
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831 |
{ |
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832 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); |
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} |
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830 | 834 |
static always_inline void gen_op_addo (void) |
831 | 835 |
{ |
832 | 836 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
833 |
gen_op_add();
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837 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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834 | 838 |
gen_op_check_addo(); |
835 | 839 |
} |
836 | 840 |
#if defined(TARGET_PPC64) |
... | ... | |
838 | 842 |
static always_inline void gen_op_addo_64 (void) |
839 | 843 |
{ |
840 | 844 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
841 |
gen_op_add();
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845 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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842 | 846 |
gen_op_check_addo_64(); |
843 | 847 |
} |
844 | 848 |
#endif |
... | ... | |
847 | 851 |
static always_inline void gen_op_addc (void) |
848 | 852 |
{ |
849 | 853 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
850 |
gen_op_add();
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854 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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851 | 855 |
gen_op_check_addc(); |
852 | 856 |
} |
853 | 857 |
static always_inline void gen_op_addco (void) |
854 | 858 |
{ |
855 | 859 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
856 |
gen_op_add();
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|
860 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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857 | 861 |
gen_op_check_addc(); |
858 | 862 |
gen_op_check_addo(); |
859 | 863 |
} |
... | ... | |
861 | 865 |
static always_inline void gen_op_addc_64 (void) |
862 | 866 |
{ |
863 | 867 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
864 |
gen_op_add();
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868 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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865 | 869 |
gen_op_check_addc_64(); |
866 | 870 |
} |
867 | 871 |
static always_inline void gen_op_addco_64 (void) |
868 | 872 |
{ |
869 | 873 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
870 |
gen_op_add();
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874 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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871 | 875 |
gen_op_check_addc_64(); |
872 | 876 |
gen_op_check_addo_64(); |
873 | 877 |
} |
... | ... | |
1022 | 1026 |
} else { |
1023 | 1027 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
1024 | 1028 |
if (likely(simm != 0)) |
1025 |
gen_op_addi(simm);
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1029 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm);
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1026 | 1030 |
} |
1027 | 1031 |
tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); |
1028 | 1032 |
} |
... | ... | |
1034 | 1038 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
1035 | 1039 |
if (likely(simm != 0)) { |
1036 | 1040 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
1037 |
gen_op_addi(simm);
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1041 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm);
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1038 | 1042 |
#if defined(TARGET_PPC64) |
1039 | 1043 |
if (ctx->sf_mode) |
1040 | 1044 |
gen_op_check_addc_64(); |
... | ... | |
1054 | 1058 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
1055 | 1059 |
if (likely(simm != 0)) { |
1056 | 1060 |
tcg_gen_mov_tl(cpu_T[2], cpu_T[0]); |
1057 |
gen_op_addi(simm);
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1061 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm);
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1058 | 1062 |
#if defined(TARGET_PPC64) |
1059 | 1063 |
if (ctx->sf_mode) |
1060 | 1064 |
gen_op_check_addc_64(); |
... | ... | |
1078 | 1082 |
} else { |
1079 | 1083 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
1080 | 1084 |
if (likely(simm != 0)) |
1081 |
gen_op_addi(simm << 16);
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1085 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm << 16);
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1082 | 1086 |
} |
1083 | 1087 |
tcg_gen_mov_tl(cpu_gpr[rD(ctx->opcode)], cpu_T[0]); |
1084 | 1088 |
} |
... | ... | |
2118 | 2122 |
} else { |
2119 | 2123 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
2120 | 2124 |
if (likely(simm != 0)) |
2121 |
gen_op_addi(simm);
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2125 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm);
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2122 | 2126 |
} |
2123 | 2127 |
#ifdef DEBUG_MEMORY_ACCESSES |
2124 | 2128 |
gen_op_print_mem_EA(); |
... | ... | |
2132 | 2136 |
} else { |
2133 | 2137 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
2134 | 2138 |
tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rB(ctx->opcode)]); |
2135 |
gen_op_add();
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2139 |
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
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2136 | 2140 |
} |
2137 | 2141 |
#ifdef DEBUG_MEMORY_ACCESSES |
2138 | 2142 |
gen_op_print_mem_EA(); |
... | ... | |
2331 | 2335 |
gen_addr_imm_index(ctx, 0x0F); |
2332 | 2336 |
op_ldst(ld); |
2333 | 2337 |
tcg_gen_mov_tl(cpu_gpr[rd], cpu_T[1]); |
2334 |
gen_op_addi(8);
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2338 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 8);
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2335 | 2339 |
op_ldst(ld); |
2336 | 2340 |
tcg_gen_mov_tl(cpu_gpr[rd + 1], cpu_T[1]); |
2337 | 2341 |
#endif |
... | ... | |
2427 | 2431 |
gen_addr_imm_index(ctx, 0x03); |
2428 | 2432 |
tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs]); |
2429 | 2433 |
op_ldst(std); |
2430 |
gen_op_addi(8);
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2434 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], 8);
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2431 | 2435 |
tcg_gen_mov_tl(cpu_T[1], cpu_gpr[rs + 1]); |
2432 | 2436 |
op_ldst(std); |
2433 | 2437 |
#endif |
... | ... | |
5346 | 5350 |
} else { |
5347 | 5351 |
tcg_gen_mov_tl(cpu_T[0], cpu_gpr[rA(ctx->opcode)]); |
5348 | 5352 |
if (likely(simm != 0)) |
5349 |
gen_op_addi(simm << sh);
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5353 |
tcg_gen_addi_tl(cpu_T[0], cpu_T[0], simm << sh);
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5350 | 5354 |
} |
5351 | 5355 |
} |
5352 | 5356 |
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