tcg: README, name deposit second argument len/LEN
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
target-i386: Use deposit operation.
Use this for assignment to the low byte or low word of a register.
Acked-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg: Define "deposit" as an optional operation.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Add support for load/store reversed
Load/store reversed (lwr/swr) are insns that endian translatethe sub-word part of the address and byteswap the data lanes.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
microblaze: Tweak comment, fast cases -> common cases
sparc: fix NaN handling
Fix several bugs in NaN handling: * e in fcmpe* only changes qNaN handling * FCC is unchanged if an exception is raised * clear previous FTT before setting it
Reported-by: Mateusz Loskot <mateusz@loskot.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-arm: Log instruction start in TCG code
Add support for logging the start of instructions in TCGcode debug dumps for ARM targets.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
mips: Break TBs after mfc0_count
Break the TB after reading the count register. This makes itpossible to take timer interrupts immediately after a read ofa possibly expired timer.
mips: Expire late timers when reading cp0_count
When reading cp0_count from a timer with a late trigger that shouldalready have expired, expire it and raise the timer irq.
This makes it possible for guest code (e.g, Linux) that first readcp0_count, then compare it with cp0_compare and check for raised...
mips: Break out cpu_mips_timer_expire
Reorganize for future patches, no functional change.
Acked-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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