Revision 3a38d437 hw/pc.c
b/hw/pc.c | ||
---|---|---|
1043 | 1043 |
} |
1044 | 1044 |
#endif |
1045 | 1045 |
|
1046 |
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
|
|
1046 |
static void pc_init_ne2k_isa(NICInfo *nd) |
|
1047 | 1047 |
{ |
1048 | 1048 |
static int nb_ne2k = 0; |
1049 | 1049 |
|
1050 | 1050 |
if (nb_ne2k == NE2000_NB_MAX) |
1051 | 1051 |
return; |
1052 |
isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
|
1052 |
isa_ne2000_init(ne2000_io[nb_ne2k], |
|
1053 |
isa_reserve_irq(ne2000_irq[nb_ne2k]), nd); |
|
1053 | 1054 |
nb_ne2k++; |
1054 | 1055 |
} |
1055 | 1056 |
|
... | ... | |
1276 | 1277 |
isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state)); |
1277 | 1278 |
isa_irq_state->i8259 = i8259; |
1278 | 1279 |
isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24); |
1279 |
ferr_irq = isa_irq[13]; |
|
1280 | 1280 |
|
1281 | 1281 |
if (pci_enabled) { |
1282 | 1282 |
pci_bus = i440fx_init(&i440fx_state, isa_irq); |
... | ... | |
1287 | 1287 |
} |
1288 | 1288 |
isa_bus_irqs(isa_irq); |
1289 | 1289 |
|
1290 |
ferr_irq = isa_reserve_irq(13); |
|
1291 |
|
|
1290 | 1292 |
/* init basic PC hardware */ |
1291 | 1293 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
1292 | 1294 |
|
... | ... | |
1311 | 1313 |
} |
1312 | 1314 |
} |
1313 | 1315 |
|
1314 |
rtc_state = rtc_init(0x70, isa_irq[8], 2000);
|
|
1316 |
rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000);
|
|
1315 | 1317 |
|
1316 | 1318 |
qemu_register_boot_set(pc_boot_set, rtc_state); |
1317 | 1319 |
|
... | ... | |
1321 | 1323 |
if (pci_enabled) { |
1322 | 1324 |
isa_irq_state->ioapic = ioapic_init(); |
1323 | 1325 |
} |
1324 |
pit = pit_init(0x40, isa_irq[0]);
|
|
1326 |
pit = pit_init(0x40, isa_reserve_irq(0));
|
|
1325 | 1327 |
pcspk_init(pit); |
1326 | 1328 |
if (!no_hpet) { |
1327 | 1329 |
hpet_init(isa_irq); |
... | ... | |
1329 | 1331 |
|
1330 | 1332 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
1331 | 1333 |
if (serial_hds[i]) { |
1332 |
serial_init(serial_io[i], isa_irq[serial_irq[i]], 115200,
|
|
1334 |
serial_init(serial_io[i], isa_reserve_irq(serial_irq[i]), 115200,
|
|
1333 | 1335 |
serial_hds[i]); |
1334 | 1336 |
} |
1335 | 1337 |
} |
1336 | 1338 |
|
1337 | 1339 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
1338 | 1340 |
if (parallel_hds[i]) { |
1339 |
parallel_init(parallel_io[i], isa_irq[parallel_irq[i]],
|
|
1341 |
parallel_init(parallel_io[i], isa_reserve_irq(parallel_irq[i]),
|
|
1340 | 1342 |
parallel_hds[i]); |
1341 | 1343 |
} |
1342 | 1344 |
} |
... | ... | |
1347 | 1349 |
NICInfo *nd = &nd_table[i]; |
1348 | 1350 |
|
1349 | 1351 |
if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0)) |
1350 |
pc_init_ne2k_isa(nd, isa_irq);
|
|
1352 |
pc_init_ne2k_isa(nd); |
|
1351 | 1353 |
else |
1352 | 1354 |
pci_nic_init(nd, "e1000", NULL); |
1353 | 1355 |
} |
... | ... | |
1368 | 1370 |
pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, isa_irq); |
1369 | 1371 |
} else { |
1370 | 1372 |
for(i = 0; i < MAX_IDE_BUS; i++) { |
1371 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], isa_irq[ide_irq[i]], |
|
1373 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], |
|
1374 |
isa_reserve_irq(ide_irq[i]), |
|
1372 | 1375 |
hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); |
1373 | 1376 |
} |
1374 | 1377 |
} |
... | ... | |
1398 | 1401 |
i2c_bus *smbus; |
1399 | 1402 |
|
1400 | 1403 |
/* TODO: Populate SPD eeprom data. */ |
1401 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, isa_irq[9]); |
|
1404 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, |
|
1405 |
isa_reserve_irq(9)); |
|
1402 | 1406 |
for (i = 0; i < 8; i++) { |
1403 | 1407 |
DeviceState *eeprom; |
1404 | 1408 |
eeprom = qdev_create((BusState *)smbus, "smbus-eeprom"); |
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