root / target-ppc / translate_init.c @ 3a607854
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1 | 3fc6c082 | bellard | /*
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2 | 3fc6c082 | bellard | * PowerPC CPU initialization for qemu.
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3 | 3fc6c082 | bellard | *
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4 | 76a66253 | j_mayer | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | 3fc6c082 | bellard | *
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6 | 3fc6c082 | bellard | * This library is free software; you can redistribute it and/or
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7 | 3fc6c082 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 3fc6c082 | bellard | * License as published by the Free Software Foundation; either
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9 | 3fc6c082 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 3fc6c082 | bellard | *
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11 | 3fc6c082 | bellard | * This library is distributed in the hope that it will be useful,
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12 | 3fc6c082 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 3fc6c082 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 3fc6c082 | bellard | * Lesser General Public License for more details.
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15 | 3fc6c082 | bellard | *
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16 | 3fc6c082 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 3fc6c082 | bellard | * License along with this library; if not, write to the Free Software
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18 | 3fc6c082 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | 3fc6c082 | bellard | */
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20 | 3fc6c082 | bellard | |
21 | 3fc6c082 | bellard | /* A lot of PowerPC definition have been included here.
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22 | 3fc6c082 | bellard | * Most of them are not usable for now but have been kept
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23 | 3fc6c082 | bellard | * inside "#if defined(TODO) ... #endif" statements to make tests easier.
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24 | 3fc6c082 | bellard | */
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25 | 3fc6c082 | bellard | |
26 | 3fc6c082 | bellard | //#define PPC_DUMP_CPU
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27 | 3fc6c082 | bellard | //#define PPC_DEBUG_SPR
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28 | a496775f | j_mayer | //#define PPC_DEBUG_IRQ
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29 | 3fc6c082 | bellard | |
30 | 3fc6c082 | bellard | struct ppc_def_t {
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31 | 3fc6c082 | bellard | const unsigned char *name; |
32 | 3fc6c082 | bellard | uint32_t pvr; |
33 | 3fc6c082 | bellard | uint32_t pvr_mask; |
34 | 0487d6a8 | j_mayer | uint64_t insns_flags; |
35 | 3fc6c082 | bellard | uint32_t flags; |
36 | 3fc6c082 | bellard | uint64_t msr_mask; |
37 | 3fc6c082 | bellard | }; |
38 | 3fc6c082 | bellard | |
39 | e9df014c | j_mayer | /* For user-mode emulation, we don't emulate any IRQ controller */
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40 | e9df014c | j_mayer | #if defined(CONFIG_USER_ONLY)
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41 | e9df014c | j_mayer | #define PPC_IRQ_INIT_FN(name) \
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42 | e9df014c | j_mayer | static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \ |
43 | e9df014c | j_mayer | { \ |
44 | e9df014c | j_mayer | } |
45 | e9df014c | j_mayer | #else
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46 | e9df014c | j_mayer | #define PPC_IRQ_INIT_FN(name) \
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47 | e9df014c | j_mayer | void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
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48 | e9df014c | j_mayer | #endif
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49 | 24be5ae3 | j_mayer | PPC_IRQ_INIT_FN(405);
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50 | e9df014c | j_mayer | PPC_IRQ_INIT_FN(6xx);
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51 | d0dfae6e | j_mayer | PPC_IRQ_INIT_FN(970);
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52 | e9df014c | j_mayer | |
53 | 3fc6c082 | bellard | /* Generic callbacks:
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54 | 3fc6c082 | bellard | * do nothing but store/retrieve spr value
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55 | 3fc6c082 | bellard | */
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56 | 3fc6c082 | bellard | static void spr_read_generic (void *opaque, int sprn) |
57 | 3fc6c082 | bellard | { |
58 | 3fc6c082 | bellard | gen_op_load_spr(sprn); |
59 | 3fc6c082 | bellard | } |
60 | 3fc6c082 | bellard | |
61 | 3fc6c082 | bellard | static void spr_write_generic (void *opaque, int sprn) |
62 | 3fc6c082 | bellard | { |
63 | 3fc6c082 | bellard | gen_op_store_spr(sprn); |
64 | 3fc6c082 | bellard | } |
65 | 3fc6c082 | bellard | |
66 | a496775f | j_mayer | static void spr_read_dump (void *opaque, int sprn) |
67 | a496775f | j_mayer | { |
68 | a496775f | j_mayer | gen_op_load_dump_spr(sprn); |
69 | a496775f | j_mayer | } |
70 | a496775f | j_mayer | |
71 | a496775f | j_mayer | static void spr_write_dump (void *opaque, int sprn) |
72 | a496775f | j_mayer | { |
73 | a496775f | j_mayer | gen_op_store_dump_spr(sprn); |
74 | a496775f | j_mayer | } |
75 | a496775f | j_mayer | |
76 | a496775f | j_mayer | #if !defined(CONFIG_USER_ONLY)
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77 | a496775f | j_mayer | static void spr_write_clear (void *opaque, int sprn) |
78 | a496775f | j_mayer | { |
79 | a496775f | j_mayer | gen_op_mask_spr(sprn); |
80 | a496775f | j_mayer | } |
81 | a496775f | j_mayer | #endif
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82 | a496775f | j_mayer | |
83 | 76a66253 | j_mayer | /* SPR common to all PowerPC */
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84 | 3fc6c082 | bellard | /* XER */
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85 | 3fc6c082 | bellard | static void spr_read_xer (void *opaque, int sprn) |
86 | 3fc6c082 | bellard | { |
87 | 3fc6c082 | bellard | gen_op_load_xer(); |
88 | 3fc6c082 | bellard | } |
89 | 3fc6c082 | bellard | |
90 | 3fc6c082 | bellard | static void spr_write_xer (void *opaque, int sprn) |
91 | 3fc6c082 | bellard | { |
92 | 3fc6c082 | bellard | gen_op_store_xer(); |
93 | 3fc6c082 | bellard | } |
94 | 3fc6c082 | bellard | |
95 | 3fc6c082 | bellard | /* LR */
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96 | 3fc6c082 | bellard | static void spr_read_lr (void *opaque, int sprn) |
97 | 3fc6c082 | bellard | { |
98 | 3fc6c082 | bellard | gen_op_load_lr(); |
99 | 3fc6c082 | bellard | } |
100 | 3fc6c082 | bellard | |
101 | 3fc6c082 | bellard | static void spr_write_lr (void *opaque, int sprn) |
102 | 3fc6c082 | bellard | { |
103 | 3fc6c082 | bellard | gen_op_store_lr(); |
104 | 3fc6c082 | bellard | } |
105 | 3fc6c082 | bellard | |
106 | 3fc6c082 | bellard | /* CTR */
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107 | 3fc6c082 | bellard | static void spr_read_ctr (void *opaque, int sprn) |
108 | 3fc6c082 | bellard | { |
109 | 3fc6c082 | bellard | gen_op_load_ctr(); |
110 | 3fc6c082 | bellard | } |
111 | 3fc6c082 | bellard | |
112 | 3fc6c082 | bellard | static void spr_write_ctr (void *opaque, int sprn) |
113 | 3fc6c082 | bellard | { |
114 | 3fc6c082 | bellard | gen_op_store_ctr(); |
115 | 3fc6c082 | bellard | } |
116 | 3fc6c082 | bellard | |
117 | 3fc6c082 | bellard | /* User read access to SPR */
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118 | 3fc6c082 | bellard | /* USPRx */
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119 | 3fc6c082 | bellard | /* UMMCRx */
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120 | 3fc6c082 | bellard | /* UPMCx */
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121 | 3fc6c082 | bellard | /* USIA */
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122 | 3fc6c082 | bellard | /* UDECR */
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123 | 3fc6c082 | bellard | static void spr_read_ureg (void *opaque, int sprn) |
124 | 3fc6c082 | bellard | { |
125 | 3fc6c082 | bellard | gen_op_load_spr(sprn + 0x10);
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126 | 3fc6c082 | bellard | } |
127 | 3fc6c082 | bellard | |
128 | 76a66253 | j_mayer | /* SPR common to all non-embedded PowerPC */
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129 | 3fc6c082 | bellard | /* DECR */
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130 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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131 | 3fc6c082 | bellard | static void spr_read_decr (void *opaque, int sprn) |
132 | 3fc6c082 | bellard | { |
133 | 3fc6c082 | bellard | gen_op_load_decr(); |
134 | 3fc6c082 | bellard | } |
135 | 3fc6c082 | bellard | |
136 | 3fc6c082 | bellard | static void spr_write_decr (void *opaque, int sprn) |
137 | 3fc6c082 | bellard | { |
138 | 3fc6c082 | bellard | gen_op_store_decr(); |
139 | 3fc6c082 | bellard | } |
140 | 76a66253 | j_mayer | #endif
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141 | 3fc6c082 | bellard | |
142 | 76a66253 | j_mayer | /* SPR common to all non-embedded PowerPC, except 601 */
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143 | 3fc6c082 | bellard | /* Time base */
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144 | 3fc6c082 | bellard | static void spr_read_tbl (void *opaque, int sprn) |
145 | 3fc6c082 | bellard | { |
146 | 3fc6c082 | bellard | gen_op_load_tbl(); |
147 | 3fc6c082 | bellard | } |
148 | 3fc6c082 | bellard | |
149 | 76a66253 | j_mayer | static void spr_read_tbu (void *opaque, int sprn) |
150 | 3fc6c082 | bellard | { |
151 | 76a66253 | j_mayer | gen_op_load_tbu(); |
152 | 3fc6c082 | bellard | } |
153 | 3fc6c082 | bellard | |
154 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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155 | 76a66253 | j_mayer | static void spr_write_tbl (void *opaque, int sprn) |
156 | 3fc6c082 | bellard | { |
157 | 76a66253 | j_mayer | gen_op_store_tbl(); |
158 | 3fc6c082 | bellard | } |
159 | 3fc6c082 | bellard | |
160 | 3fc6c082 | bellard | static void spr_write_tbu (void *opaque, int sprn) |
161 | 3fc6c082 | bellard | { |
162 | 3fc6c082 | bellard | gen_op_store_tbu(); |
163 | 3fc6c082 | bellard | } |
164 | 76a66253 | j_mayer | #endif
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165 | 3fc6c082 | bellard | |
166 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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167 | 3fc6c082 | bellard | /* IBAT0U...IBAT0U */
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168 | 3fc6c082 | bellard | /* IBAT0L...IBAT7L */
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169 | 3fc6c082 | bellard | static void spr_read_ibat (void *opaque, int sprn) |
170 | 3fc6c082 | bellard | { |
171 | 3fc6c082 | bellard | gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT0U) / 2); |
172 | 3fc6c082 | bellard | } |
173 | 3fc6c082 | bellard | |
174 | 3fc6c082 | bellard | static void spr_read_ibat_h (void *opaque, int sprn) |
175 | 3fc6c082 | bellard | { |
176 | 3fc6c082 | bellard | gen_op_load_ibat(sprn & 1, (sprn - SPR_IBAT4U) / 2); |
177 | 3fc6c082 | bellard | } |
178 | 3fc6c082 | bellard | |
179 | 3fc6c082 | bellard | static void spr_write_ibatu (void *opaque, int sprn) |
180 | 3fc6c082 | bellard | { |
181 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
182 | 3fc6c082 | bellard | |
183 | 3fc6c082 | bellard | gen_op_store_ibatu((sprn - SPR_IBAT0U) / 2);
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184 | 3fc6c082 | bellard | RET_STOP(ctx); |
185 | 3fc6c082 | bellard | } |
186 | 3fc6c082 | bellard | |
187 | 3fc6c082 | bellard | static void spr_write_ibatu_h (void *opaque, int sprn) |
188 | 3fc6c082 | bellard | { |
189 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
190 | 3fc6c082 | bellard | |
191 | 3fc6c082 | bellard | gen_op_store_ibatu((sprn - SPR_IBAT4U) / 2);
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192 | 3fc6c082 | bellard | RET_STOP(ctx); |
193 | 3fc6c082 | bellard | } |
194 | 3fc6c082 | bellard | |
195 | 3fc6c082 | bellard | static void spr_write_ibatl (void *opaque, int sprn) |
196 | 3fc6c082 | bellard | { |
197 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
198 | 3fc6c082 | bellard | |
199 | 3fc6c082 | bellard | gen_op_store_ibatl((sprn - SPR_IBAT0L) / 2);
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200 | 3fc6c082 | bellard | RET_STOP(ctx); |
201 | 3fc6c082 | bellard | } |
202 | 3fc6c082 | bellard | |
203 | 3fc6c082 | bellard | static void spr_write_ibatl_h (void *opaque, int sprn) |
204 | 3fc6c082 | bellard | { |
205 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
206 | 3fc6c082 | bellard | |
207 | 3fc6c082 | bellard | gen_op_store_ibatl((sprn - SPR_IBAT4L) / 2);
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208 | 3fc6c082 | bellard | RET_STOP(ctx); |
209 | 3fc6c082 | bellard | } |
210 | 3fc6c082 | bellard | |
211 | 3fc6c082 | bellard | /* DBAT0U...DBAT7U */
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212 | 3fc6c082 | bellard | /* DBAT0L...DBAT7L */
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213 | 3fc6c082 | bellard | static void spr_read_dbat (void *opaque, int sprn) |
214 | 3fc6c082 | bellard | { |
215 | 3fc6c082 | bellard | gen_op_load_dbat(sprn & 1, (sprn - SPR_DBAT0U) / 2); |
216 | 3fc6c082 | bellard | } |
217 | 3fc6c082 | bellard | |
218 | 3fc6c082 | bellard | static void spr_read_dbat_h (void *opaque, int sprn) |
219 | 3fc6c082 | bellard | { |
220 | 3fc6c082 | bellard | gen_op_load_dbat(sprn & 1, (sprn - SPR_DBAT4U) / 2); |
221 | 3fc6c082 | bellard | } |
222 | 3fc6c082 | bellard | |
223 | 3fc6c082 | bellard | static void spr_write_dbatu (void *opaque, int sprn) |
224 | 3fc6c082 | bellard | { |
225 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
226 | 3fc6c082 | bellard | |
227 | 3fc6c082 | bellard | gen_op_store_dbatu((sprn - SPR_DBAT0U) / 2);
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228 | 3fc6c082 | bellard | RET_STOP(ctx); |
229 | 3fc6c082 | bellard | } |
230 | 3fc6c082 | bellard | |
231 | 3fc6c082 | bellard | static void spr_write_dbatu_h (void *opaque, int sprn) |
232 | 3fc6c082 | bellard | { |
233 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
234 | 3fc6c082 | bellard | |
235 | 3fc6c082 | bellard | gen_op_store_dbatu((sprn - SPR_DBAT4U) / 2);
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236 | 3fc6c082 | bellard | RET_STOP(ctx); |
237 | 3fc6c082 | bellard | } |
238 | 3fc6c082 | bellard | |
239 | 3fc6c082 | bellard | static void spr_write_dbatl (void *opaque, int sprn) |
240 | 3fc6c082 | bellard | { |
241 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
242 | 3fc6c082 | bellard | |
243 | 3fc6c082 | bellard | gen_op_store_dbatl((sprn - SPR_DBAT0L) / 2);
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244 | 3fc6c082 | bellard | RET_STOP(ctx); |
245 | 3fc6c082 | bellard | } |
246 | 3fc6c082 | bellard | |
247 | 3fc6c082 | bellard | static void spr_write_dbatl_h (void *opaque, int sprn) |
248 | 3fc6c082 | bellard | { |
249 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
250 | 3fc6c082 | bellard | |
251 | 3fc6c082 | bellard | gen_op_store_dbatl((sprn - SPR_DBAT4L) / 2);
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252 | 3fc6c082 | bellard | RET_STOP(ctx); |
253 | 3fc6c082 | bellard | } |
254 | 3fc6c082 | bellard | |
255 | 3fc6c082 | bellard | /* SDR1 */
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256 | 3fc6c082 | bellard | static void spr_read_sdr1 (void *opaque, int sprn) |
257 | 3fc6c082 | bellard | { |
258 | 3fc6c082 | bellard | gen_op_load_sdr1(); |
259 | 3fc6c082 | bellard | } |
260 | 3fc6c082 | bellard | |
261 | 3fc6c082 | bellard | static void spr_write_sdr1 (void *opaque, int sprn) |
262 | 3fc6c082 | bellard | { |
263 | 3fc6c082 | bellard | DisasContext *ctx = opaque; |
264 | 3fc6c082 | bellard | |
265 | 3fc6c082 | bellard | gen_op_store_sdr1(); |
266 | 3fc6c082 | bellard | RET_STOP(ctx); |
267 | 3fc6c082 | bellard | } |
268 | 3fc6c082 | bellard | |
269 | 76a66253 | j_mayer | /* 64 bits PowerPC specific SPRs */
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270 | 76a66253 | j_mayer | /* ASR */
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271 | 76a66253 | j_mayer | #if defined(TARGET_PPC64)
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272 | 76a66253 | j_mayer | static void spr_read_asr (void *opaque, int sprn) |
273 | 76a66253 | j_mayer | { |
274 | 76a66253 | j_mayer | gen_op_load_asr(); |
275 | 76a66253 | j_mayer | } |
276 | 76a66253 | j_mayer | |
277 | 76a66253 | j_mayer | static void spr_write_asr (void *opaque, int sprn) |
278 | 76a66253 | j_mayer | { |
279 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
280 | 76a66253 | j_mayer | |
281 | 76a66253 | j_mayer | gen_op_store_asr(); |
282 | 76a66253 | j_mayer | RET_STOP(ctx); |
283 | 76a66253 | j_mayer | } |
284 | 76a66253 | j_mayer | #endif
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285 | 76a66253 | j_mayer | #endif /* !defined(CONFIG_USER_ONLY) */ |
286 | 76a66253 | j_mayer | |
287 | 76a66253 | j_mayer | /* PowerPC 601 specific registers */
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288 | 76a66253 | j_mayer | /* RTC */
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289 | 76a66253 | j_mayer | static void spr_read_601_rtcl (void *opaque, int sprn) |
290 | 76a66253 | j_mayer | { |
291 | 76a66253 | j_mayer | gen_op_load_601_rtcl(); |
292 | 76a66253 | j_mayer | } |
293 | 76a66253 | j_mayer | |
294 | 76a66253 | j_mayer | static void spr_read_601_rtcu (void *opaque, int sprn) |
295 | 76a66253 | j_mayer | { |
296 | 76a66253 | j_mayer | gen_op_load_601_rtcu(); |
297 | 76a66253 | j_mayer | } |
298 | 76a66253 | j_mayer | |
299 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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300 | 76a66253 | j_mayer | static void spr_write_601_rtcu (void *opaque, int sprn) |
301 | 76a66253 | j_mayer | { |
302 | 76a66253 | j_mayer | gen_op_store_601_rtcu(); |
303 | 76a66253 | j_mayer | } |
304 | 76a66253 | j_mayer | |
305 | 76a66253 | j_mayer | static void spr_write_601_rtcl (void *opaque, int sprn) |
306 | 76a66253 | j_mayer | { |
307 | 76a66253 | j_mayer | gen_op_store_601_rtcl(); |
308 | 76a66253 | j_mayer | } |
309 | 76a66253 | j_mayer | #endif
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310 | 76a66253 | j_mayer | |
311 | 76a66253 | j_mayer | /* Unified bats */
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312 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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313 | 76a66253 | j_mayer | static void spr_read_601_ubat (void *opaque, int sprn) |
314 | 76a66253 | j_mayer | { |
315 | 76a66253 | j_mayer | gen_op_load_601_bat(sprn & 1, (sprn - SPR_IBAT0U) / 2); |
316 | 76a66253 | j_mayer | } |
317 | 76a66253 | j_mayer | |
318 | 76a66253 | j_mayer | static void spr_write_601_ubatu (void *opaque, int sprn) |
319 | 76a66253 | j_mayer | { |
320 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
321 | 76a66253 | j_mayer | |
322 | 76a66253 | j_mayer | gen_op_store_601_batu((sprn - SPR_IBAT0U) / 2);
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323 | 76a66253 | j_mayer | RET_STOP(ctx); |
324 | 76a66253 | j_mayer | } |
325 | 76a66253 | j_mayer | |
326 | 76a66253 | j_mayer | static void spr_write_601_ubatl (void *opaque, int sprn) |
327 | 76a66253 | j_mayer | { |
328 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
329 | 76a66253 | j_mayer | |
330 | 76a66253 | j_mayer | gen_op_store_601_batl((sprn - SPR_IBAT0L) / 2);
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331 | 76a66253 | j_mayer | RET_STOP(ctx); |
332 | 76a66253 | j_mayer | } |
333 | 76a66253 | j_mayer | #endif
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334 | 76a66253 | j_mayer | |
335 | 76a66253 | j_mayer | /* PowerPC 40x specific registers */
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336 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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337 | 76a66253 | j_mayer | static void spr_read_40x_pit (void *opaque, int sprn) |
338 | 76a66253 | j_mayer | { |
339 | 76a66253 | j_mayer | gen_op_load_40x_pit(); |
340 | 76a66253 | j_mayer | } |
341 | 76a66253 | j_mayer | |
342 | 76a66253 | j_mayer | static void spr_write_40x_pit (void *opaque, int sprn) |
343 | 76a66253 | j_mayer | { |
344 | 76a66253 | j_mayer | gen_op_store_40x_pit(); |
345 | 76a66253 | j_mayer | } |
346 | 76a66253 | j_mayer | |
347 | 76a66253 | j_mayer | static void spr_write_booke_tcr (void *opaque, int sprn) |
348 | 76a66253 | j_mayer | { |
349 | 76a66253 | j_mayer | gen_op_store_booke_tcr(); |
350 | 76a66253 | j_mayer | } |
351 | 76a66253 | j_mayer | |
352 | 76a66253 | j_mayer | static void spr_write_booke_tsr (void *opaque, int sprn) |
353 | 76a66253 | j_mayer | { |
354 | 76a66253 | j_mayer | gen_op_store_booke_tsr(); |
355 | 76a66253 | j_mayer | } |
356 | 76a66253 | j_mayer | #endif
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357 | 76a66253 | j_mayer | |
358 | 76a66253 | j_mayer | /* PowerPC 403 specific registers */
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359 | 76a66253 | j_mayer | /* PBL1 / PBU1 / PBL2 / PBU2 */
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360 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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361 | 76a66253 | j_mayer | static void spr_read_403_pbr (void *opaque, int sprn) |
362 | 76a66253 | j_mayer | { |
363 | 76a66253 | j_mayer | gen_op_load_403_pb(sprn - SPR_403_PBL1); |
364 | 76a66253 | j_mayer | } |
365 | 76a66253 | j_mayer | |
366 | 76a66253 | j_mayer | static void spr_write_403_pbr (void *opaque, int sprn) |
367 | 76a66253 | j_mayer | { |
368 | 76a66253 | j_mayer | DisasContext *ctx = opaque; |
369 | 76a66253 | j_mayer | |
370 | 76a66253 | j_mayer | gen_op_store_403_pb(sprn - SPR_403_PBL1); |
371 | 76a66253 | j_mayer | RET_STOP(ctx); |
372 | 76a66253 | j_mayer | } |
373 | 76a66253 | j_mayer | |
374 | 3fc6c082 | bellard | static void spr_write_pir (void *opaque, int sprn) |
375 | 3fc6c082 | bellard | { |
376 | 3fc6c082 | bellard | gen_op_store_pir(); |
377 | 3fc6c082 | bellard | } |
378 | 76a66253 | j_mayer | #endif
|
379 | 3fc6c082 | bellard | |
380 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
381 | 76a66253 | j_mayer | #define spr_register(env, num, name, uea_read, uea_write, \
|
382 | 76a66253 | j_mayer | oea_read, oea_write, initial_value) \ |
383 | 76a66253 | j_mayer | do { \
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384 | 76a66253 | j_mayer | _spr_register(env, num, name, uea_read, uea_write, initial_value); \ |
385 | 76a66253 | j_mayer | } while (0) |
386 | 76a66253 | j_mayer | static inline void _spr_register (CPUPPCState *env, int num, |
387 | 76a66253 | j_mayer | const unsigned char *name, |
388 | 76a66253 | j_mayer | void (*uea_read)(void *opaque, int sprn), |
389 | 76a66253 | j_mayer | void (*uea_write)(void *opaque, int sprn), |
390 | 76a66253 | j_mayer | target_ulong initial_value) |
391 | 76a66253 | j_mayer | #else
|
392 | 3fc6c082 | bellard | static inline void spr_register (CPUPPCState *env, int num, |
393 | 3fc6c082 | bellard | const unsigned char *name, |
394 | 3fc6c082 | bellard | void (*uea_read)(void *opaque, int sprn), |
395 | 3fc6c082 | bellard | void (*uea_write)(void *opaque, int sprn), |
396 | 3fc6c082 | bellard | void (*oea_read)(void *opaque, int sprn), |
397 | 3fc6c082 | bellard | void (*oea_write)(void *opaque, int sprn), |
398 | 3fc6c082 | bellard | target_ulong initial_value) |
399 | 76a66253 | j_mayer | #endif
|
400 | 3fc6c082 | bellard | { |
401 | 3fc6c082 | bellard | ppc_spr_t *spr; |
402 | 3fc6c082 | bellard | |
403 | 3fc6c082 | bellard | spr = &env->spr_cb[num]; |
404 | 3fc6c082 | bellard | if (spr->name != NULL ||env-> spr[num] != 0x00000000 || |
405 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
406 | 76a66253 | j_mayer | spr->oea_read != NULL || spr->oea_write != NULL || |
407 | 76a66253 | j_mayer | #endif
|
408 | 76a66253 | j_mayer | spr->uea_read != NULL || spr->uea_write != NULL) { |
409 | 3fc6c082 | bellard | printf("Error: Trying to register SPR %d (%03x) twice !\n", num, num);
|
410 | 3fc6c082 | bellard | exit(1);
|
411 | 3fc6c082 | bellard | } |
412 | 3fc6c082 | bellard | #if defined(PPC_DEBUG_SPR)
|
413 | 1b9eb036 | j_mayer | printf("*** register spr %d (%03x) %s val " ADDRX "\n", num, num, name, |
414 | 76a66253 | j_mayer | initial_value); |
415 | 3fc6c082 | bellard | #endif
|
416 | 3fc6c082 | bellard | spr->name = name; |
417 | 3fc6c082 | bellard | spr->uea_read = uea_read; |
418 | 3fc6c082 | bellard | spr->uea_write = uea_write; |
419 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
420 | 3fc6c082 | bellard | spr->oea_read = oea_read; |
421 | 3fc6c082 | bellard | spr->oea_write = oea_write; |
422 | 76a66253 | j_mayer | #endif
|
423 | 3fc6c082 | bellard | env->spr[num] = initial_value; |
424 | 3fc6c082 | bellard | } |
425 | 3fc6c082 | bellard | |
426 | 3fc6c082 | bellard | /* Generic PowerPC SPRs */
|
427 | 3fc6c082 | bellard | static void gen_spr_generic (CPUPPCState *env) |
428 | 3fc6c082 | bellard | { |
429 | 3fc6c082 | bellard | /* Integer processing */
|
430 | 3fc6c082 | bellard | spr_register(env, SPR_XER, "XER",
|
431 | 3fc6c082 | bellard | &spr_read_xer, &spr_write_xer, |
432 | 3fc6c082 | bellard | &spr_read_xer, &spr_write_xer, |
433 | 3fc6c082 | bellard | 0x00000000);
|
434 | 3fc6c082 | bellard | /* Branch contol */
|
435 | 3fc6c082 | bellard | spr_register(env, SPR_LR, "LR",
|
436 | 3fc6c082 | bellard | &spr_read_lr, &spr_write_lr, |
437 | 3fc6c082 | bellard | &spr_read_lr, &spr_write_lr, |
438 | 3fc6c082 | bellard | 0x00000000);
|
439 | 3fc6c082 | bellard | spr_register(env, SPR_CTR, "CTR",
|
440 | 3fc6c082 | bellard | &spr_read_ctr, &spr_write_ctr, |
441 | 3fc6c082 | bellard | &spr_read_ctr, &spr_write_ctr, |
442 | 3fc6c082 | bellard | 0x00000000);
|
443 | 3fc6c082 | bellard | /* Interrupt processing */
|
444 | 3fc6c082 | bellard | spr_register(env, SPR_SRR0, "SRR0",
|
445 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
446 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
447 | 3fc6c082 | bellard | 0x00000000);
|
448 | 3fc6c082 | bellard | spr_register(env, SPR_SRR1, "SRR1",
|
449 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
450 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
451 | 3fc6c082 | bellard | 0x00000000);
|
452 | 3fc6c082 | bellard | /* Processor control */
|
453 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG0, "SPRG0",
|
454 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
455 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
456 | 3fc6c082 | bellard | 0x00000000);
|
457 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG1, "SPRG1",
|
458 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
459 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
460 | 3fc6c082 | bellard | 0x00000000);
|
461 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG2, "SPRG2",
|
462 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
463 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
464 | 3fc6c082 | bellard | 0x00000000);
|
465 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG3, "SPRG3",
|
466 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
467 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
468 | 3fc6c082 | bellard | 0x00000000);
|
469 | 3fc6c082 | bellard | } |
470 | 3fc6c082 | bellard | |
471 | 3fc6c082 | bellard | /* SPR common to all non-embedded PowerPC, including 601 */
|
472 | 3fc6c082 | bellard | static void gen_spr_ne_601 (CPUPPCState *env) |
473 | 3fc6c082 | bellard | { |
474 | 3fc6c082 | bellard | /* Exception processing */
|
475 | 3fc6c082 | bellard | spr_register(env, SPR_DSISR, "DSISR",
|
476 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
477 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
478 | 3fc6c082 | bellard | 0x00000000);
|
479 | 3fc6c082 | bellard | spr_register(env, SPR_DAR, "DAR",
|
480 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
481 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
482 | 3fc6c082 | bellard | 0x00000000);
|
483 | 3fc6c082 | bellard | /* Timer */
|
484 | 3fc6c082 | bellard | spr_register(env, SPR_DECR, "DECR",
|
485 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
486 | 3fc6c082 | bellard | &spr_read_decr, &spr_write_decr, |
487 | 3fc6c082 | bellard | 0x00000000);
|
488 | 3fc6c082 | bellard | /* Memory management */
|
489 | 3fc6c082 | bellard | spr_register(env, SPR_SDR1, "SDR1",
|
490 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
491 | 3fc6c082 | bellard | &spr_read_sdr1, &spr_write_sdr1, |
492 | 3fc6c082 | bellard | 0x00000000);
|
493 | 3fc6c082 | bellard | } |
494 | 3fc6c082 | bellard | |
495 | 3fc6c082 | bellard | /* BATs 0-3 */
|
496 | 3fc6c082 | bellard | static void gen_low_BATs (CPUPPCState *env) |
497 | 3fc6c082 | bellard | { |
498 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT0U, "IBAT0U",
|
499 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
500 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
501 | 3fc6c082 | bellard | 0x00000000);
|
502 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT0L, "IBAT0L",
|
503 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
504 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
505 | 3fc6c082 | bellard | 0x00000000);
|
506 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT1U, "IBAT1U",
|
507 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
508 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
509 | 3fc6c082 | bellard | 0x00000000);
|
510 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT1L, "IBAT1L",
|
511 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
512 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
513 | 3fc6c082 | bellard | 0x00000000);
|
514 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT2U, "IBAT2U",
|
515 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
516 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
517 | 3fc6c082 | bellard | 0x00000000);
|
518 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT2L, "IBAT2L",
|
519 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
520 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
521 | 3fc6c082 | bellard | 0x00000000);
|
522 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT3U, "IBAT3U",
|
523 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
524 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
525 | 3fc6c082 | bellard | 0x00000000);
|
526 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT3L, "IBAT3L",
|
527 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
528 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
529 | 3fc6c082 | bellard | 0x00000000);
|
530 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT0U, "DBAT0U",
|
531 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
532 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
533 | 3fc6c082 | bellard | 0x00000000);
|
534 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT0L, "DBAT0L",
|
535 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
536 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
537 | 3fc6c082 | bellard | 0x00000000);
|
538 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT1U, "DBAT1U",
|
539 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
540 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
541 | 3fc6c082 | bellard | 0x00000000);
|
542 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT1L, "DBAT1L",
|
543 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
544 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
545 | 3fc6c082 | bellard | 0x00000000);
|
546 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT2U, "DBAT2U",
|
547 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
548 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
549 | 3fc6c082 | bellard | 0x00000000);
|
550 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT2L, "DBAT2L",
|
551 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
552 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
553 | 3fc6c082 | bellard | 0x00000000);
|
554 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT3U, "DBAT3U",
|
555 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
556 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
557 | 3fc6c082 | bellard | 0x00000000);
|
558 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT3L, "DBAT3L",
|
559 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
560 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
561 | 3fc6c082 | bellard | 0x00000000);
|
562 | 3fc6c082 | bellard | env->nb_BATs = 4;
|
563 | 3fc6c082 | bellard | } |
564 | 3fc6c082 | bellard | |
565 | 3fc6c082 | bellard | /* BATs 4-7 */
|
566 | 3fc6c082 | bellard | static void gen_high_BATs (CPUPPCState *env) |
567 | 3fc6c082 | bellard | { |
568 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT4U, "IBAT4U",
|
569 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
570 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
571 | 3fc6c082 | bellard | 0x00000000);
|
572 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT4L, "IBAT4L",
|
573 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
574 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
575 | 3fc6c082 | bellard | 0x00000000);
|
576 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT5U, "IBAT5U",
|
577 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
578 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
579 | 3fc6c082 | bellard | 0x00000000);
|
580 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT5L, "IBAT5L",
|
581 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
582 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
583 | 3fc6c082 | bellard | 0x00000000);
|
584 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT6U, "IBAT6U",
|
585 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
586 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
587 | 3fc6c082 | bellard | 0x00000000);
|
588 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT6L, "IBAT6L",
|
589 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
590 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
591 | 3fc6c082 | bellard | 0x00000000);
|
592 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT7U, "IBAT7U",
|
593 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
594 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
595 | 3fc6c082 | bellard | 0x00000000);
|
596 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT7L, "IBAT7L",
|
597 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
598 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
599 | 3fc6c082 | bellard | 0x00000000);
|
600 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT4U, "DBAT4U",
|
601 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
602 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
603 | 3fc6c082 | bellard | 0x00000000);
|
604 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT4L, "DBAT4L",
|
605 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
606 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
607 | 3fc6c082 | bellard | 0x00000000);
|
608 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT5U, "DBAT5U",
|
609 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
610 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
611 | 3fc6c082 | bellard | 0x00000000);
|
612 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT5L, "DBAT5L",
|
613 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
614 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
615 | 3fc6c082 | bellard | 0x00000000);
|
616 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT6U, "DBAT6U",
|
617 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
618 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
619 | 3fc6c082 | bellard | 0x00000000);
|
620 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT6L, "DBAT6L",
|
621 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
622 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
623 | 3fc6c082 | bellard | 0x00000000);
|
624 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT7U, "DBAT7U",
|
625 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
626 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
627 | 3fc6c082 | bellard | 0x00000000);
|
628 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT7L, "DBAT7L",
|
629 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
630 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
631 | 3fc6c082 | bellard | 0x00000000);
|
632 | 3fc6c082 | bellard | env->nb_BATs = 8;
|
633 | 3fc6c082 | bellard | } |
634 | 3fc6c082 | bellard | |
635 | 3fc6c082 | bellard | /* Generic PowerPC time base */
|
636 | 3fc6c082 | bellard | static void gen_tbl (CPUPPCState *env) |
637 | 3fc6c082 | bellard | { |
638 | 3fc6c082 | bellard | spr_register(env, SPR_VTBL, "TBL",
|
639 | 3fc6c082 | bellard | &spr_read_tbl, SPR_NOACCESS, |
640 | 3fc6c082 | bellard | &spr_read_tbl, SPR_NOACCESS, |
641 | 3fc6c082 | bellard | 0x00000000);
|
642 | 3fc6c082 | bellard | spr_register(env, SPR_TBL, "TBL",
|
643 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
644 | 3fc6c082 | bellard | SPR_NOACCESS, &spr_write_tbl, |
645 | 3fc6c082 | bellard | 0x00000000);
|
646 | 3fc6c082 | bellard | spr_register(env, SPR_VTBU, "TBU",
|
647 | 3fc6c082 | bellard | &spr_read_tbu, SPR_NOACCESS, |
648 | 3fc6c082 | bellard | &spr_read_tbu, SPR_NOACCESS, |
649 | 3fc6c082 | bellard | 0x00000000);
|
650 | 3fc6c082 | bellard | spr_register(env, SPR_TBU, "TBU",
|
651 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
652 | 3fc6c082 | bellard | SPR_NOACCESS, &spr_write_tbu, |
653 | 3fc6c082 | bellard | 0x00000000);
|
654 | 3fc6c082 | bellard | } |
655 | 3fc6c082 | bellard | |
656 | 76a66253 | j_mayer | /* Softare table search registers */
|
657 | 76a66253 | j_mayer | static void gen_6xx_7xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways) |
658 | 76a66253 | j_mayer | { |
659 | 76a66253 | j_mayer | env->nb_tlb = nb_tlbs; |
660 | 76a66253 | j_mayer | env->nb_ways = nb_ways; |
661 | 76a66253 | j_mayer | env->id_tlbs = 1;
|
662 | 76a66253 | j_mayer | spr_register(env, SPR_DMISS, "DMISS",
|
663 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
664 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
665 | 76a66253 | j_mayer | 0x00000000);
|
666 | 76a66253 | j_mayer | spr_register(env, SPR_DCMP, "DCMP",
|
667 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
668 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
669 | 76a66253 | j_mayer | 0x00000000);
|
670 | 76a66253 | j_mayer | spr_register(env, SPR_HASH1, "HASH1",
|
671 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
672 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
673 | 76a66253 | j_mayer | 0x00000000);
|
674 | 76a66253 | j_mayer | spr_register(env, SPR_HASH2, "HASH2",
|
675 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
676 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
677 | 76a66253 | j_mayer | 0x00000000);
|
678 | 76a66253 | j_mayer | spr_register(env, SPR_IMISS, "IMISS",
|
679 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
680 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
681 | 76a66253 | j_mayer | 0x00000000);
|
682 | 76a66253 | j_mayer | spr_register(env, SPR_ICMP, "ICMP",
|
683 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
684 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
685 | 76a66253 | j_mayer | 0x00000000);
|
686 | 76a66253 | j_mayer | spr_register(env, SPR_RPA, "RPA",
|
687 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
688 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
689 | 76a66253 | j_mayer | 0x00000000);
|
690 | 76a66253 | j_mayer | } |
691 | 76a66253 | j_mayer | |
692 | 76a66253 | j_mayer | /* SPR common to MPC755 and G2 */
|
693 | 76a66253 | j_mayer | static void gen_spr_G2_755 (CPUPPCState *env) |
694 | 76a66253 | j_mayer | { |
695 | 76a66253 | j_mayer | /* SGPRs */
|
696 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
697 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
698 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
699 | 76a66253 | j_mayer | 0x00000000);
|
700 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
701 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
702 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
703 | 76a66253 | j_mayer | 0x00000000);
|
704 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
705 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
706 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
707 | 76a66253 | j_mayer | 0x00000000);
|
708 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
709 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
710 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
711 | 76a66253 | j_mayer | 0x00000000);
|
712 | 76a66253 | j_mayer | /* External access control */
|
713 | 76a66253 | j_mayer | /* XXX : not implemented */
|
714 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
715 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
716 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
717 | 76a66253 | j_mayer | 0x00000000);
|
718 | 76a66253 | j_mayer | } |
719 | 76a66253 | j_mayer | |
720 | 3fc6c082 | bellard | /* SPR common to all 7xx PowerPC implementations */
|
721 | 3fc6c082 | bellard | static void gen_spr_7xx (CPUPPCState *env) |
722 | 3fc6c082 | bellard | { |
723 | 3fc6c082 | bellard | /* Breakpoints */
|
724 | 3fc6c082 | bellard | /* XXX : not implemented */
|
725 | 3fc6c082 | bellard | spr_register(env, SPR_DABR, "DABR",
|
726 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
727 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
728 | 3fc6c082 | bellard | 0x00000000);
|
729 | 3fc6c082 | bellard | /* XXX : not implemented */
|
730 | 3fc6c082 | bellard | spr_register(env, SPR_IABR, "IABR",
|
731 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
732 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
733 | 3fc6c082 | bellard | 0x00000000);
|
734 | 3fc6c082 | bellard | /* Cache management */
|
735 | 3fc6c082 | bellard | /* XXX : not implemented */
|
736 | 3fc6c082 | bellard | spr_register(env, SPR_ICTC, "ICTC",
|
737 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
738 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
739 | 3fc6c082 | bellard | 0x00000000);
|
740 | 76a66253 | j_mayer | /* XXX : not implemented */
|
741 | 76a66253 | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
742 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
743 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
744 | 76a66253 | j_mayer | 0x00000000);
|
745 | 3fc6c082 | bellard | /* Performance monitors */
|
746 | 3fc6c082 | bellard | /* XXX : not implemented */
|
747 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR0, "MMCR0",
|
748 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
749 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
750 | 3fc6c082 | bellard | 0x00000000);
|
751 | 3fc6c082 | bellard | /* XXX : not implemented */
|
752 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR1, "MMCR1",
|
753 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
754 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
755 | 3fc6c082 | bellard | 0x00000000);
|
756 | 3fc6c082 | bellard | /* XXX : not implemented */
|
757 | 3fc6c082 | bellard | spr_register(env, SPR_PMC1, "PMC1",
|
758 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
759 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
760 | 3fc6c082 | bellard | 0x00000000);
|
761 | 3fc6c082 | bellard | /* XXX : not implemented */
|
762 | 3fc6c082 | bellard | spr_register(env, SPR_PMC2, "PMC2",
|
763 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
764 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
765 | 3fc6c082 | bellard | 0x00000000);
|
766 | 3fc6c082 | bellard | /* XXX : not implemented */
|
767 | 3fc6c082 | bellard | spr_register(env, SPR_PMC3, "PMC3",
|
768 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
769 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
770 | 3fc6c082 | bellard | 0x00000000);
|
771 | 3fc6c082 | bellard | /* XXX : not implemented */
|
772 | 3fc6c082 | bellard | spr_register(env, SPR_PMC4, "PMC4",
|
773 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
774 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
775 | 3fc6c082 | bellard | 0x00000000);
|
776 | 3fc6c082 | bellard | /* XXX : not implemented */
|
777 | 3fc6c082 | bellard | spr_register(env, SPR_SIA, "SIA",
|
778 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
779 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
780 | 3fc6c082 | bellard | 0x00000000);
|
781 | 3fc6c082 | bellard | spr_register(env, SPR_UMMCR0, "UMMCR0",
|
782 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
783 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
784 | 3fc6c082 | bellard | 0x00000000);
|
785 | 3fc6c082 | bellard | spr_register(env, SPR_UMMCR1, "UMMCR1",
|
786 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
787 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
788 | 3fc6c082 | bellard | 0x00000000);
|
789 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC1, "UPMC1",
|
790 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
791 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
792 | 3fc6c082 | bellard | 0x00000000);
|
793 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC2, "UPMC2",
|
794 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
795 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
796 | 3fc6c082 | bellard | 0x00000000);
|
797 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC3, "UPMC3",
|
798 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
799 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
800 | 3fc6c082 | bellard | 0x00000000);
|
801 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC4, "UPMC4",
|
802 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
803 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
804 | 3fc6c082 | bellard | 0x00000000);
|
805 | 3fc6c082 | bellard | spr_register(env, SPR_USIA, "USIA",
|
806 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
807 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
808 | 3fc6c082 | bellard | 0x00000000);
|
809 | 3fc6c082 | bellard | /* Thermal management */
|
810 | 3fc6c082 | bellard | /* XXX : not implemented */
|
811 | 3fc6c082 | bellard | spr_register(env, SPR_THRM1, "THRM1",
|
812 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
813 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
814 | 3fc6c082 | bellard | 0x00000000);
|
815 | 3fc6c082 | bellard | /* XXX : not implemented */
|
816 | 3fc6c082 | bellard | spr_register(env, SPR_THRM2, "THRM2",
|
817 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
818 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
819 | 3fc6c082 | bellard | 0x00000000);
|
820 | 3fc6c082 | bellard | /* XXX : not implemented */
|
821 | 3fc6c082 | bellard | spr_register(env, SPR_THRM3, "THRM3",
|
822 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
823 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
824 | 3fc6c082 | bellard | 0x00000000);
|
825 | 3fc6c082 | bellard | /* External access control */
|
826 | 3fc6c082 | bellard | /* XXX : not implemented */
|
827 | 3fc6c082 | bellard | spr_register(env, SPR_EAR, "EAR",
|
828 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
829 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
830 | 3fc6c082 | bellard | 0x00000000);
|
831 | 3fc6c082 | bellard | } |
832 | 3fc6c082 | bellard | |
833 | 3fc6c082 | bellard | /* SPR specific to PowerPC 604 implementation */
|
834 | 3fc6c082 | bellard | static void gen_spr_604 (CPUPPCState *env) |
835 | 3fc6c082 | bellard | { |
836 | 3fc6c082 | bellard | /* Processor identification */
|
837 | 3fc6c082 | bellard | spr_register(env, SPR_PIR, "PIR",
|
838 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
839 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_pir, |
840 | 3fc6c082 | bellard | 0x00000000);
|
841 | 3fc6c082 | bellard | /* Breakpoints */
|
842 | 3fc6c082 | bellard | /* XXX : not implemented */
|
843 | 3fc6c082 | bellard | spr_register(env, SPR_IABR, "IABR",
|
844 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
845 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
846 | 3fc6c082 | bellard | 0x00000000);
|
847 | 3fc6c082 | bellard | /* XXX : not implemented */
|
848 | 3fc6c082 | bellard | spr_register(env, SPR_DABR, "DABR",
|
849 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
850 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
851 | 3fc6c082 | bellard | 0x00000000);
|
852 | 3fc6c082 | bellard | /* Performance counters */
|
853 | 3fc6c082 | bellard | /* XXX : not implemented */
|
854 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR0, "MMCR0",
|
855 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
856 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
857 | 3fc6c082 | bellard | 0x00000000);
|
858 | 3fc6c082 | bellard | /* XXX : not implemented */
|
859 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR1, "MMCR1",
|
860 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
861 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
862 | 3fc6c082 | bellard | 0x00000000);
|
863 | 3fc6c082 | bellard | /* XXX : not implemented */
|
864 | 3fc6c082 | bellard | spr_register(env, SPR_PMC1, "PMC1",
|
865 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
866 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
867 | 3fc6c082 | bellard | 0x00000000);
|
868 | 3fc6c082 | bellard | /* XXX : not implemented */
|
869 | 3fc6c082 | bellard | spr_register(env, SPR_PMC2, "PMC2",
|
870 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
871 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
872 | 3fc6c082 | bellard | 0x00000000);
|
873 | 3fc6c082 | bellard | /* XXX : not implemented */
|
874 | 3fc6c082 | bellard | spr_register(env, SPR_PMC3, "PMC3",
|
875 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
876 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
877 | 3fc6c082 | bellard | 0x00000000);
|
878 | 3fc6c082 | bellard | /* XXX : not implemented */
|
879 | 3fc6c082 | bellard | spr_register(env, SPR_PMC4, "PMC4",
|
880 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
881 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
882 | 3fc6c082 | bellard | 0x00000000);
|
883 | 3fc6c082 | bellard | /* XXX : not implemented */
|
884 | 3fc6c082 | bellard | spr_register(env, SPR_SIA, "SIA",
|
885 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
886 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
887 | 3fc6c082 | bellard | 0x00000000);
|
888 | 3fc6c082 | bellard | /* XXX : not implemented */
|
889 | 3fc6c082 | bellard | spr_register(env, SPR_SDA, "SDA",
|
890 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
891 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
892 | 3fc6c082 | bellard | 0x00000000);
|
893 | 3fc6c082 | bellard | /* External access control */
|
894 | 3fc6c082 | bellard | /* XXX : not implemented */
|
895 | 3fc6c082 | bellard | spr_register(env, SPR_EAR, "EAR",
|
896 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
897 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
898 | 3fc6c082 | bellard | 0x00000000);
|
899 | 3fc6c082 | bellard | } |
900 | 3fc6c082 | bellard | |
901 | 76a66253 | j_mayer | /* SPR specific to PowerPC 603 implementation */
|
902 | 76a66253 | j_mayer | static void gen_spr_603 (CPUPPCState *env) |
903 | 3fc6c082 | bellard | { |
904 | 76a66253 | j_mayer | /* External access control */
|
905 | 76a66253 | j_mayer | /* XXX : not implemented */
|
906 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
907 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
908 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
909 | 76a66253 | j_mayer | 0x00000000);
|
910 | 3fc6c082 | bellard | } |
911 | 3fc6c082 | bellard | |
912 | 76a66253 | j_mayer | /* SPR specific to PowerPC G2 implementation */
|
913 | 76a66253 | j_mayer | static void gen_spr_G2 (CPUPPCState *env) |
914 | 3fc6c082 | bellard | { |
915 | 76a66253 | j_mayer | /* Memory base address */
|
916 | 76a66253 | j_mayer | /* MBAR */
|
917 | 76a66253 | j_mayer | spr_register(env, SPR_MBAR, "MBAR",
|
918 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
919 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
920 | 76a66253 | j_mayer | 0x00000000);
|
921 | 76a66253 | j_mayer | /* System version register */
|
922 | 76a66253 | j_mayer | /* SVR */
|
923 | 76a66253 | j_mayer | spr_register(env, SPR_SVR, "SVR",
|
924 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
925 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
926 | 76a66253 | j_mayer | 0x00000000);
|
927 | 76a66253 | j_mayer | /* Exception processing */
|
928 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
|
929 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
930 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
931 | 76a66253 | j_mayer | 0x00000000);
|
932 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
|
933 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
934 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
935 | 76a66253 | j_mayer | 0x00000000);
|
936 | 76a66253 | j_mayer | /* Breakpoints */
|
937 | 76a66253 | j_mayer | /* XXX : not implemented */
|
938 | 76a66253 | j_mayer | spr_register(env, SPR_DABR, "DABR",
|
939 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
940 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
941 | 76a66253 | j_mayer | 0x00000000);
|
942 | 76a66253 | j_mayer | /* XXX : not implemented */
|
943 | 76a66253 | j_mayer | spr_register(env, SPR_DABR2, "DABR2",
|
944 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
945 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
946 | 76a66253 | j_mayer | 0x00000000);
|
947 | 76a66253 | j_mayer | /* XXX : not implemented */
|
948 | 76a66253 | j_mayer | spr_register(env, SPR_IABR, "IABR",
|
949 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
950 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
951 | 76a66253 | j_mayer | 0x00000000);
|
952 | 76a66253 | j_mayer | /* XXX : not implemented */
|
953 | 76a66253 | j_mayer | spr_register(env, SPR_IABR2, "IABR2",
|
954 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
955 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
956 | 76a66253 | j_mayer | 0x00000000);
|
957 | 76a66253 | j_mayer | /* XXX : not implemented */
|
958 | 76a66253 | j_mayer | spr_register(env, SPR_IBCR, "IBCR",
|
959 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
960 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
961 | 76a66253 | j_mayer | 0x00000000);
|
962 | 76a66253 | j_mayer | /* XXX : not implemented */
|
963 | 76a66253 | j_mayer | spr_register(env, SPR_DBCR, "DBCR",
|
964 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
965 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
966 | 76a66253 | j_mayer | 0x00000000);
|
967 | 76a66253 | j_mayer | } |
968 | 76a66253 | j_mayer | |
969 | 76a66253 | j_mayer | /* SPR specific to PowerPC 602 implementation */
|
970 | 76a66253 | j_mayer | static void gen_spr_602 (CPUPPCState *env) |
971 | 76a66253 | j_mayer | { |
972 | 76a66253 | j_mayer | /* ESA registers */
|
973 | 76a66253 | j_mayer | /* XXX : not implemented */
|
974 | 76a66253 | j_mayer | spr_register(env, SPR_SER, "SER",
|
975 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
976 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
977 | 76a66253 | j_mayer | 0x00000000);
|
978 | 76a66253 | j_mayer | /* XXX : not implemented */
|
979 | 76a66253 | j_mayer | spr_register(env, SPR_SEBR, "SEBR",
|
980 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
981 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
982 | 76a66253 | j_mayer | 0x00000000);
|
983 | 76a66253 | j_mayer | /* XXX : not implemented */
|
984 | 76a66253 | j_mayer | spr_register(env, SPR_ESASR, "ESASR",
|
985 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
986 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
987 | 76a66253 | j_mayer | 0x00000000);
|
988 | 76a66253 | j_mayer | /* Floating point status */
|
989 | 76a66253 | j_mayer | /* XXX : not implemented */
|
990 | 76a66253 | j_mayer | spr_register(env, SPR_SP, "SP",
|
991 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
992 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
993 | 76a66253 | j_mayer | 0x00000000);
|
994 | 76a66253 | j_mayer | /* XXX : not implemented */
|
995 | 76a66253 | j_mayer | spr_register(env, SPR_LT, "LT",
|
996 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
997 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
998 | 76a66253 | j_mayer | 0x00000000);
|
999 | 76a66253 | j_mayer | /* Watchdog timer */
|
1000 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1001 | 76a66253 | j_mayer | spr_register(env, SPR_TCR, "TCR",
|
1002 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1003 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1004 | 76a66253 | j_mayer | 0x00000000);
|
1005 | 76a66253 | j_mayer | /* Interrupt base */
|
1006 | 76a66253 | j_mayer | spr_register(env, SPR_IBR, "IBR",
|
1007 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1008 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1009 | 76a66253 | j_mayer | 0x00000000);
|
1010 | 76a66253 | j_mayer | } |
1011 | 76a66253 | j_mayer | |
1012 | 76a66253 | j_mayer | /* SPR specific to PowerPC 601 implementation */
|
1013 | 76a66253 | j_mayer | static void gen_spr_601 (CPUPPCState *env) |
1014 | 76a66253 | j_mayer | { |
1015 | 76a66253 | j_mayer | /* Multiplication/division register */
|
1016 | 76a66253 | j_mayer | /* MQ */
|
1017 | 76a66253 | j_mayer | spr_register(env, SPR_MQ, "MQ",
|
1018 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1019 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1020 | 76a66253 | j_mayer | 0x00000000);
|
1021 | 76a66253 | j_mayer | /* RTC registers */
|
1022 | 76a66253 | j_mayer | spr_register(env, SPR_601_RTCU, "RTCU",
|
1023 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1024 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_601_rtcu, |
1025 | 76a66253 | j_mayer | 0x00000000);
|
1026 | 76a66253 | j_mayer | spr_register(env, SPR_601_VRTCU, "RTCU",
|
1027 | 76a66253 | j_mayer | &spr_read_601_rtcu, SPR_NOACCESS, |
1028 | 76a66253 | j_mayer | &spr_read_601_rtcu, SPR_NOACCESS, |
1029 | 76a66253 | j_mayer | 0x00000000);
|
1030 | 76a66253 | j_mayer | spr_register(env, SPR_601_RTCL, "RTCL",
|
1031 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1032 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_601_rtcl, |
1033 | 76a66253 | j_mayer | 0x00000000);
|
1034 | 76a66253 | j_mayer | spr_register(env, SPR_601_VRTCL, "RTCL",
|
1035 | 76a66253 | j_mayer | &spr_read_601_rtcl, SPR_NOACCESS, |
1036 | 76a66253 | j_mayer | &spr_read_601_rtcl, SPR_NOACCESS, |
1037 | 76a66253 | j_mayer | 0x00000000);
|
1038 | 76a66253 | j_mayer | /* Timer */
|
1039 | 76a66253 | j_mayer | #if 0 /* ? */
|
1040 | 76a66253 | j_mayer | spr_register(env, SPR_601_UDECR, "UDECR",
|
1041 | 76a66253 | j_mayer | &spr_read_decr, SPR_NOACCESS,
|
1042 | 76a66253 | j_mayer | &spr_read_decr, SPR_NOACCESS,
|
1043 | 76a66253 | j_mayer | 0x00000000);
|
1044 | 76a66253 | j_mayer | #endif
|
1045 | 76a66253 | j_mayer | /* External access control */
|
1046 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1047 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
1048 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1049 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1050 | 76a66253 | j_mayer | 0x00000000);
|
1051 | 76a66253 | j_mayer | /* Memory management */
|
1052 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT0U, "IBAT0U",
|
1053 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1054 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1055 | 76a66253 | j_mayer | 0x00000000);
|
1056 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT0L, "IBAT0L",
|
1057 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1058 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1059 | 76a66253 | j_mayer | 0x00000000);
|
1060 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT1U, "IBAT1U",
|
1061 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1062 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1063 | 76a66253 | j_mayer | 0x00000000);
|
1064 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT1L, "IBAT1L",
|
1065 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1066 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1067 | 76a66253 | j_mayer | 0x00000000);
|
1068 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT2U, "IBAT2U",
|
1069 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1070 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1071 | 76a66253 | j_mayer | 0x00000000);
|
1072 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT2L, "IBAT2L",
|
1073 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1074 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1075 | 76a66253 | j_mayer | 0x00000000);
|
1076 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT3U, "IBAT3U",
|
1077 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1078 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1079 | 76a66253 | j_mayer | 0x00000000);
|
1080 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT3L, "IBAT3L",
|
1081 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1082 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1083 | 76a66253 | j_mayer | 0x00000000);
|
1084 | 76a66253 | j_mayer | } |
1085 | 76a66253 | j_mayer | |
1086 | 76a66253 | j_mayer | /* PowerPC BookE SPR */
|
1087 | 76a66253 | j_mayer | static void gen_spr_BookE (CPUPPCState *env) |
1088 | 76a66253 | j_mayer | { |
1089 | 76a66253 | j_mayer | /* Processor identification */
|
1090 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
1091 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1092 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_pir, |
1093 | 76a66253 | j_mayer | 0x00000000);
|
1094 | 76a66253 | j_mayer | /* Interrupt processing */
|
1095 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
|
1096 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1097 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1098 | 76a66253 | j_mayer | 0x00000000);
|
1099 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
|
1100 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1101 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1102 | 363be49c | j_mayer | 0x00000000);
|
1103 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_DSRR0, "DSRR0",
|
1104 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1105 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1106 | 363be49c | j_mayer | 0x00000000);
|
1107 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_DSRR1, "DSRR1",
|
1108 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1109 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1110 | 363be49c | j_mayer | 0x00000000);
|
1111 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
|
1112 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1113 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1114 | 363be49c | j_mayer | 0x00000000);
|
1115 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
|
1116 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1117 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1118 | 76a66253 | j_mayer | 0x00000000);
|
1119 | 76a66253 | j_mayer | /* Debug */
|
1120 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1121 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC1, "IAC1",
|
1122 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1123 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1124 | 76a66253 | j_mayer | 0x00000000);
|
1125 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1126 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC2, "IAC2",
|
1127 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1128 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1129 | 76a66253 | j_mayer | 0x00000000);
|
1130 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1131 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
1132 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1133 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1134 | 76a66253 | j_mayer | 0x00000000);
|
1135 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1136 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
1137 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1138 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1139 | 76a66253 | j_mayer | 0x00000000);
|
1140 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1141 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DAC1, "DAC1",
|
1142 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1143 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1144 | 76a66253 | j_mayer | 0x00000000);
|
1145 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1146 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DAC2, "DAC2",
|
1147 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1148 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1149 | 76a66253 | j_mayer | 0x00000000);
|
1150 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1151 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
1152 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1153 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1154 | 76a66253 | j_mayer | 0x00000000);
|
1155 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1156 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
1157 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1158 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1159 | 76a66253 | j_mayer | 0x00000000);
|
1160 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1161 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR0, "DBCR0",
|
1162 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1163 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1164 | 76a66253 | j_mayer | 0x00000000);
|
1165 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1166 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR1, "DBCR1",
|
1167 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1168 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1169 | 76a66253 | j_mayer | 0x00000000);
|
1170 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1171 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR2, "DBCR2",
|
1172 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1173 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1174 | 76a66253 | j_mayer | 0x00000000);
|
1175 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1176 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBSR, "DBSR",
|
1177 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1178 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1179 | 76a66253 | j_mayer | 0x00000000);
|
1180 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DEAR, "DEAR",
|
1181 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1182 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1183 | 76a66253 | j_mayer | 0x00000000);
|
1184 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_ESR, "ESR",
|
1185 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1186 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1187 | 76a66253 | j_mayer | 0x00000000);
|
1188 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVPR, "IVPR",
|
1189 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1190 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1191 | 363be49c | j_mayer | 0x00000000);
|
1192 | 363be49c | j_mayer | /* Exception vectors */
|
1193 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVPR, "IVPR",
|
1194 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1195 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1196 | 76a66253 | j_mayer | 0x00000000);
|
1197 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR0, "IVOR0",
|
1198 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1199 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1200 | 76a66253 | j_mayer | 0x00000000);
|
1201 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR1, "IVOR1",
|
1202 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1203 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1204 | 76a66253 | j_mayer | 0x00000000);
|
1205 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR2, "IVOR2",
|
1206 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1207 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1208 | 76a66253 | j_mayer | 0x00000000);
|
1209 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR3, "IVOR3",
|
1210 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1211 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1212 | 76a66253 | j_mayer | 0x00000000);
|
1213 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR4, "IVOR4",
|
1214 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1215 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1216 | 76a66253 | j_mayer | 0x00000000);
|
1217 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR5, "IVOR5",
|
1218 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1219 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1220 | 76a66253 | j_mayer | 0x00000000);
|
1221 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR6, "IVOR6",
|
1222 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1223 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1224 | 76a66253 | j_mayer | 0x00000000);
|
1225 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR7, "IVOR7",
|
1226 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1227 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1228 | 76a66253 | j_mayer | 0x00000000);
|
1229 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR8, "IVOR8",
|
1230 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1231 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1232 | 76a66253 | j_mayer | 0x00000000);
|
1233 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR9, "IVOR9",
|
1234 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1235 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1236 | 76a66253 | j_mayer | 0x00000000);
|
1237 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR10, "IVOR10",
|
1238 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1239 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1240 | 76a66253 | j_mayer | 0x00000000);
|
1241 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR11, "IVOR11",
|
1242 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1243 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1244 | 76a66253 | j_mayer | 0x00000000);
|
1245 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR12, "IVOR12",
|
1246 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1247 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1248 | 76a66253 | j_mayer | 0x00000000);
|
1249 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR13, "IVOR13",
|
1250 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1251 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1252 | 76a66253 | j_mayer | 0x00000000);
|
1253 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR14, "IVOR14",
|
1254 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1255 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1256 | 76a66253 | j_mayer | 0x00000000);
|
1257 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IVOR15, "IVOR15",
|
1258 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1259 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1260 | 76a66253 | j_mayer | 0x00000000);
|
1261 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVOR32, "IVOR32",
|
1262 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1263 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1264 | 363be49c | j_mayer | 0x00000000);
|
1265 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVOR33, "IVOR33",
|
1266 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1267 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1268 | 363be49c | j_mayer | 0x00000000);
|
1269 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVOR34, "IVOR34",
|
1270 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1271 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1272 | 363be49c | j_mayer | 0x00000000);
|
1273 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVOR35, "IVOR35",
|
1274 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1275 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1276 | 363be49c | j_mayer | 0x00000000);
|
1277 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVOR36, "IVOR36",
|
1278 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1279 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1280 | 363be49c | j_mayer | 0x00000000);
|
1281 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVOR37, "IVOR37",
|
1282 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1283 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1284 | 363be49c | j_mayer | 0x00000000);
|
1285 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_PID, "PID",
|
1286 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1287 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1288 | 76a66253 | j_mayer | 0x00000000);
|
1289 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_TCR, "TCR",
|
1290 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1291 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tcr, |
1292 | 76a66253 | j_mayer | 0x00000000);
|
1293 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_TSR, "TSR",
|
1294 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1295 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tsr, |
1296 | 76a66253 | j_mayer | 0x00000000);
|
1297 | 76a66253 | j_mayer | /* Timer */
|
1298 | 76a66253 | j_mayer | spr_register(env, SPR_DECR, "DECR",
|
1299 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1300 | 76a66253 | j_mayer | &spr_read_decr, &spr_write_decr, |
1301 | 76a66253 | j_mayer | 0x00000000);
|
1302 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DECAR, "DECAR",
|
1303 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1304 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1305 | 76a66253 | j_mayer | 0x00000000);
|
1306 | 76a66253 | j_mayer | /* SPRGs */
|
1307 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG0, "USPRG0",
|
1308 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1309 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1310 | 76a66253 | j_mayer | 0x00000000);
|
1311 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
1312 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1313 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1314 | 76a66253 | j_mayer | 0x00000000);
|
1315 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
1316 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1317 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1318 | 76a66253 | j_mayer | 0x00000000);
|
1319 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
1320 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1321 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1322 | 76a66253 | j_mayer | 0x00000000);
|
1323 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
1324 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1325 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1326 | 76a66253 | j_mayer | 0x00000000);
|
1327 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
1328 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1329 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1330 | 76a66253 | j_mayer | 0x00000000);
|
1331 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
1332 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1333 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1334 | 76a66253 | j_mayer | 0x00000000);
|
1335 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
1336 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1337 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1338 | 76a66253 | j_mayer | 0x00000000);
|
1339 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
1340 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1341 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1342 | 76a66253 | j_mayer | 0x00000000);
|
1343 | 76a66253 | j_mayer | } |
1344 | 76a66253 | j_mayer | |
1345 | 363be49c | j_mayer | /* FSL storage control registers */
|
1346 | 363be49c | j_mayer | static void gen_spr_BookE_FSL (CPUPPCState *env) |
1347 | 363be49c | j_mayer | { |
1348 | 363be49c | j_mayer | /* TLB assist registers */
|
1349 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS0, "MAS0",
|
1350 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1351 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1352 | 363be49c | j_mayer | 0x00000000);
|
1353 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS1, "MAS2",
|
1354 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1355 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1356 | 363be49c | j_mayer | 0x00000000);
|
1357 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS2, "MAS3",
|
1358 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1359 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1360 | 363be49c | j_mayer | 0x00000000);
|
1361 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS3, "MAS4",
|
1362 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1363 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1364 | 363be49c | j_mayer | 0x00000000);
|
1365 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS4, "MAS5",
|
1366 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1367 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1368 | 363be49c | j_mayer | 0x00000000);
|
1369 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS6, "MAS6",
|
1370 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1371 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1372 | 363be49c | j_mayer | 0x00000000);
|
1373 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MAS7, "MAS7",
|
1374 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1375 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1376 | 363be49c | j_mayer | 0x00000000);
|
1377 | 363be49c | j_mayer | if (env->nb_pids > 1) { |
1378 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_PID1, "PID1",
|
1379 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1380 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1381 | 363be49c | j_mayer | 0x00000000);
|
1382 | 363be49c | j_mayer | } |
1383 | 363be49c | j_mayer | if (env->nb_pids > 2) { |
1384 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_PID2, "PID2",
|
1385 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1386 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1387 | 363be49c | j_mayer | 0x00000000);
|
1388 | 363be49c | j_mayer | } |
1389 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MMUCFG, "MMUCFG",
|
1390 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1391 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1392 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1393 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_MMUCSR0, "MMUCSR0",
|
1394 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1395 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1396 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1397 | 363be49c | j_mayer | switch (env->nb_ways) {
|
1398 | 363be49c | j_mayer | case 4: |
1399 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
|
1400 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1401 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1402 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1403 | 363be49c | j_mayer | /* Fallthru */
|
1404 | 363be49c | j_mayer | case 3: |
1405 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG",
|
1406 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1407 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1408 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1409 | 363be49c | j_mayer | /* Fallthru */
|
1410 | 363be49c | j_mayer | case 2: |
1411 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
|
1412 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1413 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1414 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1415 | 363be49c | j_mayer | /* Fallthru */
|
1416 | 363be49c | j_mayer | case 1: |
1417 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
|
1418 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1419 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1420 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1421 | 363be49c | j_mayer | /* Fallthru */
|
1422 | 363be49c | j_mayer | case 0: |
1423 | 363be49c | j_mayer | default:
|
1424 | 363be49c | j_mayer | break;
|
1425 | 363be49c | j_mayer | } |
1426 | 363be49c | j_mayer | } |
1427 | 363be49c | j_mayer | |
1428 | 76a66253 | j_mayer | /* SPR specific to PowerPC 440 implementation */
|
1429 | 76a66253 | j_mayer | static void gen_spr_440 (CPUPPCState *env) |
1430 | 76a66253 | j_mayer | { |
1431 | 76a66253 | j_mayer | /* Cache control */
|
1432 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1433 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV0, "DNV0",
|
1434 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1435 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1436 | 76a66253 | j_mayer | 0x00000000);
|
1437 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1438 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV1, "DNV1",
|
1439 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1440 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1441 | 76a66253 | j_mayer | 0x00000000);
|
1442 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1443 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV2, "DNV2",
|
1444 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1445 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1446 | 76a66253 | j_mayer | 0x00000000);
|
1447 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1448 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV3, "DNV3",
|
1449 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1450 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1451 | 76a66253 | j_mayer | 0x00000000);
|
1452 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1453 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT0, "DVT0",
|
1454 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1455 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1456 | 76a66253 | j_mayer | 0x00000000);
|
1457 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1458 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT1, "DVT1",
|
1459 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1460 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1461 | 76a66253 | j_mayer | 0x00000000);
|
1462 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1463 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT2, "DVT2",
|
1464 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1465 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1466 | 76a66253 | j_mayer | 0x00000000);
|
1467 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1468 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVT3, "DVT3",
|
1469 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1470 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1471 | 76a66253 | j_mayer | 0x00000000);
|
1472 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1473 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVLIM, "DVLIM",
|
1474 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1475 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1476 | 76a66253 | j_mayer | 0x00000000);
|
1477 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1478 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV0, "INV0",
|
1479 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1480 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1481 | 76a66253 | j_mayer | 0x00000000);
|
1482 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1483 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV1, "INV1",
|
1484 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1485 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1486 | 76a66253 | j_mayer | 0x00000000);
|
1487 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1488 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV2, "INV2",
|
1489 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1490 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1491 | 76a66253 | j_mayer | 0x00000000);
|
1492 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1493 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV3, "INV3",
|
1494 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1495 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1496 | 76a66253 | j_mayer | 0x00000000);
|
1497 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1498 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT0, "IVT0",
|
1499 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1500 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1501 | 76a66253 | j_mayer | 0x00000000);
|
1502 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1503 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT1, "IVT1",
|
1504 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1505 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1506 | 76a66253 | j_mayer | 0x00000000);
|
1507 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1508 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT2, "IVT2",
|
1509 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1510 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1511 | 76a66253 | j_mayer | 0x00000000);
|
1512 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1513 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVT3, "IVT3",
|
1514 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1515 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1516 | 76a66253 | j_mayer | 0x00000000);
|
1517 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1518 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVLIM, "IVLIM",
|
1519 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1520 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1521 | 76a66253 | j_mayer | 0x00000000);
|
1522 | 76a66253 | j_mayer | /* Cache debug */
|
1523 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1524 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_DCBTRH, "DCBTRH",
|
1525 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1526 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1527 | 76a66253 | j_mayer | 0x00000000);
|
1528 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1529 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_DCBTRL, "DCBTRL",
|
1530 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1531 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1532 | 76a66253 | j_mayer | 0x00000000);
|
1533 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1534 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_ICBDR, "ICBDR",
|
1535 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1536 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1537 | 76a66253 | j_mayer | 0x00000000);
|
1538 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1539 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_ICBTRH, "ICBTRH",
|
1540 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1541 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1542 | 76a66253 | j_mayer | 0x00000000);
|
1543 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1544 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_ICBTRL, "ICBTRL",
|
1545 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1546 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1547 | 76a66253 | j_mayer | 0x00000000);
|
1548 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1549 | 76a66253 | j_mayer | spr_register(env, SPR_440_DBDR, "DBDR",
|
1550 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1551 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1552 | 76a66253 | j_mayer | 0x00000000);
|
1553 | 76a66253 | j_mayer | /* Processor control */
|
1554 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_CCR0, "CCR0",
|
1555 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1556 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1557 | 76a66253 | j_mayer | 0x00000000);
|
1558 | 76a66253 | j_mayer | spr_register(env, SPR_440_RSTCFG, "RSTCFG",
|
1559 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1560 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1561 | 76a66253 | j_mayer | 0x00000000);
|
1562 | 76a66253 | j_mayer | /* Storage control */
|
1563 | 76a66253 | j_mayer | spr_register(env, SPR_440_MMUCR, "MMUCR",
|
1564 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1565 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1566 | 76a66253 | j_mayer | 0x00000000);
|
1567 | 76a66253 | j_mayer | } |
1568 | 76a66253 | j_mayer | |
1569 | 76a66253 | j_mayer | /* SPR shared between PowerPC 40x implementations */
|
1570 | 76a66253 | j_mayer | static void gen_spr_40x (CPUPPCState *env) |
1571 | 76a66253 | j_mayer | { |
1572 | 76a66253 | j_mayer | /* Cache */
|
1573 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1574 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DCCR, "DCCR",
|
1575 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1576 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1577 | 76a66253 | j_mayer | 0x00000000);
|
1578 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1579 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DCWR, "DCWR",
|
1580 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1581 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1582 | 76a66253 | j_mayer | 0x00000000);
|
1583 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1584 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ICCR, "ICCR",
|
1585 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1586 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1587 | 76a66253 | j_mayer | 0x00000000);
|
1588 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1589 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_ICBDR, "ICBDR",
|
1590 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1591 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1592 | 76a66253 | j_mayer | 0x00000000);
|
1593 | 76a66253 | j_mayer | /* Bus access control */
|
1594 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SGR, "SGR",
|
1595 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1596 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1597 | 76a66253 | j_mayer | 0xFFFFFFFF);
|
1598 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ZPR, "ZPR",
|
1599 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1600 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1601 | 76a66253 | j_mayer | 0x00000000);
|
1602 | 76a66253 | j_mayer | /* MMU */
|
1603 | 76a66253 | j_mayer | spr_register(env, SPR_40x_PID, "PID",
|
1604 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1605 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1606 | 76a66253 | j_mayer | 0x00000000);
|
1607 | 76a66253 | j_mayer | /* Exception */
|
1608 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DEAR, "DEAR",
|
1609 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1610 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1611 | 76a66253 | j_mayer | 0x00000000);
|
1612 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ESR, "ESR",
|
1613 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1614 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1615 | 76a66253 | j_mayer | 0x00000000);
|
1616 | 76a66253 | j_mayer | spr_register(env, SPR_40x_EVPR, "EVPR",
|
1617 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1618 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1619 | 76a66253 | j_mayer | 0x00000000);
|
1620 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SRR2, "SRR2",
|
1621 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1622 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1623 | 76a66253 | j_mayer | 0x00000000);
|
1624 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SRR3, "SRR3",
|
1625 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1626 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1627 | 76a66253 | j_mayer | 0x00000000);
|
1628 | 76a66253 | j_mayer | /* Timers */
|
1629 | 76a66253 | j_mayer | spr_register(env, SPR_40x_PIT, "PIT",
|
1630 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1631 | 76a66253 | j_mayer | &spr_read_40x_pit, &spr_write_40x_pit, |
1632 | 76a66253 | j_mayer | 0x00000000);
|
1633 | 76a66253 | j_mayer | spr_register(env, SPR_40x_TCR, "TCR",
|
1634 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1635 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tcr, |
1636 | 76a66253 | j_mayer | 0x00000000);
|
1637 | 76a66253 | j_mayer | spr_register(env, SPR_40x_TSR, "TSR",
|
1638 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1639 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tsr, |
1640 | 76a66253 | j_mayer | 0x00000000);
|
1641 | 76a66253 | j_mayer | /* Debug interface */
|
1642 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1643 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC1, "DAC1",
|
1644 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1645 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1646 | 76a66253 | j_mayer | 0x00000000);
|
1647 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1648 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1649 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1650 | 76a66253 | j_mayer | 0x00000000);
|
1651 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1652 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DBCR0, "DBCR0",
|
1653 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1654 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1655 | 76a66253 | j_mayer | 0x00000000);
|
1656 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1657 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DBSR, "DBSR",
|
1658 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1659 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1660 | 76a66253 | j_mayer | /* Last reset was system reset (system boot */
|
1661 | 76a66253 | j_mayer | 0x00000300);
|
1662 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1663 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC1, "IAC1",
|
1664 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1665 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1666 | 76a66253 | j_mayer | 0x00000000);
|
1667 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1668 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1669 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1670 | 76a66253 | j_mayer | 0x00000000);
|
1671 | 76a66253 | j_mayer | } |
1672 | 76a66253 | j_mayer | |
1673 | 76a66253 | j_mayer | /* SPR specific to PowerPC 405 implementation */
|
1674 | 76a66253 | j_mayer | static void gen_spr_405 (CPUPPCState *env) |
1675 | 76a66253 | j_mayer | { |
1676 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_CCR0, "CCR0",
|
1677 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1678 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1679 | 76a66253 | j_mayer | 0x00700000);
|
1680 | 76a66253 | j_mayer | /* Debug */
|
1681 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1682 | 76a66253 | j_mayer | spr_register(env, SPR_405_DBCR1, "DBCR1",
|
1683 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1684 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1685 | 76a66253 | j_mayer | 0x00000000);
|
1686 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1687 | 76a66253 | j_mayer | spr_register(env, SPR_405_DVC1, "DVC1",
|
1688 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1689 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1690 | 76a66253 | j_mayer | 0x00000000);
|
1691 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1692 | 76a66253 | j_mayer | spr_register(env, SPR_405_DVC2, "DVC2",
|
1693 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1694 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1695 | 76a66253 | j_mayer | 0x00000000);
|
1696 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1697 | 76a66253 | j_mayer | spr_register(env, SPR_405_IAC3, "IAC3",
|
1698 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1699 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1700 | 76a66253 | j_mayer | 0x00000000);
|
1701 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1702 | 76a66253 | j_mayer | spr_register(env, SPR_405_IAC4, "IAC4",
|
1703 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1704 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1705 | 76a66253 | j_mayer | 0x00000000);
|
1706 | 76a66253 | j_mayer | /* Storage control */
|
1707 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1708 | 76a66253 | j_mayer | spr_register(env, SPR_405_SLER, "SLER",
|
1709 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1710 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1711 | 76a66253 | j_mayer | 0x00000000);
|
1712 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1713 | 76a66253 | j_mayer | spr_register(env, SPR_405_SU0R, "SU0R",
|
1714 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1715 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1716 | 76a66253 | j_mayer | 0x00000000);
|
1717 | 76a66253 | j_mayer | /* SPRG */
|
1718 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG0, "USPRG0",
|
1719 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1720 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1721 | 76a66253 | j_mayer | 0x00000000);
|
1722 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
1723 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1724 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1725 | 76a66253 | j_mayer | 0x00000000);
|
1726 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
1727 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1728 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1729 | 76a66253 | j_mayer | 0x00000000);
|
1730 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
1731 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1732 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1733 | 76a66253 | j_mayer | 0x00000000);
|
1734 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
1735 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1736 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1737 | 76a66253 | j_mayer | 0x00000000);
|
1738 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
1739 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1740 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1741 | 76a66253 | j_mayer | 0x00000000);
|
1742 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
1743 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1744 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1745 | 76a66253 | j_mayer | 0x00000000);
|
1746 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
1747 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1748 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1749 | 76a66253 | j_mayer | 0x00000000);
|
1750 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
1751 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1752 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1753 | 76a66253 | j_mayer | 0x00000000);
|
1754 | 76a66253 | j_mayer | /* Debug */
|
1755 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1756 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1757 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1758 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1759 | 76a66253 | j_mayer | 0x00000000);
|
1760 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1761 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1762 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1763 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1764 | 76a66253 | j_mayer | 0x00000000);
|
1765 | 76a66253 | j_mayer | } |
1766 | 76a66253 | j_mayer | |
1767 | 76a66253 | j_mayer | /* SPR shared between PowerPC 401 & 403 implementations */
|
1768 | 76a66253 | j_mayer | static void gen_spr_401_403 (CPUPPCState *env) |
1769 | 76a66253 | j_mayer | { |
1770 | 76a66253 | j_mayer | /* Time base */
|
1771 | 76a66253 | j_mayer | spr_register(env, SPR_403_VTBL, "TBL",
|
1772 | 76a66253 | j_mayer | &spr_read_tbl, SPR_NOACCESS, |
1773 | 76a66253 | j_mayer | &spr_read_tbl, SPR_NOACCESS, |
1774 | 76a66253 | j_mayer | 0x00000000);
|
1775 | 76a66253 | j_mayer | spr_register(env, SPR_403_TBL, "TBL",
|
1776 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1777 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_tbl, |
1778 | 76a66253 | j_mayer | 0x00000000);
|
1779 | 76a66253 | j_mayer | spr_register(env, SPR_403_VTBU, "TBU",
|
1780 | 76a66253 | j_mayer | &spr_read_tbu, SPR_NOACCESS, |
1781 | 76a66253 | j_mayer | &spr_read_tbu, SPR_NOACCESS, |
1782 | 76a66253 | j_mayer | 0x00000000);
|
1783 | 76a66253 | j_mayer | spr_register(env, SPR_403_TBU, "TBU",
|
1784 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1785 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_tbu, |
1786 | 76a66253 | j_mayer | 0x00000000);
|
1787 | 76a66253 | j_mayer | /* Debug */
|
1788 | 76a66253 | j_mayer | /* XXX: not implemented */
|
1789 | 76a66253 | j_mayer | spr_register(env, SPR_403_CDBCR, "CDBCR",
|
1790 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1791 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1792 | 76a66253 | j_mayer | 0x00000000);
|
1793 | 76a66253 | j_mayer | } |
1794 | 76a66253 | j_mayer | |
1795 | 76a66253 | j_mayer | /* SPR specific to PowerPC 403 implementation */
|
1796 | 76a66253 | j_mayer | static void gen_spr_403 (CPUPPCState *env) |
1797 | 76a66253 | j_mayer | { |
1798 | 76a66253 | j_mayer | /* MMU */
|
1799 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBL1, "PBL1",
|
1800 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1801 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1802 | 76a66253 | j_mayer | 0x00000000);
|
1803 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBU1, "PBU1",
|
1804 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1805 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1806 | 76a66253 | j_mayer | 0x00000000);
|
1807 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBL2, "PBL2",
|
1808 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1809 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1810 | 76a66253 | j_mayer | 0x00000000);
|
1811 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBU2, "PBU2",
|
1812 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1813 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
1814 | 76a66253 | j_mayer | 0x00000000);
|
1815 | 76a66253 | j_mayer | /* Debug */
|
1816 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1817 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1818 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1819 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1820 | 76a66253 | j_mayer | 0x00000000);
|
1821 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1822 | 76a66253 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1823 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1824 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1825 | 76a66253 | j_mayer | 0x00000000);
|
1826 | 76a66253 | j_mayer | } |
1827 | 76a66253 | j_mayer | |
1828 | 76a66253 | j_mayer | /* SPR specific to PowerPC compression coprocessor extension */
|
1829 | 76a66253 | j_mayer | #if defined (TODO)
|
1830 | 76a66253 | j_mayer | static void gen_spr_compress (CPUPPCState *env) |
1831 | 76a66253 | j_mayer | { |
1832 | 76a66253 | j_mayer | spr_register(env, SPR_401_SKR, "SKR",
|
1833 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1834 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1835 | 76a66253 | j_mayer | 0x00000000);
|
1836 | 76a66253 | j_mayer | } |
1837 | 76a66253 | j_mayer | #endif
|
1838 | 76a66253 | j_mayer | |
1839 | 76a66253 | j_mayer | // XXX: TODO (64 bits PowerPC SPRs)
|
1840 | 76a66253 | j_mayer | /*
|
1841 | 76a66253 | j_mayer | * ASR => SPR 280 (64 bits)
|
1842 | 76a66253 | j_mayer | * FPECR => SPR 1022 (?)
|
1843 | 76a66253 | j_mayer | * VRSAVE => SPR 256 (Altivec)
|
1844 | 76a66253 | j_mayer | * SCOMC => SPR 276 (64 bits ?)
|
1845 | 76a66253 | j_mayer | * SCOMD => SPR 277 (64 bits ?)
|
1846 | 76a66253 | j_mayer | * HSPRG0 => SPR 304 (hypervisor)
|
1847 | 76a66253 | j_mayer | * HSPRG1 => SPR 305 (hypervisor)
|
1848 | 76a66253 | j_mayer | * HDEC => SPR 310 (hypervisor)
|
1849 | 76a66253 | j_mayer | * HIOR => SPR 311 (hypervisor)
|
1850 | 76a66253 | j_mayer | * RMOR => SPR 312 (970)
|
1851 | 76a66253 | j_mayer | * HRMOR => SPR 313 (hypervisor)
|
1852 | 76a66253 | j_mayer | * HSRR0 => SPR 314 (hypervisor)
|
1853 | 76a66253 | j_mayer | * HSRR1 => SPR 315 (hypervisor)
|
1854 | 76a66253 | j_mayer | * LPCR => SPR 316 (970)
|
1855 | 76a66253 | j_mayer | * LPIDR => SPR 317 (970)
|
1856 | 76a66253 | j_mayer | * ... and more (thermal management, performance counters, ...)
|
1857 | 76a66253 | j_mayer | */
|
1858 | 76a66253 | j_mayer | |
1859 | 76a66253 | j_mayer | static void init_ppc_proc (CPUPPCState *env, ppc_def_t *def) |
1860 | 76a66253 | j_mayer | { |
1861 | 76a66253 | j_mayer | env->reserve = -1;
|
1862 | 76a66253 | j_mayer | /* Default MMU definitions */
|
1863 | 76a66253 | j_mayer | env->nb_BATs = -1;
|
1864 | 76a66253 | j_mayer | env->nb_tlb = 0;
|
1865 | 76a66253 | j_mayer | env->nb_ways = 0;
|
1866 | 76a66253 | j_mayer | /* XXX: missing:
|
1867 | 76a66253 | j_mayer | * 32 bits PowerPC:
|
1868 | 76a66253 | j_mayer | * - MPC5xx(x)
|
1869 | 76a66253 | j_mayer | * - MPC8xx(x)
|
1870 | 76a66253 | j_mayer | * - RCPU (same as MPC5xx ?)
|
1871 | 76a66253 | j_mayer | */
|
1872 | 76a66253 | j_mayer | spr_register(env, SPR_PVR, "PVR",
|
1873 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1874 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1875 | 76a66253 | j_mayer | def->pvr); |
1876 | 76a66253 | j_mayer | printf("%s: PVR %08x mask %08x => %08x\n", __func__,
|
1877 | 76a66253 | j_mayer | def->pvr, def->pvr_mask, def->pvr & def->pvr_mask); |
1878 | 3a607854 | j_mayer | switch (def->pvr) {
|
1879 | 426613db | j_mayer | /* Embedded PowerPC from IBM */
|
1880 | 76a66253 | j_mayer | case CPU_PPC_401A1: /* 401 A1 family */ |
1881 | 76a66253 | j_mayer | case CPU_PPC_401B2: /* 401 B2 family */ |
1882 | 76a66253 | j_mayer | case CPU_PPC_401C2: /* 401 C2 family */ |
1883 | 76a66253 | j_mayer | case CPU_PPC_401D2: /* 401 D2 family */ |
1884 | 76a66253 | j_mayer | case CPU_PPC_401E2: /* 401 E2 family */ |
1885 | 76a66253 | j_mayer | case CPU_PPC_401F2: /* 401 F2 family */ |
1886 | 76a66253 | j_mayer | case CPU_PPC_401G2: /* 401 G2 family */ |
1887 | 76a66253 | j_mayer | case CPU_PPC_IOP480: /* IOP 480 family */ |
1888 | 76a66253 | j_mayer | case CPU_PPC_COBRA: /* IBM Processor for Network Resources */ |
1889 | 76a66253 | j_mayer | gen_spr_generic(env); |
1890 | 76a66253 | j_mayer | gen_spr_40x(env); |
1891 | 76a66253 | j_mayer | gen_spr_401_403(env); |
1892 | 76a66253 | j_mayer | #if defined (TODO)
|
1893 | 76a66253 | j_mayer | /* XXX: optional ? */
|
1894 | 76a66253 | j_mayer | gen_spr_compress(env); |
1895 | 76a66253 | j_mayer | #endif
|
1896 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1897 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1898 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1899 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1900 | e9df014c | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
1901 | 76a66253 | j_mayer | break;
|
1902 | 76a66253 | j_mayer | |
1903 | 76a66253 | j_mayer | case CPU_PPC_403GA: /* 403 GA family */ |
1904 | 76a66253 | j_mayer | case CPU_PPC_403GB: /* 403 GB family */ |
1905 | 76a66253 | j_mayer | case CPU_PPC_403GC: /* 403 GC family */ |
1906 | 76a66253 | j_mayer | case CPU_PPC_403GCX: /* 403 GCX family */ |
1907 | 76a66253 | j_mayer | gen_spr_generic(env); |
1908 | 76a66253 | j_mayer | gen_spr_40x(env); |
1909 | 76a66253 | j_mayer | gen_spr_401_403(env); |
1910 | 76a66253 | j_mayer | gen_spr_403(env); |
1911 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1912 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1913 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1914 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1915 | e9df014c | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
1916 | 76a66253 | j_mayer | break;
|
1917 | 76a66253 | j_mayer | |
1918 | 76a66253 | j_mayer | case CPU_PPC_405CR: /* 405 GP/CR family */ |
1919 | 76a66253 | j_mayer | case CPU_PPC_405EP: /* 405 EP family */ |
1920 | 76a66253 | j_mayer | case CPU_PPC_405GPR: /* 405 GPR family */ |
1921 | 76a66253 | j_mayer | case CPU_PPC_405D2: /* 405 D2 family */ |
1922 | 76a66253 | j_mayer | case CPU_PPC_405D4: /* 405 D4 family */ |
1923 | 76a66253 | j_mayer | gen_spr_generic(env); |
1924 | 76a66253 | j_mayer | /* Time base */
|
1925 | 76a66253 | j_mayer | gen_tbl(env); |
1926 | 76a66253 | j_mayer | gen_spr_40x(env); |
1927 | 76a66253 | j_mayer | gen_spr_405(env); |
1928 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1929 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1930 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1931 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1932 | 24be5ae3 | j_mayer | /* Allocate hardware IRQ controller */
|
1933 | 24be5ae3 | j_mayer | ppc405_irq_init(env); |
1934 | 76a66253 | j_mayer | break;
|
1935 | 76a66253 | j_mayer | |
1936 | 76a66253 | j_mayer | case CPU_PPC_NPE405H: /* NPe405 H family */ |
1937 | 76a66253 | j_mayer | case CPU_PPC_NPE405H2:
|
1938 | 76a66253 | j_mayer | case CPU_PPC_NPE405L: /* Npe405 L family */ |
1939 | 76a66253 | j_mayer | gen_spr_generic(env); |
1940 | 76a66253 | j_mayer | /* Time base */
|
1941 | 76a66253 | j_mayer | gen_tbl(env); |
1942 | 76a66253 | j_mayer | gen_spr_40x(env); |
1943 | 76a66253 | j_mayer | gen_spr_405(env); |
1944 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1945 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1946 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1947 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1948 | 24be5ae3 | j_mayer | /* Allocate hardware IRQ controller */
|
1949 | 24be5ae3 | j_mayer | ppc405_irq_init(env); |
1950 | 76a66253 | j_mayer | break;
|
1951 | 76a66253 | j_mayer | |
1952 | 76a66253 | j_mayer | #if defined (TODO)
|
1953 | 76a66253 | j_mayer | case CPU_PPC_STB01000:
|
1954 | 76a66253 | j_mayer | #endif
|
1955 | 76a66253 | j_mayer | #if defined (TODO)
|
1956 | 76a66253 | j_mayer | case CPU_PPC_STB01010:
|
1957 | 76a66253 | j_mayer | #endif
|
1958 | 76a66253 | j_mayer | #if defined (TODO)
|
1959 | 76a66253 | j_mayer | case CPU_PPC_STB0210:
|
1960 | 76a66253 | j_mayer | #endif
|
1961 | 76a66253 | j_mayer | case CPU_PPC_STB03: /* STB03 family */ |
1962 | 76a66253 | j_mayer | #if defined (TODO)
|
1963 | 76a66253 | j_mayer | case CPU_PPC_STB043: /* STB043 family */ |
1964 | 76a66253 | j_mayer | #endif
|
1965 | 76a66253 | j_mayer | #if defined (TODO)
|
1966 | 76a66253 | j_mayer | case CPU_PPC_STB045: /* STB045 family */ |
1967 | 76a66253 | j_mayer | #endif
|
1968 | 76a66253 | j_mayer | case CPU_PPC_STB25: /* STB25 family */ |
1969 | 76a66253 | j_mayer | #if defined (TODO)
|
1970 | 76a66253 | j_mayer | case CPU_PPC_STB130: /* STB130 family */ |
1971 | 76a66253 | j_mayer | #endif
|
1972 | 76a66253 | j_mayer | gen_spr_generic(env); |
1973 | 76a66253 | j_mayer | /* Time base */
|
1974 | 76a66253 | j_mayer | gen_tbl(env); |
1975 | 76a66253 | j_mayer | gen_spr_40x(env); |
1976 | 76a66253 | j_mayer | gen_spr_405(env); |
1977 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1978 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
1979 | 76a66253 | j_mayer | env->nb_ways = 1;
|
1980 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
1981 | 24be5ae3 | j_mayer | /* Allocate hardware IRQ controller */
|
1982 | 24be5ae3 | j_mayer | ppc405_irq_init(env); |
1983 | 76a66253 | j_mayer | break;
|
1984 | 76a66253 | j_mayer | |
1985 | 76a66253 | j_mayer | case CPU_PPC_440EP: /* 440 EP family */ |
1986 | 76a66253 | j_mayer | case CPU_PPC_440GP: /* 440 GP family */ |
1987 | 76a66253 | j_mayer | case CPU_PPC_440GX: /* 440 GX family */ |
1988 | 76a66253 | j_mayer | case CPU_PPC_440GXc: /* 440 GXc family */ |
1989 | 76a66253 | j_mayer | case CPU_PPC_440GXf: /* 440 GXf family */ |
1990 | 76a66253 | j_mayer | case CPU_PPC_440SP: /* 440 SP family */ |
1991 | 76a66253 | j_mayer | case CPU_PPC_440SP2:
|
1992 | 76a66253 | j_mayer | case CPU_PPC_440SPE: /* 440 SPE family */ |
1993 | 76a66253 | j_mayer | gen_spr_generic(env); |
1994 | 76a66253 | j_mayer | /* Time base */
|
1995 | 76a66253 | j_mayer | gen_tbl(env); |
1996 | 76a66253 | j_mayer | gen_spr_BookE(env); |
1997 | 76a66253 | j_mayer | gen_spr_440(env); |
1998 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
1999 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
2000 | 76a66253 | j_mayer | env->nb_ways = 1;
|
2001 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
2002 | e9df014c | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
2003 | 76a66253 | j_mayer | break;
|
2004 | 76a66253 | j_mayer | |
2005 | 426613db | j_mayer | /* Embedded PowerPC from Freescale */
|
2006 | 76a66253 | j_mayer | #if defined (TODO)
|
2007 | 76a66253 | j_mayer | case CPU_PPC_5xx:
|
2008 | 76a66253 | j_mayer | break;
|
2009 | 76a66253 | j_mayer | #endif
|
2010 | 76a66253 | j_mayer | #if defined (TODO)
|
2011 | 76a66253 | j_mayer | case CPU_PPC_8xx: /* MPC821 / 823 / 850 / 860 */ |
2012 | 76a66253 | j_mayer | break;
|
2013 | 76a66253 | j_mayer | #endif
|
2014 | 76a66253 | j_mayer | #if defined (TODO)
|
2015 | 76a66253 | j_mayer | case CPU_PPC_82xx_HIP3: /* MPC8240 / 8260 */ |
2016 | 76a66253 | j_mayer | case CPU_PPC_82xx_HIP4: /* MPC8240 / 8260 */ |
2017 | 76a66253 | j_mayer | break;
|
2018 | 76a66253 | j_mayer | #endif
|
2019 | 76a66253 | j_mayer | #if defined (TODO)
|
2020 | 76a66253 | j_mayer | case CPU_PPC_827x: /* MPC 827x / 828x */ |
2021 | 76a66253 | j_mayer | break;
|
2022 | 76a66253 | j_mayer | #endif
|
2023 | 76a66253 | j_mayer | |
2024 | 426613db | j_mayer | /* XXX: Use MPC8540 PVR to implement a test PowerPC BookE target */
|
2025 | 76a66253 | j_mayer | case CPU_PPC_e500v110:
|
2026 | 76a66253 | j_mayer | case CPU_PPC_e500v120:
|
2027 | 76a66253 | j_mayer | case CPU_PPC_e500v210:
|
2028 | 76a66253 | j_mayer | case CPU_PPC_e500v220:
|
2029 | 76a66253 | j_mayer | gen_spr_generic(env); |
2030 | 76a66253 | j_mayer | /* Time base */
|
2031 | 76a66253 | j_mayer | gen_tbl(env); |
2032 | 76a66253 | j_mayer | gen_spr_BookE(env); |
2033 | 363be49c | j_mayer | gen_spr_BookE_FSL(env); |
2034 | 76a66253 | j_mayer | env->nb_BATs = 0;
|
2035 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
2036 | 76a66253 | j_mayer | env->nb_ways = 1;
|
2037 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
2038 | e9df014c | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
2039 | 76a66253 | j_mayer | break;
|
2040 | 76a66253 | j_mayer | |
2041 | 76a66253 | j_mayer | #if defined (TODO)
|
2042 | 76a66253 | j_mayer | case CPU_PPC_e600:
|
2043 | 76a66253 | j_mayer | break;
|
2044 | 76a66253 | j_mayer | #endif
|
2045 | 76a66253 | j_mayer | |
2046 | 426613db | j_mayer | /* 32 bits PowerPC */
|
2047 | 76a66253 | j_mayer | case CPU_PPC_601: /* PowerPC 601 */ |
2048 | 76a66253 | j_mayer | gen_spr_generic(env); |
2049 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2050 | 76a66253 | j_mayer | gen_spr_601(env); |
2051 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2052 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2053 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2054 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2055 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2056 | 76a66253 | j_mayer | 0x00000000);
|
2057 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2058 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2059 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2060 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2061 | 76a66253 | j_mayer | 0x00000000);
|
2062 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2063 | 76a66253 | j_mayer | spr_register(env, SPR_601_HID2, "HID2",
|
2064 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2065 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2066 | 76a66253 | j_mayer | 0x00000000);
|
2067 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2068 | 76a66253 | j_mayer | spr_register(env, SPR_601_HID5, "HID5",
|
2069 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2070 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2071 | 76a66253 | j_mayer | 0x00000000);
|
2072 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2073 | 76a66253 | j_mayer | #if 0 /* ? */
|
2074 | 76a66253 | j_mayer | spr_register(env, SPR_601_HID15, "HID15",
|
2075 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2076 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic,
|
2077 | 76a66253 | j_mayer | 0x00000000);
|
2078 | 76a66253 | j_mayer | #endif
|
2079 | 76a66253 | j_mayer | env->nb_tlb = 64;
|
2080 | 76a66253 | j_mayer | env->nb_ways = 2;
|
2081 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
2082 | 76a66253 | j_mayer | env->id_tlbs = 0;
|
2083 | e9df014c | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
2084 | 76a66253 | j_mayer | break;
|
2085 | 76a66253 | j_mayer | |
2086 | 76a66253 | j_mayer | case CPU_PPC_602: /* PowerPC 602 */ |
2087 | 76a66253 | j_mayer | gen_spr_generic(env); |
2088 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2089 | 76a66253 | j_mayer | /* Memory management */
|
2090 | 76a66253 | j_mayer | gen_low_BATs(env); |
2091 | 76a66253 | j_mayer | /* Time base */
|
2092 | 76a66253 | j_mayer | gen_tbl(env); |
2093 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
2094 | 76a66253 | j_mayer | gen_spr_602(env); |
2095 | 76a66253 | j_mayer | /* hardware implementation registers */
|
2096 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2097 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2098 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2099 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2100 | 76a66253 | j_mayer | 0x00000000);
|
2101 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2102 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2103 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2104 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2105 | 76a66253 | j_mayer | 0x00000000);
|
2106 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2107 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2108 | 76a66253 | j_mayer | break;
|
2109 | 76a66253 | j_mayer | |
2110 | 76a66253 | j_mayer | case CPU_PPC_603: /* PowerPC 603 */ |
2111 | 76a66253 | j_mayer | case CPU_PPC_603E: /* PowerPC 603e */ |
2112 | 76a66253 | j_mayer | case CPU_PPC_603E7v:
|
2113 | 76a66253 | j_mayer | case CPU_PPC_603E7v2:
|
2114 | 76a66253 | j_mayer | case CPU_PPC_603P: /* PowerPC 603p */ |
2115 | 76a66253 | j_mayer | case CPU_PPC_603R: /* PowerPC 603r */ |
2116 | 76a66253 | j_mayer | gen_spr_generic(env); |
2117 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2118 | 76a66253 | j_mayer | /* Memory management */
|
2119 | 76a66253 | j_mayer | gen_low_BATs(env); |
2120 | 76a66253 | j_mayer | /* Time base */
|
2121 | 76a66253 | j_mayer | gen_tbl(env); |
2122 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
2123 | 76a66253 | j_mayer | gen_spr_603(env); |
2124 | 76a66253 | j_mayer | /* hardware implementation registers */
|
2125 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2126 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2127 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2128 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2129 | 76a66253 | j_mayer | 0x00000000);
|
2130 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2131 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2132 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2133 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2134 | 76a66253 | j_mayer | 0x00000000);
|
2135 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2136 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2137 | 76a66253 | j_mayer | break;
|
2138 | 76a66253 | j_mayer | |
2139 | 76a66253 | j_mayer | case CPU_PPC_G2: /* PowerPC G2 family */ |
2140 | 76a66253 | j_mayer | case CPU_PPC_G2H4:
|
2141 | 76a66253 | j_mayer | case CPU_PPC_G2gp:
|
2142 | 76a66253 | j_mayer | case CPU_PPC_G2ls:
|
2143 | 76a66253 | j_mayer | case CPU_PPC_G2LE: /* PowerPC G2LE family */ |
2144 | 76a66253 | j_mayer | case CPU_PPC_G2LEgp:
|
2145 | 76a66253 | j_mayer | case CPU_PPC_G2LEls:
|
2146 | 76a66253 | j_mayer | gen_spr_generic(env); |
2147 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2148 | 76a66253 | j_mayer | /* Memory management */
|
2149 | 76a66253 | j_mayer | gen_low_BATs(env); |
2150 | 76a66253 | j_mayer | /* Time base */
|
2151 | 76a66253 | j_mayer | gen_tbl(env); |
2152 | 76a66253 | j_mayer | /* Memory management */
|
2153 | 76a66253 | j_mayer | gen_high_BATs(env); |
2154 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
2155 | 76a66253 | j_mayer | gen_spr_G2_755(env); |
2156 | 76a66253 | j_mayer | gen_spr_G2(env); |
2157 | 76a66253 | j_mayer | /* Hardware implementation register */
|
2158 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2159 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2160 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2161 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2162 | 76a66253 | j_mayer | 0x00000000);
|
2163 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2164 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2165 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2166 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2167 | 76a66253 | j_mayer | 0x00000000);
|
2168 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2169 | 76a66253 | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
2170 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2171 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2172 | 76a66253 | j_mayer | 0x00000000);
|
2173 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2174 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2175 | 76a66253 | j_mayer | break;
|
2176 | 76a66253 | j_mayer | |
2177 | 76a66253 | j_mayer | case CPU_PPC_604: /* PowerPC 604 */ |
2178 | 76a66253 | j_mayer | case CPU_PPC_604E: /* PowerPC 604e */ |
2179 | 76a66253 | j_mayer | case CPU_PPC_604R: /* PowerPC 604r */ |
2180 | 76a66253 | j_mayer | gen_spr_generic(env); |
2181 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2182 | 76a66253 | j_mayer | /* Memory management */
|
2183 | 76a66253 | j_mayer | gen_low_BATs(env); |
2184 | 76a66253 | j_mayer | /* Time base */
|
2185 | 76a66253 | j_mayer | gen_tbl(env); |
2186 | 76a66253 | j_mayer | gen_spr_604(env); |
2187 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2188 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2189 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2190 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2191 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2192 | 76a66253 | j_mayer | 0x00000000);
|
2193 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2194 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2195 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2196 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2197 | 76a66253 | j_mayer | 0x00000000);
|
2198 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2199 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2200 | 76a66253 | j_mayer | break;
|
2201 | 76a66253 | j_mayer | |
2202 | 76a66253 | j_mayer | case CPU_PPC_74x: /* PowerPC 740 / 750 */ |
2203 | 76a66253 | j_mayer | case CPU_PPC_740E:
|
2204 | 76a66253 | j_mayer | case CPU_PPC_750E:
|
2205 | 76a66253 | j_mayer | case CPU_PPC_74xP: /* PowerPC 740P / 750P */ |
2206 | 76a66253 | j_mayer | case CPU_PPC_750CXE21: /* IBM PowerPC 750cxe */ |
2207 | 76a66253 | j_mayer | case CPU_PPC_750CXE22:
|
2208 | 76a66253 | j_mayer | case CPU_PPC_750CXE23:
|
2209 | 76a66253 | j_mayer | case CPU_PPC_750CXE24:
|
2210 | 76a66253 | j_mayer | case CPU_PPC_750CXE24b:
|
2211 | 76a66253 | j_mayer | case CPU_PPC_750CXE31:
|
2212 | 76a66253 | j_mayer | case CPU_PPC_750CXE31b:
|
2213 | 76a66253 | j_mayer | case CPU_PPC_750CXR:
|
2214 | 76a66253 | j_mayer | gen_spr_generic(env); |
2215 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2216 | 76a66253 | j_mayer | /* Memory management */
|
2217 | 76a66253 | j_mayer | gen_low_BATs(env); |
2218 | 76a66253 | j_mayer | /* Time base */
|
2219 | 76a66253 | j_mayer | gen_tbl(env); |
2220 | 76a66253 | j_mayer | gen_spr_7xx(env); |
2221 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2222 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2223 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2224 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2225 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2226 | 76a66253 | j_mayer | 0x00000000);
|
2227 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2228 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2229 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2230 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2231 | 76a66253 | j_mayer | 0x00000000);
|
2232 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2233 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2234 | 76a66253 | j_mayer | break;
|
2235 | 76a66253 | j_mayer | |
2236 | 76a66253 | j_mayer | case CPU_PPC_750FX10: /* IBM PowerPC 750 FX */ |
2237 | 76a66253 | j_mayer | case CPU_PPC_750FX20:
|
2238 | 76a66253 | j_mayer | case CPU_PPC_750FX21:
|
2239 | 76a66253 | j_mayer | case CPU_PPC_750FX22:
|
2240 | 76a66253 | j_mayer | case CPU_PPC_750FX23:
|
2241 | 76a66253 | j_mayer | case CPU_PPC_750GX10: /* IBM PowerPC 750 GX */ |
2242 | 76a66253 | j_mayer | case CPU_PPC_750GX11:
|
2243 | 76a66253 | j_mayer | case CPU_PPC_750GX12:
|
2244 | 76a66253 | j_mayer | gen_spr_generic(env); |
2245 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2246 | 76a66253 | j_mayer | /* Memory management */
|
2247 | 76a66253 | j_mayer | gen_low_BATs(env); |
2248 | 76a66253 | j_mayer | /* PowerPC 750fx & 750gx has 8 DBATs and 8 IBATs */
|
2249 | 76a66253 | j_mayer | gen_high_BATs(env); |
2250 | 76a66253 | j_mayer | /* Time base */
|
2251 | 76a66253 | j_mayer | gen_tbl(env); |
2252 | 76a66253 | j_mayer | gen_spr_7xx(env); |
2253 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2254 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2255 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2256 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2257 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2258 | 76a66253 | j_mayer | 0x00000000);
|
2259 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2260 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2261 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2262 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2263 | 76a66253 | j_mayer | 0x00000000);
|
2264 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2265 | 76a66253 | j_mayer | spr_register(env, SPR_750_HID2, "HID2",
|
2266 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2267 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2268 | 76a66253 | j_mayer | 0x00000000);
|
2269 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2270 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2271 | 76a66253 | j_mayer | break;
|
2272 | 76a66253 | j_mayer | |
2273 | 76a66253 | j_mayer | case CPU_PPC_755_10: /* PowerPC 755 */ |
2274 | 76a66253 | j_mayer | case CPU_PPC_755_11:
|
2275 | 76a66253 | j_mayer | case CPU_PPC_755_20:
|
2276 | 76a66253 | j_mayer | case CPU_PPC_755D:
|
2277 | 76a66253 | j_mayer | case CPU_PPC_755E:
|
2278 | 76a66253 | j_mayer | gen_spr_generic(env); |
2279 | 76a66253 | j_mayer | gen_spr_ne_601(env); |
2280 | 76a66253 | j_mayer | /* Memory management */
|
2281 | 76a66253 | j_mayer | gen_low_BATs(env); |
2282 | 76a66253 | j_mayer | /* Time base */
|
2283 | 76a66253 | j_mayer | gen_tbl(env); |
2284 | 76a66253 | j_mayer | /* Memory management */
|
2285 | 76a66253 | j_mayer | gen_high_BATs(env); |
2286 | 76a66253 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
2287 | 76a66253 | j_mayer | gen_spr_G2_755(env); |
2288 | 76a66253 | j_mayer | /* L2 cache control */
|
2289 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2290 | 76a66253 | j_mayer | spr_register(env, SPR_ICTC, "ICTC",
|
2291 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2292 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2293 | 76a66253 | j_mayer | 0x00000000);
|
2294 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2295 | 76a66253 | j_mayer | spr_register(env, SPR_L2PM, "L2PM",
|
2296 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2297 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2298 | 76a66253 | j_mayer | 0x00000000);
|
2299 | 76a66253 | j_mayer | /* Hardware implementation registers */
|
2300 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2301 | 76a66253 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2302 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2303 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2304 | 76a66253 | j_mayer | 0x00000000);
|
2305 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2306 | 76a66253 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2307 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2308 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2309 | 76a66253 | j_mayer | 0x00000000);
|
2310 | 76a66253 | j_mayer | /* XXX : not implemented */
|
2311 | 76a66253 | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
2312 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2313 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2314 | 76a66253 | j_mayer | 0x00000000);
|
2315 | e9df014c | j_mayer | /* Allocate hardware IRQ controller */
|
2316 | e9df014c | j_mayer | ppc6xx_irq_init(env); |
2317 | 76a66253 | j_mayer | break;
|
2318 | 76a66253 | j_mayer | |
2319 | 76a66253 | j_mayer | #if defined (TODO)
|
2320 | 426613db | j_mayer | /* G4 family */
|
2321 | 76a66253 | j_mayer | case CPU_PPC_7400: /* PowerPC 7400 */ |
2322 | 76a66253 | j_mayer | case CPU_PPC_7410C: /* PowerPC 7410 */ |
2323 | 76a66253 | j_mayer | case CPU_PPC_7410D:
|
2324 | 76a66253 | j_mayer | case CPU_PPC_7410E:
|
2325 | 76a66253 | j_mayer | case CPU_PPC_7441: /* PowerPC 7441 */ |
2326 | 76a66253 | j_mayer | case CPU_PPC_7445: /* PowerPC 7445 */ |
2327 | 76a66253 | j_mayer | case CPU_PPC_7447: /* PowerPC 7447 */ |
2328 | 76a66253 | j_mayer | case CPU_PPC_7447A: /* PowerPC 7447A */ |
2329 | 76a66253 | j_mayer | case CPU_PPC_7448: /* PowerPC 7448 */ |
2330 | 76a66253 | j_mayer | case CPU_PPC_7450: /* PowerPC 7450 */ |
2331 | 76a66253 | j_mayer | case CPU_PPC_7450b:
|
2332 | 76a66253 | j_mayer | case CPU_PPC_7451: /* PowerPC 7451 */ |
2333 | 76a66253 | j_mayer | case CPU_PPC_7451G:
|
2334 | 76a66253 | j_mayer | case CPU_PPC_7455: /* PowerPC 7455 */ |
2335 | 76a66253 | j_mayer | case CPU_PPC_7455F:
|
2336 | 76a66253 | j_mayer | case CPU_PPC_7455G:
|
2337 | 76a66253 | j_mayer | case CPU_PPC_7457: /* PowerPC 7457 */ |
2338 | 76a66253 | j_mayer | case CPU_PPC_7457C:
|
2339 | 76a66253 | j_mayer | case CPU_PPC_7457A: /* PowerPC 7457A */ |
2340 | 76a66253 | j_mayer | break;
|
2341 | 76a66253 | j_mayer | #endif
|
2342 | 76a66253 | j_mayer | |
2343 | 426613db | j_mayer | /* 64 bits PowerPC */
|
2344 | 426613db | j_mayer | #if defined (TARGET_PPC64)
|
2345 | 76a66253 | j_mayer | #if defined (TODO)
|
2346 | 76a66253 | j_mayer | case CPU_PPC_620: /* PowerPC 620 */ |
2347 | 76a66253 | j_mayer | case CPU_PPC_630: /* PowerPC 630 (Power 3) */ |
2348 | 76a66253 | j_mayer | case CPU_PPC_631: /* PowerPC 631 (Power 3+) */ |
2349 | 76a66253 | j_mayer | case CPU_PPC_POWER4: /* Power 4 */ |
2350 | 76a66253 | j_mayer | case CPU_PPC_POWER4P: /* Power 4+ */ |
2351 | 76a66253 | j_mayer | case CPU_PPC_POWER5: /* Power 5 */ |
2352 | 76a66253 | j_mayer | case CPU_PPC_POWER5P: /* Power 5+ */ |
2353 | 426613db | j_mayer | #endif
|
2354 | d0dfae6e | j_mayer | break;
|
2355 | d0dfae6e | j_mayer | |
2356 | 76a66253 | j_mayer | case CPU_PPC_970: /* PowerPC 970 */ |
2357 | 76a66253 | j_mayer | case CPU_PPC_970FX10: /* PowerPC 970 FX */ |
2358 | 76a66253 | j_mayer | case CPU_PPC_970FX20:
|
2359 | 76a66253 | j_mayer | case CPU_PPC_970FX21:
|
2360 | 76a66253 | j_mayer | case CPU_PPC_970FX30:
|
2361 | 76a66253 | j_mayer | case CPU_PPC_970FX31:
|
2362 | 76a66253 | j_mayer | case CPU_PPC_970MP10: /* PowerPC 970 MP */ |
2363 | 76a66253 | j_mayer | case CPU_PPC_970MP11:
|
2364 | d0dfae6e | j_mayer | gen_spr_generic(env); |
2365 | d0dfae6e | j_mayer | gen_spr_ne_601(env); |
2366 | d0dfae6e | j_mayer | /* XXX: not correct */
|
2367 | d0dfae6e | j_mayer | gen_low_BATs(env); |
2368 | d0dfae6e | j_mayer | /* Time base */
|
2369 | d0dfae6e | j_mayer | gen_tbl(env); |
2370 | d0dfae6e | j_mayer | gen_spr_7xx(env); |
2371 | d0dfae6e | j_mayer | /* Hardware implementation registers */
|
2372 | d0dfae6e | j_mayer | /* XXX : not implemented */
|
2373 | d0dfae6e | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
2374 | d0dfae6e | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2375 | d0dfae6e | j_mayer | &spr_read_generic, &spr_write_generic, |
2376 | d0dfae6e | j_mayer | 0x00000000);
|
2377 | d0dfae6e | j_mayer | /* XXX : not implemented */
|
2378 | d0dfae6e | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
2379 | d0dfae6e | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2380 | d0dfae6e | j_mayer | &spr_read_generic, &spr_write_generic, |
2381 | d0dfae6e | j_mayer | 0x00000000);
|
2382 | d0dfae6e | j_mayer | /* XXX : not implemented */
|
2383 | d0dfae6e | j_mayer | spr_register(env, SPR_750_HID2, "HID2",
|
2384 | d0dfae6e | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2385 | d0dfae6e | j_mayer | &spr_read_generic, &spr_write_generic, |
2386 | d0dfae6e | j_mayer | 0x00000000);
|
2387 | d0dfae6e | j_mayer | /* Allocate hardware IRQ controller */
|
2388 | d0dfae6e | j_mayer | ppc970_irq_init(env); |
2389 | d0dfae6e | j_mayer | break;
|
2390 | d0dfae6e | j_mayer | |
2391 | 426613db | j_mayer | #if defined (TODO)
|
2392 | 76a66253 | j_mayer | case CPU_PPC_CELL10: /* Cell family */ |
2393 | 76a66253 | j_mayer | case CPU_PPC_CELL20:
|
2394 | 76a66253 | j_mayer | case CPU_PPC_CELL30:
|
2395 | 76a66253 | j_mayer | case CPU_PPC_CELL31:
|
2396 | 426613db | j_mayer | #endif
|
2397 | d0dfae6e | j_mayer | break;
|
2398 | d0dfae6e | j_mayer | |
2399 | 426613db | j_mayer | #if defined (TODO)
|
2400 | 76a66253 | j_mayer | case CPU_PPC_RS64: /* Apache (RS64/A35) */ |
2401 | 76a66253 | j_mayer | case CPU_PPC_RS64II: /* NorthStar (RS64-II/A50) */ |
2402 | 76a66253 | j_mayer | case CPU_PPC_RS64III: /* Pulsar (RS64-III) */ |
2403 | 76a66253 | j_mayer | case CPU_PPC_RS64IV: /* IceStar/IStar/SStar (RS64-IV) */ |
2404 | 76a66253 | j_mayer | #endif
|
2405 | 426613db | j_mayer | break;
|
2406 | 426613db | j_mayer | #endif /* defined (TARGET_PPC64) */ |
2407 | 76a66253 | j_mayer | |
2408 | 76a66253 | j_mayer | #if defined (TODO)
|
2409 | 76a66253 | j_mayer | /* POWER */
|
2410 | 76a66253 | j_mayer | case CPU_POWER: /* POWER */ |
2411 | 76a66253 | j_mayer | case CPU_POWER2: /* POWER2 */ |
2412 | 76a66253 | j_mayer | break;
|
2413 | 76a66253 | j_mayer | #endif
|
2414 | 76a66253 | j_mayer | |
2415 | 76a66253 | j_mayer | default:
|
2416 | 76a66253 | j_mayer | gen_spr_generic(env); |
2417 | e9df014c | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
2418 | 76a66253 | j_mayer | break;
|
2419 | 76a66253 | j_mayer | } |
2420 | 76a66253 | j_mayer | if (env->nb_BATs == -1) |
2421 | 76a66253 | j_mayer | env->nb_BATs = 4;
|
2422 | 76a66253 | j_mayer | /* Allocate TLBs buffer when needed */
|
2423 | 76a66253 | j_mayer | if (env->nb_tlb != 0) { |
2424 | 76a66253 | j_mayer | int nb_tlb = env->nb_tlb;
|
2425 | 76a66253 | j_mayer | if (env->id_tlbs != 0) |
2426 | 76a66253 | j_mayer | nb_tlb *= 2;
|
2427 | 76a66253 | j_mayer | env->tlb = qemu_mallocz(nb_tlb * sizeof(ppc_tlb_t));
|
2428 | 76a66253 | j_mayer | /* Pre-compute some useful values */
|
2429 | 76a66253 | j_mayer | env->tlb_per_way = env->nb_tlb / env->nb_ways; |
2430 | 76a66253 | j_mayer | } |
2431 | 76a66253 | j_mayer | } |
2432 | 76a66253 | j_mayer | |
2433 | 76a66253 | j_mayer | #if defined(PPC_DUMP_CPU)
|
2434 | 76a66253 | j_mayer | static void dump_sprs (CPUPPCState *env) |
2435 | 76a66253 | j_mayer | { |
2436 | 76a66253 | j_mayer | ppc_spr_t *spr; |
2437 | 76a66253 | j_mayer | uint32_t pvr = env->spr[SPR_PVR]; |
2438 | 76a66253 | j_mayer | uint32_t sr, sw, ur, uw; |
2439 | 76a66253 | j_mayer | int i, j, n;
|
2440 | 76a66253 | j_mayer | |
2441 | 76a66253 | j_mayer | printf("* SPRs for PVR=%08x\n", pvr);
|
2442 | 76a66253 | j_mayer | for (i = 0; i < 32; i++) { |
2443 | 76a66253 | j_mayer | for (j = 0; j < 32; j++) { |
2444 | 76a66253 | j_mayer | n = (i << 5) | j;
|
2445 | 76a66253 | j_mayer | spr = &env->spr_cb[n]; |
2446 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2447 | 3fc6c082 | bellard | sw = spr->oea_write != NULL && spr->oea_write != SPR_NOACCESS;
|
2448 | 3fc6c082 | bellard | sr = spr->oea_read != NULL && spr->oea_read != SPR_NOACCESS;
|
2449 | 76a66253 | j_mayer | #else
|
2450 | 76a66253 | j_mayer | sw = 0;
|
2451 | 76a66253 | j_mayer | sr = 0;
|
2452 | 76a66253 | j_mayer | #endif
|
2453 | 3fc6c082 | bellard | uw = spr->uea_write != NULL && spr->uea_write != SPR_NOACCESS;
|
2454 | 3fc6c082 | bellard | ur = spr->uea_read != NULL && spr->uea_read != SPR_NOACCESS;
|
2455 | 3fc6c082 | bellard | if (sw || sr || uw || ur) {
|
2456 | 3fc6c082 | bellard | printf("%4d (%03x) %8s s%c%c u%c%c\n",
|
2457 | 3fc6c082 | bellard | (i << 5) | j, (i << 5) | j, spr->name, |
2458 | 3fc6c082 | bellard | sw ? 'w' : '-', sr ? 'r' : '-', |
2459 | 3fc6c082 | bellard | uw ? 'w' : '-', ur ? 'r' : '-'); |
2460 | 3fc6c082 | bellard | } |
2461 | 3fc6c082 | bellard | } |
2462 | 3fc6c082 | bellard | } |
2463 | 3fc6c082 | bellard | fflush(stdout); |
2464 | 3fc6c082 | bellard | fflush(stderr); |
2465 | 3fc6c082 | bellard | } |
2466 | 3fc6c082 | bellard | #endif
|
2467 | 3fc6c082 | bellard | |
2468 | 3fc6c082 | bellard | /*****************************************************************************/
|
2469 | 3fc6c082 | bellard | #include <stdlib.h> |
2470 | 3fc6c082 | bellard | #include <string.h> |
2471 | 3fc6c082 | bellard | |
2472 | 3fc6c082 | bellard | int fflush (FILE *stream);
|
2473 | 3fc6c082 | bellard | |
2474 | 3fc6c082 | bellard | /* Opcode types */
|
2475 | 3fc6c082 | bellard | enum {
|
2476 | 3fc6c082 | bellard | PPC_DIRECT = 0, /* Opcode routine */ |
2477 | 3fc6c082 | bellard | PPC_INDIRECT = 1, /* Indirect opcode table */ |
2478 | 3fc6c082 | bellard | }; |
2479 | 3fc6c082 | bellard | |
2480 | 3fc6c082 | bellard | static inline int is_indirect_opcode (void *handler) |
2481 | 3fc6c082 | bellard | { |
2482 | 3fc6c082 | bellard | return ((unsigned long)handler & 0x03) == PPC_INDIRECT; |
2483 | 3fc6c082 | bellard | } |
2484 | 3fc6c082 | bellard | |
2485 | 3fc6c082 | bellard | static inline opc_handler_t **ind_table(void *handler) |
2486 | 3fc6c082 | bellard | { |
2487 | 3fc6c082 | bellard | return (opc_handler_t **)((unsigned long)handler & ~3); |
2488 | 3fc6c082 | bellard | } |
2489 | 3fc6c082 | bellard | |
2490 | 3fc6c082 | bellard | /* Instruction table creation */
|
2491 | 3fc6c082 | bellard | /* Opcodes tables creation */
|
2492 | 3fc6c082 | bellard | static void fill_new_table (opc_handler_t **table, int len) |
2493 | 3fc6c082 | bellard | { |
2494 | 3fc6c082 | bellard | int i;
|
2495 | 3fc6c082 | bellard | |
2496 | 3fc6c082 | bellard | for (i = 0; i < len; i++) |
2497 | 3fc6c082 | bellard | table[i] = &invalid_handler; |
2498 | 3fc6c082 | bellard | } |
2499 | 3fc6c082 | bellard | |
2500 | 3fc6c082 | bellard | static int create_new_table (opc_handler_t **table, unsigned char idx) |
2501 | 3fc6c082 | bellard | { |
2502 | 3fc6c082 | bellard | opc_handler_t **tmp; |
2503 | 3fc6c082 | bellard | |
2504 | 3fc6c082 | bellard | tmp = malloc(0x20 * sizeof(opc_handler_t)); |
2505 | 3fc6c082 | bellard | if (tmp == NULL) |
2506 | 3fc6c082 | bellard | return -1; |
2507 | 3fc6c082 | bellard | fill_new_table(tmp, 0x20);
|
2508 | 3fc6c082 | bellard | table[idx] = (opc_handler_t *)((unsigned long)tmp | PPC_INDIRECT); |
2509 | 3fc6c082 | bellard | |
2510 | 3fc6c082 | bellard | return 0; |
2511 | 3fc6c082 | bellard | } |
2512 | 3fc6c082 | bellard | |
2513 | 3fc6c082 | bellard | static int insert_in_table (opc_handler_t **table, unsigned char idx, |
2514 | 3fc6c082 | bellard | opc_handler_t *handler) |
2515 | 3fc6c082 | bellard | { |
2516 | 3fc6c082 | bellard | if (table[idx] != &invalid_handler)
|
2517 | 3fc6c082 | bellard | return -1; |
2518 | 3fc6c082 | bellard | table[idx] = handler; |
2519 | 3fc6c082 | bellard | |
2520 | 3fc6c082 | bellard | return 0; |
2521 | 3fc6c082 | bellard | } |
2522 | 3fc6c082 | bellard | |
2523 | 3fc6c082 | bellard | static int register_direct_insn (opc_handler_t **ppc_opcodes, |
2524 | 3fc6c082 | bellard | unsigned char idx, opc_handler_t *handler) |
2525 | 3fc6c082 | bellard | { |
2526 | 3fc6c082 | bellard | if (insert_in_table(ppc_opcodes, idx, handler) < 0) { |
2527 | 3fc6c082 | bellard | printf("*** ERROR: opcode %02x already assigned in main "
|
2528 | 76a66253 | j_mayer | "opcode table\n", idx);
|
2529 | 3fc6c082 | bellard | return -1; |
2530 | 3fc6c082 | bellard | } |
2531 | 3fc6c082 | bellard | |
2532 | 3fc6c082 | bellard | return 0; |
2533 | 3fc6c082 | bellard | } |
2534 | 3fc6c082 | bellard | |
2535 | 3fc6c082 | bellard | static int register_ind_in_table (opc_handler_t **table, |
2536 | 3fc6c082 | bellard | unsigned char idx1, unsigned char idx2, |
2537 | 3fc6c082 | bellard | opc_handler_t *handler) |
2538 | 3fc6c082 | bellard | { |
2539 | 3fc6c082 | bellard | if (table[idx1] == &invalid_handler) {
|
2540 | 3fc6c082 | bellard | if (create_new_table(table, idx1) < 0) { |
2541 | 3fc6c082 | bellard | printf("*** ERROR: unable to create indirect table "
|
2542 | 76a66253 | j_mayer | "idx=%02x\n", idx1);
|
2543 | 3fc6c082 | bellard | return -1; |
2544 | 3fc6c082 | bellard | } |
2545 | 3fc6c082 | bellard | } else {
|
2546 | 3fc6c082 | bellard | if (!is_indirect_opcode(table[idx1])) {
|
2547 | 3fc6c082 | bellard | printf("*** ERROR: idx %02x already assigned to a direct "
|
2548 | 76a66253 | j_mayer | "opcode\n", idx1);
|
2549 | 3fc6c082 | bellard | return -1; |
2550 | 3fc6c082 | bellard | } |
2551 | 3fc6c082 | bellard | } |
2552 | 3fc6c082 | bellard | if (handler != NULL && |
2553 | 3fc6c082 | bellard | insert_in_table(ind_table(table[idx1]), idx2, handler) < 0) {
|
2554 | 3fc6c082 | bellard | printf("*** ERROR: opcode %02x already assigned in "
|
2555 | 76a66253 | j_mayer | "opcode table %02x\n", idx2, idx1);
|
2556 | 3fc6c082 | bellard | return -1; |
2557 | 3fc6c082 | bellard | } |
2558 | 3fc6c082 | bellard | |
2559 | 3fc6c082 | bellard | return 0; |
2560 | 3fc6c082 | bellard | } |
2561 | 3fc6c082 | bellard | |
2562 | 3fc6c082 | bellard | static int register_ind_insn (opc_handler_t **ppc_opcodes, |
2563 | 3fc6c082 | bellard | unsigned char idx1, unsigned char idx2, |
2564 | 76a66253 | j_mayer | opc_handler_t *handler) |
2565 | 3fc6c082 | bellard | { |
2566 | 3fc6c082 | bellard | int ret;
|
2567 | 3fc6c082 | bellard | |
2568 | 3fc6c082 | bellard | ret = register_ind_in_table(ppc_opcodes, idx1, idx2, handler); |
2569 | 3fc6c082 | bellard | |
2570 | 3fc6c082 | bellard | return ret;
|
2571 | 3fc6c082 | bellard | } |
2572 | 3fc6c082 | bellard | |
2573 | 3fc6c082 | bellard | static int register_dblind_insn (opc_handler_t **ppc_opcodes, |
2574 | 3fc6c082 | bellard | unsigned char idx1, unsigned char idx2, |
2575 | 76a66253 | j_mayer | unsigned char idx3, opc_handler_t *handler) |
2576 | 3fc6c082 | bellard | { |
2577 | 3fc6c082 | bellard | if (register_ind_in_table(ppc_opcodes, idx1, idx2, NULL) < 0) { |
2578 | 3fc6c082 | bellard | printf("*** ERROR: unable to join indirect table idx "
|
2579 | 76a66253 | j_mayer | "[%02x-%02x]\n", idx1, idx2);
|
2580 | 3fc6c082 | bellard | return -1; |
2581 | 3fc6c082 | bellard | } |
2582 | 3fc6c082 | bellard | if (register_ind_in_table(ind_table(ppc_opcodes[idx1]), idx2, idx3,
|
2583 | 3fc6c082 | bellard | handler) < 0) {
|
2584 | 3fc6c082 | bellard | printf("*** ERROR: unable to insert opcode "
|
2585 | 76a66253 | j_mayer | "[%02x-%02x-%02x]\n", idx1, idx2, idx3);
|
2586 | 3fc6c082 | bellard | return -1; |
2587 | 3fc6c082 | bellard | } |
2588 | 3fc6c082 | bellard | |
2589 | 3fc6c082 | bellard | return 0; |
2590 | 3fc6c082 | bellard | } |
2591 | 3fc6c082 | bellard | |
2592 | 3fc6c082 | bellard | static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn) |
2593 | 3fc6c082 | bellard | { |
2594 | 3fc6c082 | bellard | if (insn->opc2 != 0xFF) { |
2595 | 3fc6c082 | bellard | if (insn->opc3 != 0xFF) { |
2596 | 3fc6c082 | bellard | if (register_dblind_insn(ppc_opcodes, insn->opc1, insn->opc2,
|
2597 | 3fc6c082 | bellard | insn->opc3, &insn->handler) < 0)
|
2598 | 3fc6c082 | bellard | return -1; |
2599 | 3fc6c082 | bellard | } else {
|
2600 | 3fc6c082 | bellard | if (register_ind_insn(ppc_opcodes, insn->opc1,
|
2601 | 3fc6c082 | bellard | insn->opc2, &insn->handler) < 0)
|
2602 | 3fc6c082 | bellard | return -1; |
2603 | 3fc6c082 | bellard | } |
2604 | 3fc6c082 | bellard | } else {
|
2605 | 3fc6c082 | bellard | if (register_direct_insn(ppc_opcodes, insn->opc1, &insn->handler) < 0) |
2606 | 3fc6c082 | bellard | return -1; |
2607 | 3fc6c082 | bellard | } |
2608 | 3fc6c082 | bellard | |
2609 | 3fc6c082 | bellard | return 0; |
2610 | 3fc6c082 | bellard | } |
2611 | 3fc6c082 | bellard | |
2612 | 3fc6c082 | bellard | static int test_opcode_table (opc_handler_t **table, int len) |
2613 | 3fc6c082 | bellard | { |
2614 | 3fc6c082 | bellard | int i, count, tmp;
|
2615 | 3fc6c082 | bellard | |
2616 | 3fc6c082 | bellard | for (i = 0, count = 0; i < len; i++) { |
2617 | 3fc6c082 | bellard | /* Consistency fixup */
|
2618 | 3fc6c082 | bellard | if (table[i] == NULL) |
2619 | 3fc6c082 | bellard | table[i] = &invalid_handler; |
2620 | 3fc6c082 | bellard | if (table[i] != &invalid_handler) {
|
2621 | 3fc6c082 | bellard | if (is_indirect_opcode(table[i])) {
|
2622 | 3fc6c082 | bellard | tmp = test_opcode_table(ind_table(table[i]), 0x20);
|
2623 | 3fc6c082 | bellard | if (tmp == 0) { |
2624 | 3fc6c082 | bellard | free(table[i]); |
2625 | 3fc6c082 | bellard | table[i] = &invalid_handler; |
2626 | 3fc6c082 | bellard | } else {
|
2627 | 3fc6c082 | bellard | count++; |
2628 | 3fc6c082 | bellard | } |
2629 | 3fc6c082 | bellard | } else {
|
2630 | 3fc6c082 | bellard | count++; |
2631 | 3fc6c082 | bellard | } |
2632 | 3fc6c082 | bellard | } |
2633 | 3fc6c082 | bellard | } |
2634 | 3fc6c082 | bellard | |
2635 | 3fc6c082 | bellard | return count;
|
2636 | 3fc6c082 | bellard | } |
2637 | 3fc6c082 | bellard | |
2638 | 3fc6c082 | bellard | static void fix_opcode_tables (opc_handler_t **ppc_opcodes) |
2639 | 3fc6c082 | bellard | { |
2640 | 3fc6c082 | bellard | if (test_opcode_table(ppc_opcodes, 0x40) == 0) |
2641 | 3fc6c082 | bellard | printf("*** WARNING: no opcode defined !\n");
|
2642 | 3fc6c082 | bellard | } |
2643 | 3fc6c082 | bellard | |
2644 | 3fc6c082 | bellard | /*****************************************************************************/
|
2645 | 3fc6c082 | bellard | static int create_ppc_opcodes (CPUPPCState *env, ppc_def_t *def) |
2646 | 3fc6c082 | bellard | { |
2647 | 3fc6c082 | bellard | opcode_t *opc, *start, *end; |
2648 | 3fc6c082 | bellard | |
2649 | 3fc6c082 | bellard | fill_new_table(env->opcodes, 0x40);
|
2650 | 3fc6c082 | bellard | #if defined(PPC_DUMP_CPU)
|
2651 | 1b9eb036 | j_mayer | printf("* PowerPC instructions for PVR %08x: %s flags %016" PRIx64
|
2652 | 0487d6a8 | j_mayer | " %08x\n",
|
2653 | 76a66253 | j_mayer | def->pvr, def->name, def->insns_flags, def->flags); |
2654 | 3fc6c082 | bellard | #endif
|
2655 | 3fc6c082 | bellard | if (&opc_start < &opc_end) {
|
2656 | 76a66253 | j_mayer | start = &opc_start; |
2657 | 76a66253 | j_mayer | end = &opc_end; |
2658 | 3fc6c082 | bellard | } else {
|
2659 | 76a66253 | j_mayer | start = &opc_end; |
2660 | 76a66253 | j_mayer | end = &opc_start; |
2661 | 3fc6c082 | bellard | } |
2662 | 3fc6c082 | bellard | for (opc = start + 1; opc != end; opc++) { |
2663 | 3fc6c082 | bellard | if ((opc->handler.type & def->insns_flags) != 0) { |
2664 | 3fc6c082 | bellard | if (register_insn(env->opcodes, opc) < 0) { |
2665 | 76a66253 | j_mayer | printf("*** ERROR initializing PowerPC instruction "
|
2666 | 76a66253 | j_mayer | "0x%02x 0x%02x 0x%02x\n", opc->opc1, opc->opc2,
|
2667 | 76a66253 | j_mayer | opc->opc3); |
2668 | 3fc6c082 | bellard | return -1; |
2669 | 3fc6c082 | bellard | } |
2670 | 3fc6c082 | bellard | #if defined(PPC_DUMP_CPU)
|
2671 | 3fc6c082 | bellard | if (opc1 != 0x00) { |
2672 | 3fc6c082 | bellard | if (opc->opc3 == 0xFF) { |
2673 | 3fc6c082 | bellard | if (opc->opc2 == 0xFF) { |
2674 | 3fc6c082 | bellard | printf(" %02x -- -- (%2d ----) : %s\n",
|
2675 | 3fc6c082 | bellard | opc->opc1, opc->opc1, opc->oname); |
2676 | 3fc6c082 | bellard | } else {
|
2677 | 3fc6c082 | bellard | printf(" %02x %02x -- (%2d %4d) : %s\n",
|
2678 | 3fc6c082 | bellard | opc->opc1, opc->opc2, opc->opc1, opc->opc2, |
2679 | 76a66253 | j_mayer | opc->oname); |
2680 | 3fc6c082 | bellard | } |
2681 | 3fc6c082 | bellard | } else {
|
2682 | 3fc6c082 | bellard | printf(" %02x %02x %02x (%2d %4d) : %s\n",
|
2683 | 3fc6c082 | bellard | opc->opc1, opc->opc2, opc->opc3, |
2684 | 3fc6c082 | bellard | opc->opc1, (opc->opc3 << 5) | opc->opc2,
|
2685 | 3fc6c082 | bellard | opc->oname); |
2686 | 3fc6c082 | bellard | } |
2687 | 3fc6c082 | bellard | } |
2688 | 3fc6c082 | bellard | #endif
|
2689 | 3fc6c082 | bellard | } |
2690 | 3fc6c082 | bellard | } |
2691 | 3fc6c082 | bellard | fix_opcode_tables(env->opcodes); |
2692 | 3fc6c082 | bellard | fflush(stdout); |
2693 | 3fc6c082 | bellard | fflush(stderr); |
2694 | 3fc6c082 | bellard | |
2695 | 3fc6c082 | bellard | return 0; |
2696 | 3fc6c082 | bellard | } |
2697 | 3fc6c082 | bellard | |
2698 | 3fc6c082 | bellard | int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def)
|
2699 | 3fc6c082 | bellard | { |
2700 | 3fc6c082 | bellard | env->msr_mask = def->msr_mask; |
2701 | 3fc6c082 | bellard | env->flags = def->flags; |
2702 | 76a66253 | j_mayer | if (create_ppc_opcodes(env, def) < 0) |
2703 | 3fc6c082 | bellard | return -1; |
2704 | 3fc6c082 | bellard | init_ppc_proc(env, def); |
2705 | 3fc6c082 | bellard | #if defined(PPC_DUMP_CPU)
|
2706 | 3fc6c082 | bellard | dump_sprs(env); |
2707 | 76a66253 | j_mayer | if (env->tlb != NULL) { |
2708 | 76a66253 | j_mayer | printf("%d %s TLB in %d ways\n", env->nb_tlb,
|
2709 | 76a66253 | j_mayer | env->id_tlbs ? "splitted" : "merged", env->nb_ways); |
2710 | 76a66253 | j_mayer | } |
2711 | 3fc6c082 | bellard | #endif
|
2712 | 3fc6c082 | bellard | |
2713 | 3fc6c082 | bellard | return 0; |
2714 | 3fc6c082 | bellard | } |
2715 | 3fc6c082 | bellard | |
2716 | 3fc6c082 | bellard | /*****************************************************************************/
|
2717 | 3fc6c082 | bellard | /* PowerPC CPU definitions */
|
2718 | 3a607854 | j_mayer | static ppc_def_t ppc_defs[] = {
|
2719 | 3a607854 | j_mayer | /* Embedded PowerPC */
|
2720 | 3a607854 | j_mayer | #if defined (TODO)
|
2721 | 3a607854 | j_mayer | /* PowerPC 401 */
|
2722 | 3a607854 | j_mayer | { |
2723 | 3a607854 | j_mayer | .name = "401",
|
2724 | 3a607854 | j_mayer | .pvr = CPU_PPC_401, |
2725 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2726 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_401, |
2727 | 3a607854 | j_mayer | .flags = PPC_FLAGS_401, |
2728 | 3a607854 | j_mayer | .msr_mask = xxx, |
2729 | 3a607854 | j_mayer | }, |
2730 | 3fc6c082 | bellard | #endif
|
2731 | 3fc6c082 | bellard | #if defined (TODO)
|
2732 | 3a607854 | j_mayer | /* IOP480 (401 microcontroler) */
|
2733 | 3a607854 | j_mayer | { |
2734 | 3a607854 | j_mayer | .name = "iop480",
|
2735 | 3a607854 | j_mayer | .pvr = CPU_PPC_IOP480, |
2736 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2737 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_401, |
2738 | 3a607854 | j_mayer | .flags = PPC_FLAGS_401, |
2739 | 3a607854 | j_mayer | .msr_mask = xxx, |
2740 | 3a607854 | j_mayer | }, |
2741 | 3fc6c082 | bellard | #endif
|
2742 | 3fc6c082 | bellard | #if defined (TODO)
|
2743 | 3a607854 | j_mayer | /* IBM Processor for Network Resources */
|
2744 | 3a607854 | j_mayer | { |
2745 | 3a607854 | j_mayer | .name = "Cobra",
|
2746 | 3a607854 | j_mayer | .pvr = CPU_PPC_COBRA, |
2747 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2748 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_401, |
2749 | 3a607854 | j_mayer | .flags = PPC_FLAGS_401, |
2750 | 3a607854 | j_mayer | .msr_mask = xxx, |
2751 | 3a607854 | j_mayer | }, |
2752 | 3fc6c082 | bellard | #endif
|
2753 | 3fc6c082 | bellard | #if defined (TODO)
|
2754 | 3a607854 | j_mayer | /* Generic PowerPC 403 */
|
2755 | 3a607854 | j_mayer | { |
2756 | 3a607854 | j_mayer | .name = "403",
|
2757 | 3a607854 | j_mayer | .pvr = CPU_PPC_403, |
2758 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2759 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_403, |
2760 | 3a607854 | j_mayer | .flags = PPC_FLAGS_403, |
2761 | 3a607854 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2762 | 3a607854 | j_mayer | }, |
2763 | 3fc6c082 | bellard | #endif
|
2764 | 3fc6c082 | bellard | #if defined (TODO)
|
2765 | 3a607854 | j_mayer | /* PowerPC 403 GA */
|
2766 | 3a607854 | j_mayer | { |
2767 | 3a607854 | j_mayer | .name = "403ga",
|
2768 | 3a607854 | j_mayer | .pvr = CPU_PPC_403GA, |
2769 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2770 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_403, |
2771 | 3a607854 | j_mayer | .flags = PPC_FLAGS_403, |
2772 | 3a607854 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2773 | 3a607854 | j_mayer | }, |
2774 | 3fc6c082 | bellard | #endif
|
2775 | 3fc6c082 | bellard | #if defined (TODO)
|
2776 | 3a607854 | j_mayer | /* PowerPC 403 GB */
|
2777 | 3a607854 | j_mayer | { |
2778 | 3a607854 | j_mayer | .name = "403gb",
|
2779 | 3a607854 | j_mayer | .pvr = CPU_PPC_403GB, |
2780 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2781 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_403, |
2782 | 3a607854 | j_mayer | .flags = PPC_FLAGS_403, |
2783 | 3a607854 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2784 | 3a607854 | j_mayer | }, |
2785 | 3fc6c082 | bellard | #endif
|
2786 | 3fc6c082 | bellard | #if defined (TODO)
|
2787 | 3a607854 | j_mayer | /* PowerPC 403 GC */
|
2788 | 3a607854 | j_mayer | { |
2789 | 3a607854 | j_mayer | .name = "403gc",
|
2790 | 3a607854 | j_mayer | .pvr = CPU_PPC_403GC, |
2791 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2792 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_403, |
2793 | 3a607854 | j_mayer | .flags = PPC_FLAGS_403, |
2794 | 3a607854 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2795 | 3a607854 | j_mayer | }, |
2796 | 3fc6c082 | bellard | #endif
|
2797 | 3fc6c082 | bellard | #if defined (TODO)
|
2798 | 3a607854 | j_mayer | /* PowerPC 403 GCX */
|
2799 | 3a607854 | j_mayer | { |
2800 | 3a607854 | j_mayer | .name = "403gcx",
|
2801 | 3a607854 | j_mayer | .pvr = CPU_PPC_403GCX, |
2802 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
2803 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_403, |
2804 | 3a607854 | j_mayer | .flags = PPC_FLAGS_403, |
2805 | 3a607854 | j_mayer | .msr_mask = 0x000000000007D23D,
|
2806 | 3a607854 | j_mayer | }, |
2807 | 3a607854 | j_mayer | #endif
|
2808 | 3a607854 | j_mayer | /* Generic PowerPC 405 */
|
2809 | 3a607854 | j_mayer | { |
2810 | 3a607854 | j_mayer | .name = "405",
|
2811 | 3a607854 | j_mayer | .pvr = CPU_PPC_405, |
2812 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
2813 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2814 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2815 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2816 | 3a607854 | j_mayer | }, |
2817 | 3a607854 | j_mayer | /* PowerPC 405 CR */
|
2818 | 3a607854 | j_mayer | { |
2819 | 3a607854 | j_mayer | .name = "405cr",
|
2820 | 3a607854 | j_mayer | .pvr = CPU_PPC_405, |
2821 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2822 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2823 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2824 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2825 | 3a607854 | j_mayer | }, |
2826 | 3a607854 | j_mayer | #if defined (TODO)
|
2827 | 3a607854 | j_mayer | /* PowerPC 405 GP */
|
2828 | 3a607854 | j_mayer | { |
2829 | 3a607854 | j_mayer | .name = "405gp",
|
2830 | 3a607854 | j_mayer | .pvr = CPU_PPC_405, |
2831 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2832 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2833 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2834 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2835 | 3a607854 | j_mayer | }, |
2836 | 3a607854 | j_mayer | #endif
|
2837 | 3a607854 | j_mayer | /* PowerPC 405 EP */
|
2838 | 3a607854 | j_mayer | { |
2839 | 3a607854 | j_mayer | .name = "405ep",
|
2840 | 3a607854 | j_mayer | .pvr = CPU_PPC_405EP, |
2841 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2842 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2843 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2844 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2845 | 3a607854 | j_mayer | }, |
2846 | 3a607854 | j_mayer | #if defined (TODO)
|
2847 | 3a607854 | j_mayer | /* PowerPC 405 EZ */
|
2848 | 3a607854 | j_mayer | { |
2849 | 3a607854 | j_mayer | .name = "405ez",
|
2850 | 3a607854 | j_mayer | .pvr = CPU_PPC_405EZ, |
2851 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2852 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2853 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2854 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2855 | 3a607854 | j_mayer | }, |
2856 | 3fc6c082 | bellard | #endif
|
2857 | 3fc6c082 | bellard | #if defined (TODO)
|
2858 | 3a607854 | j_mayer | /* PowerPC 405 GPR */
|
2859 | 3a607854 | j_mayer | { |
2860 | 3a607854 | j_mayer | .name = "405gpr",
|
2861 | 3a607854 | j_mayer | .pvr = CPU_PPC_405GPR, |
2862 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2863 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2864 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2865 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2866 | 3a607854 | j_mayer | }, |
2867 | 3fc6c082 | bellard | #endif
|
2868 | 3fc6c082 | bellard | #if defined (TODO)
|
2869 | 3a607854 | j_mayer | /* PowerPC 405 D2 */
|
2870 | 3a607854 | j_mayer | { |
2871 | 3a607854 | j_mayer | .name = "405d2",
|
2872 | 3a607854 | j_mayer | .pvr = CPU_PPC_405D2, |
2873 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2874 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2875 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2876 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2877 | 3a607854 | j_mayer | }, |
2878 | 3fc6c082 | bellard | #endif
|
2879 | 3fc6c082 | bellard | #if defined (TODO)
|
2880 | 3a607854 | j_mayer | /* PowerPC 405 D4 */
|
2881 | 3a607854 | j_mayer | { |
2882 | 3a607854 | j_mayer | .name = "405d4",
|
2883 | 3a607854 | j_mayer | .pvr = CPU_PPC_405D4, |
2884 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2885 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2886 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2887 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2888 | 3a607854 | j_mayer | }, |
2889 | 3fc6c082 | bellard | #endif
|
2890 | 3fc6c082 | bellard | #if defined (TODO)
|
2891 | 3a607854 | j_mayer | /* Npe405 H */
|
2892 | 3a607854 | j_mayer | { |
2893 | 3a607854 | j_mayer | .name = "Npe405H",
|
2894 | 3a607854 | j_mayer | .pvr = CPU_PPC_NPE405H, |
2895 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2896 | 76a66253 | j_mayer | .insns_flags = PPC_INSNS_405, |
2897 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2898 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2899 | 3a607854 | j_mayer | }, |
2900 | 3fc6c082 | bellard | #endif
|
2901 | 3fc6c082 | bellard | #if defined (TODO)
|
2902 | 3a607854 | j_mayer | /* Npe405 L */
|
2903 | 3a607854 | j_mayer | { |
2904 | 3a607854 | j_mayer | .name = "Npe405L",
|
2905 | 3a607854 | j_mayer | .pvr = CPU_PPC_NPE405L, |
2906 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2907 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2908 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2909 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2910 | 3a607854 | j_mayer | }, |
2911 | 3fc6c082 | bellard | #endif
|
2912 | 3fc6c082 | bellard | #if defined (TODO)
|
2913 | 3a607854 | j_mayer | /* STB010000 */
|
2914 | 3a607854 | j_mayer | { |
2915 | 3a607854 | j_mayer | .name = "STB01000",
|
2916 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB01000, |
2917 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2918 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2919 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2920 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2921 | 3a607854 | j_mayer | }, |
2922 | 3fc6c082 | bellard | #endif
|
2923 | 3fc6c082 | bellard | #if defined (TODO)
|
2924 | 3a607854 | j_mayer | /* STB01010 */
|
2925 | 3a607854 | j_mayer | { |
2926 | 3a607854 | j_mayer | .name = "STB01010",
|
2927 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB01010, |
2928 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2929 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2930 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2931 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2932 | 3a607854 | j_mayer | }, |
2933 | 3fc6c082 | bellard | #endif
|
2934 | 3fc6c082 | bellard | #if defined (TODO)
|
2935 | 3a607854 | j_mayer | /* STB0210 */
|
2936 | 3a607854 | j_mayer | { |
2937 | 3a607854 | j_mayer | .name = "STB0210",
|
2938 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB0210, |
2939 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2940 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2941 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2942 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2943 | 3a607854 | j_mayer | }, |
2944 | 3a607854 | j_mayer | #endif
|
2945 | 3a607854 | j_mayer | #if defined (TODO) || 1 |
2946 | 3a607854 | j_mayer | /* STB03xx */
|
2947 | 3a607854 | j_mayer | { |
2948 | 3a607854 | j_mayer | .name = "STB03",
|
2949 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB03, |
2950 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2951 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2952 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2953 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2954 | 3a607854 | j_mayer | }, |
2955 | 3fc6c082 | bellard | #endif
|
2956 | 3fc6c082 | bellard | #if defined (TODO)
|
2957 | 3a607854 | j_mayer | /* STB043x */
|
2958 | 3a607854 | j_mayer | { |
2959 | 3a607854 | j_mayer | .name = "STB043",
|
2960 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB043, |
2961 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2962 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2963 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2964 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2965 | 3a607854 | j_mayer | }, |
2966 | 3a607854 | j_mayer | #endif
|
2967 | 3a607854 | j_mayer | #if defined (TODO)
|
2968 | 3a607854 | j_mayer | /* STB045x */
|
2969 | 3a607854 | j_mayer | { |
2970 | 3a607854 | j_mayer | .name = "STB045",
|
2971 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB045, |
2972 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2973 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2974 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2975 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2976 | 3a607854 | j_mayer | }, |
2977 | 3a607854 | j_mayer | #endif
|
2978 | 3a607854 | j_mayer | #if defined (TODO) || 1 |
2979 | 3a607854 | j_mayer | /* STB25xx */
|
2980 | 3a607854 | j_mayer | { |
2981 | 3a607854 | j_mayer | .name = "STB25",
|
2982 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB25, |
2983 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2984 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2985 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2986 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2987 | 3a607854 | j_mayer | }, |
2988 | 3a607854 | j_mayer | #endif
|
2989 | 3a607854 | j_mayer | #if defined (TODO)
|
2990 | 3a607854 | j_mayer | /* STB130 */
|
2991 | 3a607854 | j_mayer | { |
2992 | 3a607854 | j_mayer | .name = "STB130",
|
2993 | 3a607854 | j_mayer | .pvr = CPU_PPC_STB130, |
2994 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
2995 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
2996 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
2997 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
2998 | 3a607854 | j_mayer | }, |
2999 | 3fc6c082 | bellard | #endif
|
3000 | 76a66253 | j_mayer | /* Xilinx PowerPC 405 cores */
|
3001 | 3fc6c082 | bellard | #if defined (TODO)
|
3002 | 3a607854 | j_mayer | { |
3003 | 3a607854 | j_mayer | .name = "x2vp4",
|
3004 | 3a607854 | j_mayer | .pvr = CPU_PPC_X2VP4, |
3005 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3006 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3007 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
3008 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
3009 | 3a607854 | j_mayer | }, |
3010 | 3a607854 | j_mayer | { |
3011 | 3a607854 | j_mayer | .name = "x2vp7",
|
3012 | 3a607854 | j_mayer | .pvr = CPU_PPC_X2VP7, |
3013 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3014 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3015 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
3016 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
3017 | 3a607854 | j_mayer | }, |
3018 | 3a607854 | j_mayer | { |
3019 | 3a607854 | j_mayer | .name = "x2vp20",
|
3020 | 3a607854 | j_mayer | .pvr = CPU_PPC_X2VP20, |
3021 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3022 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3023 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
3024 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
3025 | 3a607854 | j_mayer | }, |
3026 | 3a607854 | j_mayer | { |
3027 | 3a607854 | j_mayer | .name = "x2vp50",
|
3028 | 3a607854 | j_mayer | .pvr = CPU_PPC_X2VP50, |
3029 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3030 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3031 | 3a607854 | j_mayer | .flags = PPC_FLAGS_405, |
3032 | 3a607854 | j_mayer | .msr_mask = 0x00000000020EFF30,
|
3033 | 3a607854 | j_mayer | }, |
3034 | 3fc6c082 | bellard | #endif
|
3035 | 3fc6c082 | bellard | #if defined (TODO)
|
3036 | 3a607854 | j_mayer | /* PowerPC 440 EP */
|
3037 | 3a607854 | j_mayer | { |
3038 | 3a607854 | j_mayer | .name = "440ep",
|
3039 | 3a607854 | j_mayer | .pvr = CPU_PPC_440EP, |
3040 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3041 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_440, |
3042 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3043 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3044 | 3a607854 | j_mayer | }, |
3045 | 3fc6c082 | bellard | #endif
|
3046 | 3fc6c082 | bellard | #if defined (TODO)
|
3047 | 3a607854 | j_mayer | /* PowerPC 440 GR */
|
3048 | 3a607854 | j_mayer | { |
3049 | 3a607854 | j_mayer | .name = "440gr",
|
3050 | 3a607854 | j_mayer | .pvr = CPU_PPC_440GR, |
3051 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3052 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_440, |
3053 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3054 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3055 | 3a607854 | j_mayer | }, |
3056 | 3fc6c082 | bellard | #endif
|
3057 | 3fc6c082 | bellard | #if defined (TODO)
|
3058 | 3a607854 | j_mayer | /* PowerPC 440 GP */
|
3059 | 3a607854 | j_mayer | { |
3060 | 3a607854 | j_mayer | .name = "440gp",
|
3061 | 3a607854 | j_mayer | .pvr = CPU_PPC_440GP, |
3062 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFF00,
|
3063 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_440, |
3064 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3065 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3066 | 3a607854 | j_mayer | }, |
3067 | 3fc6c082 | bellard | #endif
|
3068 | 3fc6c082 | bellard | #if defined (TODO)
|
3069 | 3a607854 | j_mayer | /* PowerPC 440 GX */
|
3070 | 3a607854 | j_mayer | { |
3071 | 3a607854 | j_mayer | .name = "440gx",
|
3072 | 3a607854 | j_mayer | .pvr = CPU_PPC_440GX, |
3073 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3074 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3075 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3076 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3077 | 3a607854 | j_mayer | }, |
3078 | 3fc6c082 | bellard | #endif
|
3079 | 3fc6c082 | bellard | #if defined (TODO)
|
3080 | 3a607854 | j_mayer | /* PowerPC 440 GXc */
|
3081 | 3a607854 | j_mayer | { |
3082 | 3a607854 | j_mayer | .name = "440gxc",
|
3083 | 3a607854 | j_mayer | .pvr = CPU_PPC_440GXC, |
3084 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3085 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3086 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3087 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3088 | 3a607854 | j_mayer | }, |
3089 | 3a607854 | j_mayer | #endif
|
3090 | 3a607854 | j_mayer | #if defined (TODO)
|
3091 | 3a607854 | j_mayer | /* PowerPC 440 GXf */
|
3092 | 3a607854 | j_mayer | { |
3093 | 3a607854 | j_mayer | .name = "440gxf",
|
3094 | 3a607854 | j_mayer | .pvr = CPU_PPC_440GXF, |
3095 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3096 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3097 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3098 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3099 | 3a607854 | j_mayer | }, |
3100 | 3a607854 | j_mayer | #endif
|
3101 | 3a607854 | j_mayer | #if defined (TODO)
|
3102 | 3a607854 | j_mayer | /* PowerPC 440 SP */
|
3103 | 3a607854 | j_mayer | { |
3104 | 3a607854 | j_mayer | .name = "440sp",
|
3105 | 3a607854 | j_mayer | .pvr = CPU_PPC_440SP, |
3106 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3107 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3108 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3109 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3110 | 3a607854 | j_mayer | }, |
3111 | 3a607854 | j_mayer | #endif
|
3112 | 3a607854 | j_mayer | #if defined (TODO)
|
3113 | 3a607854 | j_mayer | /* PowerPC 440 SP2 */
|
3114 | 3a607854 | j_mayer | { |
3115 | 3a607854 | j_mayer | .name = "440sp2",
|
3116 | 3a607854 | j_mayer | .pvr = CPU_PPC_440SP2, |
3117 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3118 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3119 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3120 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3121 | 3a607854 | j_mayer | }, |
3122 | 3a607854 | j_mayer | #endif
|
3123 | 3a607854 | j_mayer | #if defined (TODO)
|
3124 | 3a607854 | j_mayer | /* PowerPC 440 SPE */
|
3125 | 3a607854 | j_mayer | { |
3126 | 3a607854 | j_mayer | .name = "440spe",
|
3127 | 3a607854 | j_mayer | .pvr = CPU_PPC_440SPE, |
3128 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3129 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_405, |
3130 | 3a607854 | j_mayer | .flags = PPC_FLAGS_440, |
3131 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3132 | 3a607854 | j_mayer | }, |
3133 | 3a607854 | j_mayer | #endif
|
3134 | 3a607854 | j_mayer | /* Fake generic BookE PowerPC */
|
3135 | 3a607854 | j_mayer | { |
3136 | 3a607854 | j_mayer | .name = "BookE",
|
3137 | 3a607854 | j_mayer | .pvr = CPU_PPC_e500, |
3138 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3139 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_BOOKE, |
3140 | 3a607854 | j_mayer | .flags = PPC_FLAGS_BOOKE, |
3141 | 3a607854 | j_mayer | .msr_mask = 0x000000000006D630,
|
3142 | 3a607854 | j_mayer | }, |
3143 | 3a607854 | j_mayer | /* PowerPC 460 cores - TODO */
|
3144 | 3a607854 | j_mayer | /* PowerPC MPC 5xx cores - TODO */
|
3145 | 3a607854 | j_mayer | /* PowerPC MPC 8xx cores - TODO */
|
3146 | 3a607854 | j_mayer | /* PowerPC MPC 8xxx cores - TODO */
|
3147 | 3a607854 | j_mayer | /* e200 cores - TODO */
|
3148 | 3a607854 | j_mayer | /* e500 cores - TODO */
|
3149 | 3a607854 | j_mayer | /* e600 cores - TODO */
|
3150 | 3a607854 | j_mayer | |
3151 | 3a607854 | j_mayer | /* 32 bits "classic" PowerPC */
|
3152 | 3a607854 | j_mayer | #if defined (TODO)
|
3153 | 3a607854 | j_mayer | /* PowerPC 601 */
|
3154 | 3a607854 | j_mayer | { |
3155 | 3a607854 | j_mayer | .name = "601",
|
3156 | 3a607854 | j_mayer | .pvr = CPU_PPC_601, |
3157 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3158 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_601, |
3159 | 3a607854 | j_mayer | .flags = PPC_FLAGS_601, |
3160 | 3a607854 | j_mayer | .msr_mask = 0x000000000000FD70,
|
3161 | 3a607854 | j_mayer | }, |
3162 | 3a607854 | j_mayer | #endif
|
3163 | 3a607854 | j_mayer | #if defined (TODO)
|
3164 | 3a607854 | j_mayer | /* PowerPC 602 */
|
3165 | 3a607854 | j_mayer | { |
3166 | 3a607854 | j_mayer | .name = "602",
|
3167 | 3a607854 | j_mayer | .pvr = CPU_PPC_602, |
3168 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3169 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_602, |
3170 | 3a607854 | j_mayer | .flags = PPC_FLAGS_602, |
3171 | 3a607854 | j_mayer | .msr_mask = 0x0000000000C7FF73,
|
3172 | 3a607854 | j_mayer | }, |
3173 | 3a607854 | j_mayer | #endif
|
3174 | 3a607854 | j_mayer | /* PowerPC 603 */
|
3175 | 3a607854 | j_mayer | { |
3176 | 3a607854 | j_mayer | .name = "603",
|
3177 | 3a607854 | j_mayer | .pvr = CPU_PPC_603, |
3178 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3179 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3180 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3181 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3182 | 3a607854 | j_mayer | }, |
3183 | 3a607854 | j_mayer | /* PowerPC 603e */
|
3184 | 3a607854 | j_mayer | { |
3185 | 3a607854 | j_mayer | .name = "603e",
|
3186 | 3a607854 | j_mayer | .pvr = CPU_PPC_603E, |
3187 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3188 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3189 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3190 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3191 | 3a607854 | j_mayer | }, |
3192 | 3a607854 | j_mayer | { |
3193 | 3a607854 | j_mayer | .name = "Stretch",
|
3194 | 3a607854 | j_mayer | .pvr = CPU_PPC_603E, |
3195 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3196 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3197 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3198 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3199 | 3a607854 | j_mayer | }, |
3200 | 3a607854 | j_mayer | /* PowerPC 603p */
|
3201 | 3a607854 | j_mayer | { |
3202 | 3a607854 | j_mayer | .name = "603p",
|
3203 | 3a607854 | j_mayer | .pvr = CPU_PPC_603P, |
3204 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3205 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3206 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3207 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3208 | 3a607854 | j_mayer | }, |
3209 | 3a607854 | j_mayer | /* PowerPC 603e7 */
|
3210 | 3a607854 | j_mayer | { |
3211 | 3a607854 | j_mayer | .name = "603e7",
|
3212 | 3a607854 | j_mayer | .pvr = CPU_PPC_603E7, |
3213 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3214 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3215 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3216 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3217 | 3a607854 | j_mayer | }, |
3218 | 3a607854 | j_mayer | /* PowerPC 603e7v */
|
3219 | 3a607854 | j_mayer | { |
3220 | 3a607854 | j_mayer | .name = "603e7v",
|
3221 | 3a607854 | j_mayer | .pvr = CPU_PPC_603E7v, |
3222 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3223 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3224 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3225 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3226 | 3a607854 | j_mayer | }, |
3227 | 3a607854 | j_mayer | /* PowerPC 603e7v2 */
|
3228 | 3a607854 | j_mayer | { |
3229 | 3a607854 | j_mayer | .name = "603e7v2",
|
3230 | 3a607854 | j_mayer | .pvr = CPU_PPC_603E7v2, |
3231 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3232 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3233 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3234 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3235 | 3a607854 | j_mayer | }, |
3236 | 3a607854 | j_mayer | /* PowerPC 603r */
|
3237 | 3a607854 | j_mayer | { |
3238 | 3a607854 | j_mayer | .name = "603r",
|
3239 | 3a607854 | j_mayer | .pvr = CPU_PPC_603R, |
3240 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3241 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3242 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3243 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3244 | 3a607854 | j_mayer | }, |
3245 | 3a607854 | j_mayer | { |
3246 | 3a607854 | j_mayer | .name = "Goldeneye",
|
3247 | 3a607854 | j_mayer | .pvr = CPU_PPC_603R, |
3248 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3249 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_603, |
3250 | 3a607854 | j_mayer | .flags = PPC_FLAGS_603, |
3251 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF73,
|
3252 | 3a607854 | j_mayer | }, |
3253 | 3a607854 | j_mayer | #if defined (TODO)
|
3254 | 3a607854 | j_mayer | /* XXX: TODO: according to Motorola UM, this is a derivative to 603e */
|
3255 | 3a607854 | j_mayer | { |
3256 | 3a607854 | j_mayer | .name = "G2",
|
3257 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2, |
3258 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3259 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3260 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3261 | 3a607854 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3262 | 3a607854 | j_mayer | }, |
3263 | 3a607854 | j_mayer | { |
3264 | 3a607854 | j_mayer | .name = "G2h4",
|
3265 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2H4, |
3266 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3267 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3268 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3269 | 3a607854 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3270 | 3a607854 | j_mayer | }, |
3271 | 3a607854 | j_mayer | { |
3272 | 3a607854 | j_mayer | .name = "G2gp",
|
3273 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2gp, |
3274 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3275 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3276 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3277 | 3a607854 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3278 | 3a607854 | j_mayer | }, |
3279 | 3a607854 | j_mayer | { |
3280 | 3a607854 | j_mayer | .name = "G2ls",
|
3281 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2ls, |
3282 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3283 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3284 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3285 | 3a607854 | j_mayer | .msr_mask = 0x000000000006FFF2,
|
3286 | 3a607854 | j_mayer | }, |
3287 | 3a607854 | j_mayer | { /* Same as G2, with LE mode support */
|
3288 | 3a607854 | j_mayer | .name = "G2le",
|
3289 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2LE, |
3290 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3291 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3292 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3293 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FFF3,
|
3294 | 3a607854 | j_mayer | }, |
3295 | 3a607854 | j_mayer | { |
3296 | 3a607854 | j_mayer | .name = "G2legp",
|
3297 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2LEgp, |
3298 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3299 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3300 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3301 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FFF3,
|
3302 | 3a607854 | j_mayer | }, |
3303 | 3a607854 | j_mayer | { |
3304 | 3a607854 | j_mayer | .name = "G2lels",
|
3305 | 3a607854 | j_mayer | .pvr = CPU_PPC_G2LEls, |
3306 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3307 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_G2, |
3308 | 3a607854 | j_mayer | .flags = PPC_FLAGS_G2, |
3309 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FFF3,
|
3310 | 3a607854 | j_mayer | }, |
3311 | 3a607854 | j_mayer | #endif
|
3312 | 3a607854 | j_mayer | /* PowerPC 604 */
|
3313 | 3a607854 | j_mayer | { |
3314 | 3a607854 | j_mayer | .name = "604",
|
3315 | 3a607854 | j_mayer | .pvr = CPU_PPC_604, |
3316 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3317 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_604, |
3318 | 3a607854 | j_mayer | .flags = PPC_FLAGS_604, |
3319 | 3a607854 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3320 | 3a607854 | j_mayer | }, |
3321 | 3a607854 | j_mayer | /* PowerPC 604e */
|
3322 | 3a607854 | j_mayer | { |
3323 | 3a607854 | j_mayer | .name = "604e",
|
3324 | 3a607854 | j_mayer | .pvr = CPU_PPC_604E, |
3325 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3326 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_604, |
3327 | 3a607854 | j_mayer | .flags = PPC_FLAGS_604, |
3328 | 3a607854 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3329 | 3a607854 | j_mayer | }, |
3330 | 3a607854 | j_mayer | /* PowerPC 604r */
|
3331 | 3a607854 | j_mayer | { |
3332 | 3a607854 | j_mayer | .name = "604r",
|
3333 | 3a607854 | j_mayer | .pvr = CPU_PPC_604R, |
3334 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3335 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_604, |
3336 | 3a607854 | j_mayer | .flags = PPC_FLAGS_604, |
3337 | 3a607854 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3338 | 3a607854 | j_mayer | }, |
3339 | 3a607854 | j_mayer | /* generic G3 */
|
3340 | 3a607854 | j_mayer | { |
3341 | 3a607854 | j_mayer | .name = "G3",
|
3342 | 3a607854 | j_mayer | .pvr = CPU_PPC_74x, |
3343 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3344 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3345 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3346 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3347 | 3a607854 | j_mayer | }, |
3348 | 3a607854 | j_mayer | /* MPC740 (G3) */
|
3349 | 3a607854 | j_mayer | { |
3350 | 3a607854 | j_mayer | .name = "740",
|
3351 | 3a607854 | j_mayer | .pvr = CPU_PPC_74x, |
3352 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3353 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3354 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3355 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3356 | 3a607854 | j_mayer | }, |
3357 | 3a607854 | j_mayer | { |
3358 | 3a607854 | j_mayer | .name = "Arthur",
|
3359 | 3a607854 | j_mayer | .pvr = CPU_PPC_74x, |
3360 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3361 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3362 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3363 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3364 | 3a607854 | j_mayer | }, |
3365 | 3a607854 | j_mayer | #if defined (TODO)
|
3366 | 3a607854 | j_mayer | /* MPC745 (G3) */
|
3367 | 3a607854 | j_mayer | { |
3368 | 3a607854 | j_mayer | .name = "745",
|
3369 | 3a607854 | j_mayer | .pvr = CPU_PPC_74x, |
3370 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3371 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3372 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x5, |
3373 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3374 | 3a607854 | j_mayer | }, |
3375 | 3a607854 | j_mayer | { |
3376 | 3a607854 | j_mayer | .name = "Goldfinger",
|
3377 | 3a607854 | j_mayer | .pvr = CPU_PPC_74x, |
3378 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3379 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3380 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x5, |
3381 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3382 | 3a607854 | j_mayer | }, |
3383 | 3a607854 | j_mayer | #endif
|
3384 | 3a607854 | j_mayer | /* MPC750 (G3) */
|
3385 | 3a607854 | j_mayer | { |
3386 | 3a607854 | j_mayer | .name = "750",
|
3387 | 3a607854 | j_mayer | .pvr = CPU_PPC_74x, |
3388 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3389 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3390 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3391 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3392 | 3a607854 | j_mayer | }, |
3393 | 3a607854 | j_mayer | #if defined (TODO)
|
3394 | 3a607854 | j_mayer | /* MPC755 (G3) */
|
3395 | 3a607854 | j_mayer | { |
3396 | 3a607854 | j_mayer | .name = "755",
|
3397 | 3a607854 | j_mayer | .pvr = CPU_PPC_755, |
3398 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3399 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3400 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x5, |
3401 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3402 | 3a607854 | j_mayer | }, |
3403 | 3a607854 | j_mayer | #endif
|
3404 | 3a607854 | j_mayer | /* MPC740P (G3) */
|
3405 | 3a607854 | j_mayer | { |
3406 | 3a607854 | j_mayer | .name = "740p",
|
3407 | 3a607854 | j_mayer | .pvr = CPU_PPC_74xP, |
3408 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3409 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3410 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3411 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3412 | 3a607854 | j_mayer | }, |
3413 | 3a607854 | j_mayer | { |
3414 | 3a607854 | j_mayer | .name = "Conan/Doyle",
|
3415 | 3a607854 | j_mayer | .pvr = CPU_PPC_74xP, |
3416 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3417 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3418 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3419 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3420 | 3a607854 | j_mayer | }, |
3421 | 3a607854 | j_mayer | #if defined (TODO)
|
3422 | 3a607854 | j_mayer | /* MPC745P (G3) */
|
3423 | 3a607854 | j_mayer | { |
3424 | 3a607854 | j_mayer | .name = "745p",
|
3425 | 3a607854 | j_mayer | .pvr = CPU_PPC_74xP, |
3426 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3427 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3428 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x5, |
3429 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3430 | 3a607854 | j_mayer | }, |
3431 | 3a607854 | j_mayer | #endif
|
3432 | 3a607854 | j_mayer | /* MPC750P (G3) */
|
3433 | 3a607854 | j_mayer | { |
3434 | 3a607854 | j_mayer | .name = "750p",
|
3435 | 3a607854 | j_mayer | .pvr = CPU_PPC_74xP, |
3436 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3437 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3438 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3439 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3440 | 3a607854 | j_mayer | }, |
3441 | 3a607854 | j_mayer | #if defined (TODO)
|
3442 | 3a607854 | j_mayer | /* MPC755P (G3) */
|
3443 | 3a607854 | j_mayer | { |
3444 | 3a607854 | j_mayer | .name = "755p",
|
3445 | 3a607854 | j_mayer | .pvr = CPU_PPC_74xP, |
3446 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFF000,
|
3447 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x5, |
3448 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x5, |
3449 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3450 | 3a607854 | j_mayer | }, |
3451 | 3a607854 | j_mayer | #endif
|
3452 | 3a607854 | j_mayer | /* IBM 750CXe (G3 embedded) */
|
3453 | 3a607854 | j_mayer | { |
3454 | 3a607854 | j_mayer | .name = "750cxe",
|
3455 | 3a607854 | j_mayer | .pvr = CPU_PPC_750CXE, |
3456 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3457 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3458 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3459 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3460 | 3a607854 | j_mayer | }, |
3461 | 3a607854 | j_mayer | /* IBM 750FX (G3 embedded) */
|
3462 | 3a607854 | j_mayer | { |
3463 | 3a607854 | j_mayer | .name = "750fx",
|
3464 | 3a607854 | j_mayer | .pvr = CPU_PPC_750FX, |
3465 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3466 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3467 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3468 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3469 | 3a607854 | j_mayer | }, |
3470 | 3a607854 | j_mayer | /* IBM 750GX (G3 embedded) */
|
3471 | 3a607854 | j_mayer | { |
3472 | 3a607854 | j_mayer | .name = "750gx",
|
3473 | 3a607854 | j_mayer | .pvr = CPU_PPC_750GX, |
3474 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3475 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_7x0, |
3476 | 3a607854 | j_mayer | .flags = PPC_FLAGS_7x0, |
3477 | 3a607854 | j_mayer | .msr_mask = 0x000000000007FF77,
|
3478 | 3a607854 | j_mayer | }, |
3479 | 3a607854 | j_mayer | #if defined (TODO)
|
3480 | 3a607854 | j_mayer | /* generic G4 */
|
3481 | 3a607854 | j_mayer | { |
3482 | 3a607854 | j_mayer | .name = "G4",
|
3483 | 3a607854 | j_mayer | .pvr = CPU_PPC_7400, |
3484 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3485 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3486 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3487 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3488 | 3a607854 | j_mayer | }, |
3489 | 3a607854 | j_mayer | #endif
|
3490 | 3a607854 | j_mayer | #if defined (TODO)
|
3491 | 3a607854 | j_mayer | /* PowerPC 7400 (G4) */
|
3492 | 3a607854 | j_mayer | { |
3493 | 3a607854 | j_mayer | .name = "7400",
|
3494 | 3a607854 | j_mayer | .pvr = CPU_PPC_7400, |
3495 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3496 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3497 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3498 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3499 | 3a607854 | j_mayer | }, |
3500 | 3a607854 | j_mayer | { |
3501 | 3a607854 | j_mayer | .name = "Max",
|
3502 | 3a607854 | j_mayer | .pvr = CPU_PPC_7400, |
3503 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3504 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3505 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3506 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3507 | 3a607854 | j_mayer | }, |
3508 | 3a607854 | j_mayer | #endif
|
3509 | 3a607854 | j_mayer | #if defined (TODO)
|
3510 | 3a607854 | j_mayer | /* PowerPC 7410 (G4) */
|
3511 | 3a607854 | j_mayer | { |
3512 | 3a607854 | j_mayer | .name = "7410",
|
3513 | 3a607854 | j_mayer | .pvr = CPU_PPC_7410, |
3514 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3515 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3516 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3517 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3518 | 3a607854 | j_mayer | }, |
3519 | 3a607854 | j_mayer | { |
3520 | 3a607854 | j_mayer | .name = "Nitro",
|
3521 | 3a607854 | j_mayer | .pvr = CPU_PPC_7410, |
3522 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3523 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3524 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3525 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3526 | 3a607854 | j_mayer | }, |
3527 | 3a607854 | j_mayer | #endif
|
3528 | 3a607854 | j_mayer | /* XXX: 7441 */
|
3529 | 3a607854 | j_mayer | /* XXX: 7445 */
|
3530 | 3a607854 | j_mayer | /* XXX: 7447 */
|
3531 | 3a607854 | j_mayer | /* XXX: 7447A */
|
3532 | 3a607854 | j_mayer | #if defined (TODO)
|
3533 | 3a607854 | j_mayer | /* PowerPC 7450 (G4) */
|
3534 | 3a607854 | j_mayer | { |
3535 | 3a607854 | j_mayer | .name = "7450",
|
3536 | 3a607854 | j_mayer | .pvr = CPU_PPC_7450, |
3537 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3538 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3539 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3540 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3541 | 3a607854 | j_mayer | }, |
3542 | 3a607854 | j_mayer | { |
3543 | 3a607854 | j_mayer | .name = "Vger",
|
3544 | 3a607854 | j_mayer | .pvr = CPU_PPC_7450, |
3545 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3546 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3547 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3548 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3549 | 3a607854 | j_mayer | }, |
3550 | 3a607854 | j_mayer | #endif
|
3551 | 3a607854 | j_mayer | /* XXX: 7451 */
|
3552 | 3a607854 | j_mayer | #if defined (TODO)
|
3553 | 3a607854 | j_mayer | /* PowerPC 7455 (G4) */
|
3554 | 3a607854 | j_mayer | { |
3555 | 3a607854 | j_mayer | .name = "7455",
|
3556 | 3a607854 | j_mayer | .pvr = CPU_PPC_7455, |
3557 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3558 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3559 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3560 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3561 | 3a607854 | j_mayer | }, |
3562 | 3a607854 | j_mayer | { |
3563 | 3a607854 | j_mayer | .name = "Apollo 6",
|
3564 | 3a607854 | j_mayer | .pvr = CPU_PPC_7455, |
3565 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3566 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3567 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3568 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3569 | 3a607854 | j_mayer | }, |
3570 | 3a607854 | j_mayer | #endif
|
3571 | 3a607854 | j_mayer | #if defined (TODO)
|
3572 | 3a607854 | j_mayer | /* PowerPC 7457 (G4) */
|
3573 | 3a607854 | j_mayer | { |
3574 | 3a607854 | j_mayer | .name = "7457",
|
3575 | 3a607854 | j_mayer | .pvr = CPU_PPC_7457, |
3576 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3577 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3578 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3579 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3580 | 3a607854 | j_mayer | }, |
3581 | 3a607854 | j_mayer | { |
3582 | 3a607854 | j_mayer | .name = "Apollo 7",
|
3583 | 3a607854 | j_mayer | .pvr = CPU_PPC_7457, |
3584 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3585 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3586 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3587 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3588 | 3a607854 | j_mayer | }, |
3589 | 3a607854 | j_mayer | #endif
|
3590 | 3a607854 | j_mayer | #if defined (TODO)
|
3591 | 3a607854 | j_mayer | /* PowerPC 7457A (G4) */
|
3592 | 3a607854 | j_mayer | { |
3593 | 3a607854 | j_mayer | .name = "7457A",
|
3594 | 3a607854 | j_mayer | .pvr = CPU_PPC_7457A, |
3595 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3596 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3597 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3598 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3599 | 3a607854 | j_mayer | }, |
3600 | 3a607854 | j_mayer | { |
3601 | 3a607854 | j_mayer | .name = "Apollo 7 PM",
|
3602 | 3a607854 | j_mayer | .pvr = CPU_PPC_7457A, |
3603 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3604 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_74xx, |
3605 | 3a607854 | j_mayer | .flags = PPC_FLAGS_74xx, |
3606 | 3a607854 | j_mayer | .msr_mask = 0x000000000205FF77,
|
3607 | 3a607854 | j_mayer | }, |
3608 | 3a607854 | j_mayer | #endif
|
3609 | 3a607854 | j_mayer | /* 64 bits PowerPC */
|
3610 | 426613db | j_mayer | #if defined (TARGET_PPC64)
|
3611 | 3fc6c082 | bellard | #if defined (TODO)
|
3612 | 3a607854 | j_mayer | /* PowerPC 620 */
|
3613 | 3a607854 | j_mayer | { |
3614 | 3a607854 | j_mayer | .name = "620",
|
3615 | 3a607854 | j_mayer | .pvr = CPU_PPC_620, |
3616 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3617 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_620, |
3618 | 3a607854 | j_mayer | .flags = PPC_FLAGS_620, |
3619 | 3a607854 | j_mayer | .msr_mask = 0x800000000005FF73,
|
3620 | 3a607854 | j_mayer | }, |
3621 | 76a66253 | j_mayer | #endif
|
3622 | 76a66253 | j_mayer | #if defined (TODO)
|
3623 | 3a607854 | j_mayer | /* PowerPC 630 (POWER3) */
|
3624 | 3a607854 | j_mayer | { |
3625 | 3a607854 | j_mayer | .name = "630",
|
3626 | 3a607854 | j_mayer | .pvr = CPU_PPC_630, |
3627 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3628 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_630, |
3629 | 3a607854 | j_mayer | .flags = PPC_FLAGS_630, |
3630 | 3a607854 | j_mayer | .msr_mask = xxx, |
3631 | 3a607854 | j_mayer | } |
3632 | 3a607854 | j_mayer | { |
3633 | 3a607854 | j_mayer | .name = "POWER3",
|
3634 | 3a607854 | j_mayer | .pvr = CPU_PPC_630, |
3635 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3636 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_630, |
3637 | 3a607854 | j_mayer | .flags = PPC_FLAGS_630, |
3638 | 3a607854 | j_mayer | .msr_mask = xxx, |
3639 | 3a607854 | j_mayer | } |
3640 | 3a607854 | j_mayer | #endif
|
3641 | 3a607854 | j_mayer | #if defined (TODO)
|
3642 | 3a607854 | j_mayer | /* PowerPC 631 (Power 3+)*/
|
3643 | 3a607854 | j_mayer | { |
3644 | 3a607854 | j_mayer | .name = "631",
|
3645 | 3a607854 | j_mayer | .pvr = CPU_PPC_631, |
3646 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3647 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_631, |
3648 | 3a607854 | j_mayer | .flags = PPC_FLAGS_631, |
3649 | 3a607854 | j_mayer | .msr_mask = xxx, |
3650 | 3a607854 | j_mayer | }, |
3651 | 3a607854 | j_mayer | { |
3652 | 3a607854 | j_mayer | .name = "POWER3+",
|
3653 | 3a607854 | j_mayer | .pvr = CPU_PPC_631, |
3654 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3655 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_631, |
3656 | 3a607854 | j_mayer | .flags = PPC_FLAGS_631, |
3657 | 3a607854 | j_mayer | .msr_mask = xxx, |
3658 | 3a607854 | j_mayer | }, |
3659 | 3a607854 | j_mayer | #endif
|
3660 | 3a607854 | j_mayer | #if defined (TODO)
|
3661 | 3a607854 | j_mayer | /* POWER4 */
|
3662 | 3a607854 | j_mayer | { |
3663 | 3a607854 | j_mayer | .name = "POWER4",
|
3664 | 3a607854 | j_mayer | .pvr = CPU_PPC_POWER4, |
3665 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3666 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_POWER4, |
3667 | 3a607854 | j_mayer | .flags = PPC_FLAGS_POWER4, |
3668 | 3a607854 | j_mayer | .msr_mask = xxx, |
3669 | 3a607854 | j_mayer | }, |
3670 | 3a607854 | j_mayer | #endif
|
3671 | 3a607854 | j_mayer | #if defined (TODO)
|
3672 | 3a607854 | j_mayer | /* POWER4p */
|
3673 | 3a607854 | j_mayer | { |
3674 | 3a607854 | j_mayer | .name = "POWER4+",
|
3675 | 3a607854 | j_mayer | .pvr = CPU_PPC_POWER4P, |
3676 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3677 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_POWER4, |
3678 | 3a607854 | j_mayer | .flags = PPC_FLAGS_POWER4, |
3679 | 3a607854 | j_mayer | .msr_mask = xxx, |
3680 | 3a607854 | j_mayer | }, |
3681 | 3a607854 | j_mayer | #endif
|
3682 | 3a607854 | j_mayer | #if defined (TODO)
|
3683 | 3a607854 | j_mayer | /* POWER5 */
|
3684 | 3a607854 | j_mayer | { |
3685 | 3a607854 | j_mayer | .name = "POWER5",
|
3686 | 3a607854 | j_mayer | .pvr = CPU_PPC_POWER5, |
3687 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3688 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_POWER5, |
3689 | 3a607854 | j_mayer | .flags = PPC_FLAGS_POWER5, |
3690 | 3a607854 | j_mayer | .msr_mask = xxx, |
3691 | 3a607854 | j_mayer | }, |
3692 | 3a607854 | j_mayer | #endif
|
3693 | 3a607854 | j_mayer | #if defined (TODO)
|
3694 | 3a607854 | j_mayer | /* POWER5+ */
|
3695 | 3a607854 | j_mayer | { |
3696 | 3a607854 | j_mayer | .name = "POWER5+",
|
3697 | 3a607854 | j_mayer | .pvr = CPU_PPC_POWER5P, |
3698 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3699 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_POWER5, |
3700 | 3a607854 | j_mayer | .flags = PPC_FLAGS_POWER5, |
3701 | 3a607854 | j_mayer | .msr_mask = xxx, |
3702 | 3a607854 | j_mayer | }, |
3703 | 3a607854 | j_mayer | #endif
|
3704 | 3a607854 | j_mayer | #if defined (TODO) || 1 |
3705 | 3a607854 | j_mayer | /* PowerPC 970 */
|
3706 | 3a607854 | j_mayer | { |
3707 | 3a607854 | j_mayer | .name = "970",
|
3708 | 3a607854 | j_mayer | .pvr = CPU_PPC_970, |
3709 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3710 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_970, |
3711 | 3a607854 | j_mayer | .flags = PPC_FLAGS_970, |
3712 | 3a607854 | j_mayer | .msr_mask = 0x900000000204FF36,
|
3713 | 3a607854 | j_mayer | }, |
3714 | 3a607854 | j_mayer | #endif
|
3715 | 3a607854 | j_mayer | #if defined (TODO)
|
3716 | 3a607854 | j_mayer | /* PowerPC 970FX (G5) */
|
3717 | 3a607854 | j_mayer | { |
3718 | 3a607854 | j_mayer | .name = "970fx",
|
3719 | 3a607854 | j_mayer | .pvr = CPU_PPC_970FX, |
3720 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3721 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_970FX, |
3722 | 3a607854 | j_mayer | .flags = PPC_FLAGS_970FX, |
3723 | 3a607854 | j_mayer | .msr_mask = 0x800000000204FF36,
|
3724 | 3a607854 | j_mayer | }, |
3725 | 3a607854 | j_mayer | #endif
|
3726 | 3a607854 | j_mayer | #if defined (TODO)
|
3727 | 3a607854 | j_mayer | /* RS64 (Apache/A35) */
|
3728 | 3a607854 | j_mayer | /* This one seems to support the whole POWER2 instruction set
|
3729 | 3a607854 | j_mayer | * and the PowerPC 64 one.
|
3730 | 3a607854 | j_mayer | */
|
3731 | 3a607854 | j_mayer | { |
3732 | 3a607854 | j_mayer | .name = "RS64",
|
3733 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64, |
3734 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3735 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3736 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3737 | 3a607854 | j_mayer | .msr_mask = xxx, |
3738 | 3a607854 | j_mayer | }, |
3739 | 3a607854 | j_mayer | { |
3740 | 3a607854 | j_mayer | .name = "Apache",
|
3741 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64, |
3742 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3743 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3744 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3745 | 3a607854 | j_mayer | .msr_mask = xxx, |
3746 | 3a607854 | j_mayer | }, |
3747 | 3a607854 | j_mayer | { |
3748 | 3a607854 | j_mayer | .name = "A35",
|
3749 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64, |
3750 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3751 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3752 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3753 | 3a607854 | j_mayer | .msr_mask = xxx, |
3754 | 3a607854 | j_mayer | }, |
3755 | 3a607854 | j_mayer | #endif
|
3756 | 3a607854 | j_mayer | #if defined (TODO)
|
3757 | 3a607854 | j_mayer | /* RS64-II (NorthStar/A50) */
|
3758 | 3a607854 | j_mayer | { |
3759 | 3a607854 | j_mayer | .name = "RS64-II",
|
3760 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64II, |
3761 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3762 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3763 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3764 | 3a607854 | j_mayer | .msr_mask = xxx, |
3765 | 3a607854 | j_mayer | }, |
3766 | 3a607854 | j_mayer | { |
3767 | 3a607854 | j_mayer | .name = "NortStar",
|
3768 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64II, |
3769 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3770 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3771 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3772 | 3a607854 | j_mayer | .msr_mask = xxx, |
3773 | 3a607854 | j_mayer | }, |
3774 | 3a607854 | j_mayer | { |
3775 | 3a607854 | j_mayer | .name = "A50",
|
3776 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64II, |
3777 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3778 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3779 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3780 | 3a607854 | j_mayer | .msr_mask = xxx, |
3781 | 3a607854 | j_mayer | }, |
3782 | 3a607854 | j_mayer | #endif
|
3783 | 3a607854 | j_mayer | #if defined (TODO)
|
3784 | 3a607854 | j_mayer | /* RS64-III (Pulsar) */
|
3785 | 3a607854 | j_mayer | { |
3786 | 3a607854 | j_mayer | .name = "RS64-III",
|
3787 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64III, |
3788 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3789 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3790 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3791 | 3a607854 | j_mayer | .msr_mask = xxx, |
3792 | 3a607854 | j_mayer | }, |
3793 | 3a607854 | j_mayer | { |
3794 | 3a607854 | j_mayer | .name = "Pulsar",
|
3795 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64III, |
3796 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3797 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3798 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3799 | 3a607854 | j_mayer | .msr_mask = xxx, |
3800 | 3a607854 | j_mayer | }, |
3801 | 3a607854 | j_mayer | #endif
|
3802 | 3a607854 | j_mayer | #if defined (TODO)
|
3803 | 3a607854 | j_mayer | /* RS64-IV (IceStar/IStar/SStar) */
|
3804 | 3a607854 | j_mayer | { |
3805 | 3a607854 | j_mayer | .name = "RS64-IV",
|
3806 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3807 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3808 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3809 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3810 | 3a607854 | j_mayer | .msr_mask = xxx, |
3811 | 3a607854 | j_mayer | }, |
3812 | 3a607854 | j_mayer | { |
3813 | 3a607854 | j_mayer | .name = "IceStar",
|
3814 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3815 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3816 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3817 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3818 | 3a607854 | j_mayer | .msr_mask = xxx, |
3819 | 3a607854 | j_mayer | }, |
3820 | 3a607854 | j_mayer | { |
3821 | 3a607854 | j_mayer | .name = "IStar",
|
3822 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3823 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3824 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3825 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3826 | 3a607854 | j_mayer | .msr_mask = xxx, |
3827 | 3a607854 | j_mayer | }, |
3828 | 3a607854 | j_mayer | { |
3829 | 3a607854 | j_mayer | .name = "SStar",
|
3830 | 3a607854 | j_mayer | .pvr = CPU_PPC_RS64IV, |
3831 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3832 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_RS64, |
3833 | 3a607854 | j_mayer | .flags = PPC_FLAGS_RS64, |
3834 | 3a607854 | j_mayer | .msr_mask = xxx, |
3835 | 3a607854 | j_mayer | }, |
3836 | 3a607854 | j_mayer | #endif
|
3837 | 3a607854 | j_mayer | /* POWER */
|
3838 | 3a607854 | j_mayer | #if defined (TODO)
|
3839 | 3a607854 | j_mayer | /* Original POWER */
|
3840 | 3a607854 | j_mayer | { |
3841 | 3a607854 | j_mayer | .name = "POWER",
|
3842 | 3a607854 | j_mayer | .pvr = CPU_POWER, |
3843 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3844 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_POWER, |
3845 | 3a607854 | j_mayer | .flags = PPC_FLAGS_POWER, |
3846 | 3a607854 | j_mayer | .msr_mask = xxx, |
3847 | 3a607854 | j_mayer | }, |
3848 | 76a66253 | j_mayer | #endif
|
3849 | 426613db | j_mayer | #endif /* defined (TARGET_PPC64) */ |
3850 | 76a66253 | j_mayer | #if defined (TODO)
|
3851 | 3a607854 | j_mayer | /* POWER2 */
|
3852 | 3a607854 | j_mayer | { |
3853 | 3a607854 | j_mayer | .name = "POWER2",
|
3854 | 3a607854 | j_mayer | .pvr = CPU_POWER2, |
3855 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3856 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_POWER, |
3857 | 3a607854 | j_mayer | .flags = PPC_FLAGS_POWER, |
3858 | 3a607854 | j_mayer | .msr_mask = xxx, |
3859 | 3a607854 | j_mayer | }, |
3860 | 3a607854 | j_mayer | #endif
|
3861 | 3a607854 | j_mayer | /* Generic PowerPCs */
|
3862 | 3a607854 | j_mayer | #if defined (TODO) || 1 |
3863 | 3a607854 | j_mayer | { |
3864 | 3a607854 | j_mayer | .name = "ppc64",
|
3865 | 3a607854 | j_mayer | .pvr = CPU_PPC_970, |
3866 | 3a607854 | j_mayer | .pvr_mask = 0xFFFF0000,
|
3867 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_PPC64, |
3868 | 3a607854 | j_mayer | .flags = PPC_FLAGS_PPC64, |
3869 | 3a607854 | j_mayer | .msr_mask = 0xA00000000204FF36,
|
3870 | 3a607854 | j_mayer | }, |
3871 | 3a607854 | j_mayer | #endif
|
3872 | 3a607854 | j_mayer | { |
3873 | 3a607854 | j_mayer | .name = "ppc32",
|
3874 | 3a607854 | j_mayer | .pvr = CPU_PPC_604, |
3875 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3876 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_PPC32, |
3877 | 3a607854 | j_mayer | .flags = PPC_FLAGS_PPC32, |
3878 | 3a607854 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3879 | 3a607854 | j_mayer | }, |
3880 | 3a607854 | j_mayer | /* Fallback */
|
3881 | 3a607854 | j_mayer | { |
3882 | 3a607854 | j_mayer | .name = "ppc",
|
3883 | 3a607854 | j_mayer | .pvr = CPU_PPC_604, |
3884 | 3a607854 | j_mayer | .pvr_mask = 0xFFFFFFFF,
|
3885 | 3a607854 | j_mayer | .insns_flags = PPC_INSNS_PPC32, |
3886 | 3a607854 | j_mayer | .flags = PPC_FLAGS_PPC32, |
3887 | 3a607854 | j_mayer | .msr_mask = 0x000000000005FF77,
|
3888 | 3a607854 | j_mayer | }, |
3889 | 3a607854 | j_mayer | }; |
3890 | 3fc6c082 | bellard | |
3891 | 3fc6c082 | bellard | int ppc_find_by_name (const unsigned char *name, ppc_def_t **def) |
3892 | 3fc6c082 | bellard | { |
3893 | 3fc6c082 | bellard | int i, ret;
|
3894 | 3fc6c082 | bellard | |
3895 | 3fc6c082 | bellard | ret = -1;
|
3896 | 3fc6c082 | bellard | *def = NULL;
|
3897 | 3fc6c082 | bellard | for (i = 0; strcmp(ppc_defs[i].name, "ppc") != 0; i++) { |
3898 | 3fc6c082 | bellard | if (strcasecmp(name, ppc_defs[i].name) == 0) { |
3899 | 3fc6c082 | bellard | *def = &ppc_defs[i]; |
3900 | 3fc6c082 | bellard | ret = 0;
|
3901 | 3fc6c082 | bellard | break;
|
3902 | 3fc6c082 | bellard | } |
3903 | 3fc6c082 | bellard | } |
3904 | 3fc6c082 | bellard | |
3905 | 3fc6c082 | bellard | return ret;
|
3906 | 3fc6c082 | bellard | } |
3907 | 3fc6c082 | bellard | |
3908 | 3fc6c082 | bellard | int ppc_find_by_pvr (uint32_t pvr, ppc_def_t **def)
|
3909 | 3fc6c082 | bellard | { |
3910 | 3fc6c082 | bellard | int i, ret;
|
3911 | 3fc6c082 | bellard | |
3912 | 3fc6c082 | bellard | ret = -1;
|
3913 | 3fc6c082 | bellard | *def = NULL;
|
3914 | 3fc6c082 | bellard | for (i = 0; ppc_defs[i].name != NULL; i++) { |
3915 | 3fc6c082 | bellard | if ((pvr & ppc_defs[i].pvr_mask) ==
|
3916 | 3fc6c082 | bellard | (ppc_defs[i].pvr & ppc_defs[i].pvr_mask)) { |
3917 | 3fc6c082 | bellard | *def = &ppc_defs[i]; |
3918 | 3fc6c082 | bellard | ret = 0;
|
3919 | 3fc6c082 | bellard | break;
|
3920 | 3fc6c082 | bellard | } |
3921 | 3fc6c082 | bellard | } |
3922 | 3fc6c082 | bellard | |
3923 | 3fc6c082 | bellard | return ret;
|
3924 | 3fc6c082 | bellard | } |
3925 | 3fc6c082 | bellard | |
3926 | 3fc6c082 | bellard | void ppc_cpu_list (FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...)) |
3927 | 3fc6c082 | bellard | { |
3928 | 3fc6c082 | bellard | int i;
|
3929 | 3fc6c082 | bellard | |
3930 | 3fc6c082 | bellard | for (i = 0; ; i++) { |
3931 | 76a66253 | j_mayer | (*cpu_fprintf)(f, "PowerPC %16s PVR %08x mask %08x\n",
|
3932 | 3fc6c082 | bellard | ppc_defs[i].name, |
3933 | 3fc6c082 | bellard | ppc_defs[i].pvr, ppc_defs[i].pvr_mask); |
3934 | 3fc6c082 | bellard | if (strcmp(ppc_defs[i].name, "ppc") == 0) |
3935 | 3fc6c082 | bellard | break;
|
3936 | 3fc6c082 | bellard | } |
3937 | 3fc6c082 | bellard | } |