Revision 3a9d8549

b/hw/piix_pci.c
228 228
{
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    PCII440FXState *d = DO_UPCAST(PCII440FXState, dev, dev);
230 230

  
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    pci_config_set_vendor_id(d->dev.config, PCI_VENDOR_ID_INTEL);
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    pci_config_set_device_id(d->dev.config, PCI_DEVICE_ID_INTEL_82441);
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    d->dev.config[0x08] = 0x02; // revision
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    pci_config_set_class(d->dev.config, PCI_CLASS_BRIDGE_HOST);
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    d->dev.config[I440FX_SMRAM] = 0x02;
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    cpu_smm_register(&i440fx_set_smm, d);
......
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static int piix3_initfn(PCIDevice *dev)
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{
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    PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev);
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    uint8_t *pci_conf;
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    isa_bus_new(&d->dev.qdev);
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    pci_conf = d->dev.config;
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    pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
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    pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
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    pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA);
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    qemu_register_reset(piix3_reset, d);
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    return 0;
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}
......
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        .no_hotplug   = 1,
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        .init         = i440fx_initfn,
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        .config_write = i440fx_write_config,
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        .vendor_id    = PCI_VENDOR_ID_INTEL,
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        .device_id    = PCI_DEVICE_ID_INTEL_82441,
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        .revision     = 0x02,
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        .class_id     = PCI_CLASS_BRIDGE_HOST,
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    },{
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        .qdev.name    = "PIIX3",
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        .qdev.desc    = "ISA bridge",
......
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        .no_hotplug   = 1,
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        .init         = piix3_initfn,
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        .config_write = piix3_write_config,
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        .vendor_id    = PCI_VENDOR_ID_INTEL,
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        .device_id    = PCI_DEVICE_ID_INTEL_82371SB_0, // 82371SB PIIX3 PCI-to-ISA bridge (Step A1)
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        .class_id     = PCI_CLASS_BRIDGE_ISA,
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    },{
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        /* end of list */
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    }

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