Revision 3ad9a57e hw/ide.c

b/hw/ide.c
393 393
    stw_raw(p + 0, 0x0040);
394 394
    stw_raw(p + 1, s->cylinders); 
395 395
    stw_raw(p + 3, s->heads);
396
    stw_raw(p + 4, 512 * s->sectors); /* sectors */
397
    stw_raw(p + 5, 512); /* sector size */
396
    stw_raw(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
397
    stw_raw(p + 5, 512); /* XXX: retired, remove ? */
398 398
    stw_raw(p + 6, s->sectors); 
399 399
    padstr((uint8_t *)(p + 10), "QM00001", 20); /* serial number */
400
    stw_raw(p + 20, 3); /* buffer type */
400
    stw_raw(p + 20, 3); /* XXX: retired, remove ? */
401 401
    stw_raw(p + 21, 512); /* cache size in sectors */
402 402
    stw_raw(p + 22, 4); /* ecc bytes */
403 403
    padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
404 404
    padstr((uint8_t *)(p + 27), "QEMU HARDDISK", 40); /* model */
405 405
#if MAX_MULT_SECTORS > 1    
406
    stw_raw(p + 47, MAX_MULT_SECTORS);
406
    stw_raw(p + 47, 0x8000 | MAX_MULT_SECTORS);
407 407
#endif
408 408
    stw_raw(p + 48, 1); /* dword I/O */
409 409
    stw_raw(p + 49, 1 << 9); /* LBA supported, no DMA */
410 410
    stw_raw(p + 51, 0x200); /* PIO transfer cycle */
411 411
    stw_raw(p + 52, 0x200); /* DMA transfer cycle */
412
    stw_raw(p + 53, 1); /* words 54-58 are valid */
412 413
    stw_raw(p + 54, s->cylinders);
413 414
    stw_raw(p + 55, s->heads);
414 415
    stw_raw(p + 56, s->sectors);

Also available in: Unified diff